Commit Graph

190 Commits

Author SHA1 Message Date
Macpaul Lin
00d10eb041 ftsmc020: move ftsmc020 static mem controller to driver/mtd
Move the header file and definitions of ftsmc020
static memory control unit from a320 SoC folder to
"drivers/mtd" folder.

This change will let other SoC which also use ftsmc020
could share the same header file.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-27 19:38:10 +02:00
Macpaul Lin
5656b40bb3 ftsdmc020: move ftsdmc020.h to include/faraday
Move the header file "ftsdmc020.h" (SDRAM Controller)
to "include/faraday" folder.

This change will let other SoC which also use ftsdmc020
could share the same header file.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-27 19:38:10 +02:00
Tom Warren
c5e93131fa arm: Tegra2: GPIO: Add basic GPIO definitions
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-04-27 19:38:10 +02:00
Tom Warren
1436d51076 arm: Tegra2: Add missing PLLX init
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-04-27 19:38:09 +02:00
Tom Warren
74652cf684 arm: Tegra2: add support for A9 CPU init
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-04-27 19:38:09 +02:00
Luca Ceresoli
c2b626c199 ARMV7: OMAP3: Add GPMC_CONFIGx register value definitions
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:09 +02:00
Alexander Holler
d90859a67c omap3_beagle: enable EHCI and USB storage.
The reset sequence/configuration for ehci is highly board specific,
so this will be done in the source for the board, instead of
introducing several CONFIG_* which would be needed to make those
few lines in beagle.c usable across different OMAP boards.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:09 +02:00
Alexander Holler
7b89795f17 OMAP3: Add support for DPLL5 (usbhost)
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:09 +02:00
Albert ARIBAUD
57b4bce996 Replace obsolete e-mail address
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-04-27 19:38:09 +02:00
Macpaul Lin
0f7ffd75c6 fttmr010: move fttmr010 header to include/faraday
Move the header file and definitions of fttmr010
power control unit from a320 SoC folder to
"include/faraday" folder.

This change will let other SoC which also use fttmr010
could share the same header file.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-27 19:38:08 +02:00
Rogan Dawes
286a5b253a Orion5x: Correct DRAM bank detection 2011-04-27 19:38:08 +02:00
Lei Wen
81a9ab21ca I2C: add i2c support for Armada100 platform
Add i2c support to aspenite board with Armada100 soc.

Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-04-27 19:38:08 +02:00
Lei Wen
aa3b168e31 I2C: add i2c support for Pantheon platform
Add i2c support to dkb board with pantheon soc.

Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-04-27 19:38:08 +02:00
Lei Wen
3df619ec2c mv_i2c: use structure to replace the direclty define
Add i2c_clk_enable in the cpu specific code, since previous platform it,
while new platform don't need. In the pantheon and armada100 platform,
this function is defined as NULL one.

Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-04-27 19:38:08 +02:00
Matthias Weisser
d8834a1323 arm: Use optimized memcpy and memset from linux
Using optimized versions of memset and memcpy from linux brings a quite
noticeable speed (x2 or better) improvement for these two functions.

Here are some numbers for test done with jadecpu

                           | HEAD(1)| HEAD(1)| HEAD(2)| HEAD(2)|
                           |        | +patch |        | +patch |
---------------------------+--------+--------+--------+--------+
Reset to prompt            |  438ms |  330ms |  228ms |  120ms |
                           |        |        |        |        |
TFTP a 3MB img             | 4782ms | 3428ms | 3245ms | 2820ms |
                           |        |        |        |        |
FATLOAD USB a 3MB img*     | 8515ms | 8510ms | ------ | ------ |
                           |        |        |        |        |
BOOTM LZO img in RAM       | 3473ms | 3168ms |  592ms |  592ms |
 where CRC is              |  615ms |  615ms |   54ms |   54ms |
 uncompress                | 2460ms | 2462ms |  450ms |  451ms |
 final boot_elf            |  376ms |   68ms |   65ms |   65ms |
                           |        |        |        |        |
BOOTM LZO img in FLASH     | 3207ms | 2902ms | 1050ms | 1050ms |
 where CRC is              |  600ms |  600ms |  135ms |  135ms |
 uncompress                | 2209ms | 2211ms |  828ms |  828ms |
                           |        |        |        |        |
Copy 1.4MB from NOR to RAM |  134ms |   72ms |  120ms |   70ms |

(1) No dcache
(2) dcache enabled in board_init
*Does not work when dcache is on

Size impact:

C version:
   text    data     bss     dec     hex filename
 202862   18912  266456  488230   77326 u-boot

ASM version:
   text    data     bss     dec     hex filename
 203798   18912  266288  488998   77626 u-boot
222712  u-boot.bin

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-04-27 19:38:07 +02:00
Steve Kipisz
d4e53f063d OMAP3: BeagleBoard: Enable pullups on i2c2.
This allows the reading of EEPROMS on the expansion bus without adding
external pull-ups.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:06 +02:00
Stefano Babic
cd4b8a6329 MX31: drop warnings in get_cpu_rev
Drop warnings due to recent commit
ARM: mx31: Print the silicon version

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:05 +02:00
Fabio Estevam
a770975ab6 ARM: MX31: Fix file name label
Commit 5d2c154 (IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers)
renamed mx31-imx-regs.h to imx-regs.h.

Change the file label accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:05 +02:00
Fabio Estevam
4adaf9bf09 ARM: mx31: Print the silicon version
Use the same method of the Linux kernel to print the MX31 silicon version on
boot.

Tested on a MX31PDK with a 2.0 silicon, where it shows:

CPU:   Freescale i.MX31 rev 2.0 at 531 MHz

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:05 +02:00
Stefano Babic
8627111543 IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers
As exception among the i.MX processors, the i.MX31 has headers
without general names (mx31-regs.h, mx31.h instead of imx-regs.h and
clock.h). This requires several nasty #ifdef in the drivers to
include the correct header. The patch cleans up the driver and
renames the header files as for the other i.MX processors.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:05 +02:00
Stefano Babic
2cf36ae7cf MX31: add support for MX31 watchdog
The patch add CONFIG_HW_WATCHDOG to be used
with the internal watchdog timer of the MX31
processor. Two function are exported for the
board maintainers:
	mxc_hw_watchdog_enable
	mxc_hw_watchdog_reset

The board maintainer can decide to use mxc_hw_watchdog_reset as
hw_watchdog_reset, or to implement his own function to reset
the watchdog.
The watchdog timer can be configured with CONFIG_SYS_WD_TIMER_SECS
(value in seconds). The MX31 allows values between 0.5
(CONFIG_SYS_WD_TIMER_SECS = 0) and 128 seconds.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:04 +02:00
Chander Kashyap
bef5f8565f ARMV7: S5P: Fixed register offset in mmc.h
The MMC registers are accessed through struct s5p_mmc member
variables. MMC controller "control4" register offset is set
to 0x8C as per data sheet. The size of struct s5p_mmc is also
corrected.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:21 +02:00
Minkyu Kang
70fc52dfaa S5P: timer: Use pwm functions
Use pwm functions for timer that is PWM timer 4.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:59 +02:00
Donghwa Lee
3f129280b3 ARM: S5P: pwm driver support
This is common pwm driver of S5P.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:54 +02:00
Po-Yu Chuang
f326cbba98 arm: fix incorrect monitor protection region in FLASH
Monitor protection region in FLASH did not cover .rel.dyn
and .dynsym sections, because it uses __bss_start to compute
monitor_flash_len. Use _end instead.

Add _end to linker scripts for end of u-boot image
Add _end_ofs to all the start.S.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-03-27 19:18:52 +02:00
Sandeep Paulraj
c7977858dc ARM: Update mach-types
This commit updates the mach-types based on the latest
in linus's head

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-21 08:30:55 +01:00
Lei Wen
a03774ed88 mvmfp: add MFP configuration support for PANTHEON
This patch adds the Multiple Function Pin configuration support for
Marvell PANTHEON SoCs

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Lei Wen
896e2ca912 ARM: Add Support for Marvell Pantheon Familiy SoCs
Pantheon Family processors are highly integrated SoCs
based on Sheeva_88SV331x-v5 PJ1 cpu core.
Ref:
http://www.marvell.com/products/processors/communications/marvell_pantheon_910_920_pb.pdf

SoC versions Supported:
1) PANTHEON920          (TD)
2) PANTHEON910          (TTC)

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Lei Wen
cf946c6d09 mv: seperate kirkwood and armada from common setting
Since there are lots of difference between kirkwood and armada series,
it is better to seperate them but still keep the most common file
shared by all marvell platform in the mv-common configure file.

This patch move the kirkwood only driver definitoin in mv-common to
the <soc_name>/config.h.

This patch is tested with compilation for armada100 and guruplug.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Wolfgang Denk
495df3bad9 ARM: fix write*() I/O accessors
Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice.  This
breaks code like used here (from "drivers/net/dnet.c"):

	for (i = 0; i < wrsz; i++)
		writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>
2011-02-21 08:30:55 +01:00
Tom Warren
3f82b1d3ab arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-02-21 08:30:54 +01:00
Minkyu Kang
008a351a8a armv7: add support for S5PC210 SoC
S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-02-02 00:54:45 +01:00
Minkyu Kang
e0617c621d S5P: serial: Use the inline function instead of static value
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-02-02 00:54:45 +01:00
Alexander Holler
3c0659b535 ARM: Avoid compiler optimization for readb, writeb and friends.
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.

Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.

Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>
2011-02-02 00:54:44 +01:00
Minkyu Kang
3c152165c7 armv7: s5pc1xx: don't use function pointer for clock functions
Because of the bss area is cleared after relocation, we've lost pointers.
This patch fixed it.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-02-02 00:54:44 +01:00
Sandeep Paulraj
b157dd51de DaVinci DM6467: Enhance board Support
Support for DM6467 was incomplete and the build failed
as well. Patches were sent to the list but have not been
added. This enhances the DM6467 support.
Some more patches will need to be sent to bring
it in line with what is available in internal TI
trees


Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-02 00:54:44 +01:00
Sandeep Paulraj
04f15b3b1a ARM: Update mach types
This commit updates the mach-types for ARM


Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-02 00:54:44 +01:00
Sandeep Paulraj
840f8923a0 DaVinci DM6467: Added ET1011C (LSI) PHY support
Added arch/arm/cpu/arm926ejs/davinci/et1011c.c for handling
ET1011C gigabit phy. which overrides get_link_speed function
from default implementation. This enables output of 125 MHz
reference clock on SYS_CLK pin.

Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-02 00:54:44 +01:00
Sandeep Paulraj
57418d2139 Davinci MMCSD Support
Added support for MMC/SD cards for Davinci.  This feature is enabled by
CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC
options. This is tested on DM355 and DM365 EVMs with both the available mmc
controllers.

Signed-off-by: Alagu Sankar <alagusankar@embwise.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-02 00:54:44 +01:00
Stefano Babic
ac87c17d34 SPI: mxc_spi: replace fixed offsets with structures
This patch cleans driver code replacing all accesses
to registers with fixed offsets with a corresponding
structure.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02 00:54:43 +01:00
Stefano Babic
b9bb053159 Add support for MX35 processor
The patch adds basic support for the Freescale's i.MX35
(arm1136 based) processor.

The patch adds also a prototype for the initialization
of the FEC(ethernet controller) to netdev.h to avoid
warnings.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
595f3e5645 MX5: Add initial support for MX53 processor
Add initial support for Freescale MX53 processor,

- Add the iomux support and the pin definition,
- Add the regs definition, clean up some unused def from mx51,
- Add the low level init support, make use the freq input of setup_pll macro

Signed-off-by: Jason Liu  <r64343@freescale.com>
2011-02-02 00:54:41 +01:00
Macpaul Lin
f8ea15f769 ftpmu010: support faraday ftpmu010 driver
Faraday's ftpmu010 is a power managemnet unit which support cpu
sleep and frequency scaling. It has been integrated into many SoC.

This patch also move ftpmu010 to a proper place for later enhancement.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-01-25 22:18:57 +01:00
Wolfgang Denk
cdc51c294a Merge branch 'next' of ../next 2010-12-22 21:16:17 +01:00
clagix@gmail.com
a138d96aa8 AT91RM9200: fix AT91_PMC_MCKR_MDIV_* defines for this CPU
Signed-off-by: Guido Classen <clagix@gmail.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-12-17 09:25:43 +01:00
Prafulla Wadaskar
ce089c04a8 add Multi Function Pin configuration support for ARMADA100
This patch adds the support MFP support for Marvell ARMADA100 SoCs

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-12-16 23:02:47 +01:00
Prafulla Wadaskar
6c08d5dcf8 arm: Add Support for Marvell ARMADA 100 Familiy SoCs
ARMADA 100 Family processors are highly integrated SoCs
based on Sheeva_88SV331x-v5 PJ1 cpu core.
Ref: http://www.marvell.com/products/processors/applications/armada_100

SoC versions Supported:
1) ARMADA168/88AP168	(Aspen P)
2) ARMADA166/88AP166	(Aspen M)
3) ARMADA162/88AP162	(Aspen L)

Contributors:
Eric Miao <eric.y.miao@gmail.com>
Lei Wen <leiwen@marvell.com>
Mahavir Jain <mjain@marvell.com>

Signed-off-by: Mahavir Jain <mjain@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-12-16 23:02:36 +01:00
Wolfgang Denk
006915fbb0 Merge branch 'master' of ../master into next 2010-12-16 23:00:53 +01:00
Wolfgang Denk
ac8983bcba Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-12-09 20:52:44 +01:00
Prafulla Wadaskar
f9de0997d7 ARM: make timer variables in gt_t available for all ARM platforms
All code that attemots to access variables in BSS before relocation
(for example directly or indirectly by board_init_f()) needs to be
fixed. Especially timer.c needs to fix on most of the ARM platforms.

This patch makes timer related variables in gd_t available for
all ARM implementations.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>

Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-12-09 11:01:16 +01:00