Commit Graph

2081 Commits

Author SHA1 Message Date
Masahiro Yamada
dc7246e725 ARM: UniPhier: extend register area of init page table for PH1-sLD3
0x20000000-0x2fffffff: assigned to ARM mpcore (sLD3 only)
0xf0000000-0xffffffff: assigned to Denali NAND controller (sLD3 only)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-09 00:08:33 +09:00
Masahiro Yamada
f5d0b9b2c3 ARM: UniPhier: merge UniPhier config headers into a single file
Some configurations have been moved to Kconfig and the difference
among the config headers of UniPhier SoC variants is getting smaller
and smaller.  Now is a good time to merge them into a single file.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-08 01:25:44 +09:00
Masahiro Yamada
3201455d6a ARM: UniPhier: move support card select to Kconfig
There are two kinds of expansion boards which are often used for
the UniPhier platform and they are only exclusively selectable.
It can be better described by the "choice" menu of Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-08 01:25:44 +09:00
Masahiro Yamada
84b3584f21 ARM: UniPhier: move CONFIG_UNIPHIER_SMP to Kconfig
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-08 01:25:44 +09:00
Masahiro Yamada
b115678bdf ARM: UniPhier: use boot_is_swapped() macro for readability
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-08 01:25:44 +09:00
Masahiro Yamada
9248a78f40 ARM: UniPhier: remove Denali NAND controller fixup code
This ugly work-around code is unnecessary since commit f09eb52b3f
(mtd: denali: set some registers after nand_scan_ident()).

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-07 17:47:32 +09:00
Masahiro Yamada
149c751dc7 usb: UniPhier: support OF configuration
If CONFIG_OF_CONTROL is defined, search device tree nodes that are
compatible with "panasonic,uniphier-ehci" and take the base address
from their "reg" property.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Marek Vasut <marex@denx.de>
2014-11-28 02:21:01 +09:00
Masahiro Yamada
4b4af643fa ARM: UniPhier: do not compile platform data when CONFIG_OF_CONTROL=y
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-28 02:17:03 +09:00
Tom Rini
878cd63e02 Merge branch 'master' of http://git.denx.de/u-boot-samsung 2014-11-26 11:21:16 -05:00
Hans de Goede
7b02d9c943 sun6i: Drop some "unknown magic" from dram init
Allwinner tells us that this bit of code is the rtc ram being used to detect
coming out of "super-standby" mode, and if that is the case, going out of
self-refresh mode.

Since we do not support "super-standby" mode, this can be dropped.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-11-25 13:38:46 +01:00
Hans de Goede
0bd5125133 sunxi: Add video pll clock functions
This is a preparation patch for adding support for HDMI out.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-11-25 13:38:46 +01:00
Hans de Goede
9d4b7d0bc8 sun4i: Rename dram_clk_cfg to dram_clk_gate
The data sheet just calls it DRAM_CLK_REG, and on sun6i we've both a
dram_clk_cfg and dram_clk_gate, and the sun4i reg matches dram_clk_gate on
sun6i, so name it the same on sun4i.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-11-25 13:38:46 +01:00
Tom Rini
fce0a90a68 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-11-24 17:05:11 -05:00
Tom Rini
dee332ffb7 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2014-11-24 12:02:12 -05:00
Tom Rini
1739564e75 Merge git://git.denx.de/u-boot-dm
Conflicts:
	drivers/serial/serial-uclass.c

Signed-off-by: Tom Rini <trini@ti.com>
2014-11-24 12:01:48 -05:00
Nikita Kiryanov
10ee8ecafb sata: implement reset_sata for dwc_ahsata
Add reset_sata() to the sata driver interface and implement it
for dwc_ahsata. This function cleans up after sata_init(), and
therefore accepts a device number like sata_init() does.
A dummy implementation is provided for the rest of the drivers.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
2014-11-24 11:59:59 +01:00
Nikita Kiryanov
8d29cef588 arm: mx6: introduce disable_sata_clock
Implement disable_sata_clock for mx6 SoCs.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
2014-11-24 11:59:59 +01:00
Hans de Goede
8bc347e2ec ARM: bootm: Allow booting in secure mode on hyp capable systems
Older Linux kernels will not properly boot in hyp mode, add support for a
bootm_boot_mode environment variable, which can be set to "sec" or "nonsec"
to force booting in secure or non-secure mode when build with non-sec support.

The default behavior can be selected through CONFIG_ARMV7_BOOT_SEC_DEFAULT,
when this is set booting in secure mode is the default. The default setting
for this Kconfig option is N, preserving the current behavior of booting in
non-secure mode by default when non-secure mode is supported.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
2014-11-24 09:09:52 +01:00
Hans de Goede
ea624e1951 ARM: Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options
Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options, this is a
preparation patch for adding an env variable to choose between secure /
non-secure boot on non-secure boot capable systems, specifically this
prepares for adding CONFIG_ARMV7_BOOT_SEC_DEFAULT as a proper Kconfig option.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-11-24 09:09:49 +01:00
Masahiro Yamada
4efb654223 tegra: do not descend into empty directories
Some tegra makefiles only contain a dummy line to generate
a built-in.o.  Let's do not descend into such directories.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-11-23 06:49:02 -05:00
Masahiro Yamada
56f31e872e kbuild: use SoC-specific CONFIG to descend into SoC directory
Use "obj-$(CONFIG_FOO) += foo/" where it is possible.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-23 06:49:02 -05:00
Masahiro Yamada
165ecd26f0 kbuild: Descend into SOC directory from CPU directory
Some CPUs of some architectures have SOC directories.
At present, the build system directly descends into SOC directories
from the top Makefile, but it should generally descend into each
directory from its parent directory.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-23 06:49:02 -05:00
Masahiro Yamada
b41411954d linux/kernel.h: sync min, max, min3, max3 macros with Linux
U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does.  This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.

Many of references of those macros must be fixed to suppress warnings.
We have two options:
 - Use min, max, min3, max3 only when the arguments have the same type
   (or add casts to the arguments)
 - Use min_t/max_t instead with the appropriate type for the first
   argument

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: Tom Rini <trini@ti.com>
2014-11-23 06:48:30 -05:00
Ye.Li
7a26416847 mx6: thermal: Check cpu temperature via thermal sensor
Add imx6 thermal device to mx6 soc file. Read the cpu temperature
using this device to access onchip thermal sensor.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2014-11-21 15:30:12 +01:00
Nitin Garg
cf202d268b mx6: clock: Add thermal clock enable function
Add api to check and enable pll3 as required
for thermal sensor driver.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2014-11-21 15:18:47 +01:00
Simon Glass
f8fff9dac9 dm: arm: spl: Make driver model linker lists available
The linker lists feature is useful in SPL as it holds the driver model
platform data. So don't throw away the lists.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
2014-11-21 08:14:11 +01:00
Simon Glass
12fe7f7c2a dm: at91: Add platform data for GPIO on at91sam9260-based boards
These boards all have the same GPIO arrangement, so add some common platform
data that can be used by all boards. Remove the configs which are no longer
required.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:09:36 +01:00
Masahiro Yamada
cba1da495d include: move various macros to include/linux/kernel.h
U-Boot has imported various utility macros from Linux
scattering them to various places without consistency.

In include/common.h are min, max, min3, max3, ARRAY_SIZE, ALIGN,
container_of, DIV_ROUND_UP, etc.
In include/linux/compat.h are min_t, max_t, round_up, round_down,
etc.
We also have duplicated defines of min_t in some *.c files.

Moreover, we are suffering from too cluttered include/common.h.

This commit moves various macros that originate in
include/linux/kernel.h of Linux to their original position.

Note:
This commit simply moves the macros; the macros roundup,
min, max, min2, max3, ARRAY_SIZE are different
from those of Linux at this point.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-20 11:28:25 -05:00
Masahiro Yamada
4515992fc7 replace DIV_ROUND with DIV_ROUND_CLOSEST
The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible
and safer than DIV_ROUND.

For example,
  foo = DIV_ROUND_CLOSEST(x, y++)
works expectedly, but
  foo = DIV_ROUND(x, y++)
does not. (y is incremented twice.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-20 11:28:25 -05:00
Fabio Estevam
32c81ea65c imx: consolidate set_chipselect_size function
Move MX5 specific set_chipselect_size function into generic i.MX part,
such that MX6 based boards are able to use this function as well.

While doing this the iomuxc gpr member needed to be consolidated between
MX5 and MX6.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:19 +01:00
Albert ARIBAUD
db544b9662 imx: fix exception vectors relocation in imx27
Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x00000000) or
high (0xFFFF0000) vectors address, or setting VBAR to
U-Boot's base if applicable.

i.MX27 SoC is ARM926E-JS, thus has only normal and
high options, but does not provide RAM at 0xFFFF0000
and has only ROM at 0x00000000; it is therefore not
possible to move or change its exception vectors.

Besides, i.MX27 ROM code does provide an indirect
vectors table but at a non-standard address and with
the reset and reserved vectors missing.

Turn the current vector relocation code into a weak
routine called after relocate_code from crt0, and add
strong version for i.MX27.

Series-Cc: Heiko Schocher <hs@denx.de>

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Tested-by: Philippe Reynes <tremyfr@gmail.com>
Tested-by: Philippe Reynes <tremyfr@yahoo.fr>
2014-11-20 10:13:54 +01:00
Alexey Ignatov
7a139959d0 ARM: mxs: tools: Add support for boot progress display flag
mkimage -T mxs now support new flag in config file:
DISPLAYPROGRESS - makes boot process print HTLLC characters for each BootROM
instruction.

Signed-off-by: Alexey Ignatov <lexszero@gmail.com>
2014-11-20 10:13:45 +01:00
Bo Shen
927b901b47 ARM: atmel: add sama5d4ek board support
The code for this board supports following features:
  - Boot media support: NAND flash/SD card/SPI flash
  - Support LCD display
  - Support ethernet
  - Support USB mass storage

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:18 -05:00
Heiko Schocher
5abc00d020 arm, spl, at91: add at91sam9260 and at91sam9g45 spl support
add support for using spl code on at91sam9260 and at91sam9g45
based boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
[adopt Bo's change in spl.c]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:17 -05:00
Heiko Schocher
7dd5891061 arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45
- compile mpddrc ram init code also for AT91SAM9M10G45
  based boards.
- in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED
  in the cr configuration

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:16 -05:00
Heiko Schocher
341f548ee9 arm, at91, mpddrc: fix typo in ddr2_init()
use the configure value for computing the ba_off value
not the value from the cr register. This leaded in a
wrong ram configuration on the upcoming corvus spl board
support.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:16 -05:00
Heiko Schocher
c001486d99 arm, at91: generate boot.bin file for all atmel SoC
generate the boot.bin file for all atmel SoC (arm920, arm926, armv7)

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
[fix subject]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:16 -05:00
Bo Shen
da79fa4d77 ARM: atmel: spl: make css field configurable
The clock source for master clock can be slow clock, main clock,
plla clock or upll clock. So, make the clock source selection
field in mckr can be configured.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:16 -05:00
Bo Shen
a5f35d63f2 ARM: atmel: spl: make initialization more stable
We need to make sure the main clock ready field in MCFR is set
after switch to main crystal oscillator.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:15 -05:00
Tom Rini
256d83cd6d Merge branch 'rmobile' of git://git.denx.de/u-boot-sh 2014-11-17 08:43:21 -05:00
Suriyan Ramasami
bdba132828 arm: odroid: enable/disable usb host phy for exynos4412
Enable/disable the usb host phy on the odroid U/X2 boards which are based
on the Exynos4412 SOC.

Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:33:21 +09:00
Vadim Bendebury
4f29862487 Peach-Pi: Use the enhanced usb_copy() prototype
Exynos5800 IROM has a different, from 5250 and 5420, prototype of the
usb_copy() function. Luckily the earlier version did not expect any
arguments, which means the same code could be used with old and new
SoCs, the old ones just ignoring the arguments.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Akshay Saraswat
0e03e82465 Exynos5: ddr3: Choose between single or double channel config
Add a 4G configuration and choose it based on the number of banks
declared in config file. A board with 4 SDRAM banks declared (as
per CONFIG_NR_DRAM_BANKS) will end up with the 2G confiuration.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Alim Akhtar
061091098a DMC: Exynos5: Enable update mode for DREX controller
As per Exynos5800 UM ver 0.00 section 17.13.2.1
CONCONTROL register bit 3 [update_mode], Exynos5800 does not
support the PHY initiated update. And it is recommanded to
set this field to 1'b1 during initialization. This patch sets this bit.
Applying MC-initiated mode makes DDL tracking ON, that helps in
compensate MIF voltage variation.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Akshay Saraswat
79043d84da Config: Exynos5800: Enable build for Peach-Pi
This adds following things :
- New config and defconfig for Peach-Pi board.
- Alterations in Kconfig and MAINTAINERS.
- Addition of CONFIG_EXYNOS5800.
- ADdition of exynos5800-peach-pi in dts list.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Akshay Saraswat
aa14b42d53 Exynos5800: Introduce new proid for Exynos5800
This patch intends to add a new proid for Exynos5800 which is a
variant of Exynos5420. Product id for Exynos5800 is 0x5422.
Both Exynos5420 and Exynos5800 are pin to pin compitable. This
gives us an advantage of reusing Exynos5420 clock, pinmux, memory
and other settings.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Tom Rini
45043cf804 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2014-11-14 13:53:49 -05:00
Tom Rini
0d485b9095 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2014-11-13 10:35:13 -05:00
Tom Rini
3ad207a2bf Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-11-13 09:32:45 -05:00
Hans de Goede
6dbfda81c0 sun6i: Poke magic sram controller register to avoid cache issues
Without this the cache will only work in write-through mode, and as soon as
it is put in write-back mode things break.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-11-13 14:49:01 +01:00