brain-hackers_pepepper-mirror/u-boot-brain
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2 Commits

Author SHA1 Message Date
Tom Warren
b40f734af9 Tegra114: Initialize System Counter (TSC) with osc frequency 
T114 needs the SYSCTR0 counter initialized so the TSC can be
read by the kernel. Do it in the bootloader since it's a write-once
deal (secure/non-secure mode dependent).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
 2013-04-15 11:01:38 -07:00
Tom Warren
f29f086a09 Tegra: Move common clock code to arch/arm/cpu/tegra-common/clock.c 
This 'commonizes' much of the clock/pll code. SoC-dependent code
and tables are left in arch/cpu/tegraXXX-common/clock.c

Some T30 tables needed whitespace fixes due to checkpatch complaints.

Signed-off-by: Tom Warren <twarren@nvidia.com>
 2013-02-11 10:35:24 -07:00