brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-07-07 11:46:17 +09:00
Code Issues Projects Releases Wiki Activity
60,077 Commits 45 Branches 255 Tags 213 MiB
cbe3101018
Commit Graph

5 Commits

Author SHA1 Message Date
Simon Goldschmidt
48ec73453a arm: sofcpga: s10: remove unused ad-hoc reset code 
The stratix 10 reset manager ad-hoc code in arch/arm contains an unused
function 'reset_deassert_peripherals_handoff' that has been added from
the beginning. As this is probably a result of copying the gen5 reset
manager and this function has never been used, remove it.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
 2019-05-14 19:52:39 +02:00
Ang, Chee Hong
a03e9d9fe5 ARM: socfpga: stratix10: Disable FPGA2SOC reset 
Software must never reset FPGA2SOC bridge. This bridge must only be
reset by POR/COLD/WARM reset. Asserting the FPGA2SOC reset by software
can cause the SoC to lock-up if there are traffics being drived into
FPGA2SOC bridge.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
 2019-05-06 12:44:45 +02:00
Ley Foon Tan
8ab9daabe5 arm: socfpga: stratix10: Add cpu_has_been_warmreset() 
Add helper function cpu_has_been_warmreset() to check
if CPU is from warm reset boot.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2019-04-17 22:20:17 +02:00
Ley Foon Tan
74c78024a0 arm: socfpga: Remove unused function socfpga_emac_manage_reset() 
Remove code from the reset manager that is never called.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2018-10-03 12:56:50 +02:00
Ley Foon Tan
3607a8084a arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC 
Add Reset Manager driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2018-05-18 10:30:47 +02:00