3 Commits

Author	SHA1	Message	Date
Bin Meng	776d39d9a1	riscv: sifive: fu540: Enable GEMGXL MGMT driver ... Enable the new GEMGXL MGMT driver so that GEM 10/100 Mbps works now. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>	2019-06-01 13:33:17 -05:00
Lukas Auer	0ed93a8c59	riscv: fu540: enable SMP ... Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>	2019-04-08 09:44:26 +08:00
Anup Patel	3fda0262c3	riscv: Add SiFive FU540 board support ... This patch adds SiFive FU540 board support. For now, only SiFive serial, SiFive PRCI, and Cadance MACB drivers are only enabled. The SiFive FU540 defconfig by default builds U-Boot for S-Mode because U-Boot on SiFive FU540 will run in S-Mode as payload of BBL or OpenSBI. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>	2019-02-27 09:12:33 +08:00