Commit Graph

11 Commits

Author SHA1 Message Date
Masahiro Yamada
773f5f63dc ARM: uniphier: shrink arrays of DDR-PHY parameters for LD20 SoC
The two arrays ddrphy_{op,ip}_dq_shift_val, occupy more than 3.8 KB
memory footprint, which is significant in SPL.

There are PHY parameters for 5 boards, but they are actually not
board specific, but SoC specific.  After all, we just need to have
2 patterns, for LD20 and LD21.  Also, the shift values are small
enough to become "short" type instead of "int".  This change will
save about 3 KB memory footprint.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-29 20:59:08 +09:00
Masahiro Yamada
0f4ec05bbb ARM: uniphier: replace <linux/err.h> with <linux/errno.h>
These files only need error number macros.  Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot.  Avoid
unnecessary header includes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 15:32:56 +09:00
Wataru Okoshi
e95455ac1b ARM: uniphier: update UMC_MEMMAPSET value for LD20 SoC
Change bnk_typ's value from 8 to 0 (for G1's performance).

Signed-off-by: Wataru Okoshi <okoshi.wataru@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 15:01:27 +09:00
Masahiro Yamada
996fcdadba ARM: uniphier: remove unneeded parentheses
Just a cosmetic cleanup.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-12-10 01:42:51 +09:00
Masahiro Yamada
efaa22e426 ARM: uniphier: rename ddrphy-ld20-regs.h to ddruqphy-regs.h
This PHY might be used for other SoCs in the future.
Avoid including the SoC name in the header name.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-29 17:24:30 +09:00
Masahiro Yamada
b8909976ed ARM: uniphier: update DRAM init code for LD20 SoC (3rd)
- Constify UMC setting data arrays
  - Merge data arrays *_d0 and *_d1.
  - Add PHY parameters for LD20 C1 board

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-29 17:24:26 +09:00
Masahiro Yamada
c89638a027 ARM: uniphier: update DRAM init code for LD20 SoC (2nd)
- Do not reference CONFIG_DDR_FREQ; now the DDR frequency
    is passed from the uniphier_board_data structure
  - Constify parameter arrays
  - Tidy up cluttered macros
  - Lots of code cleanups
  - Lots of coding style fixes

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-10 10:03:23 +09:00
Masahiro Yamada
f9d7e17e84 ARM: uniphier: update DRAM init code for LD20 SoC
Import the latest version from the Diag software.

  - Support LD21 SoC (including DDR chips in the package)
  - Per-board granule adjustment for both reference and TV boards
  - Misc cleanups

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19 00:12:26 +09:00
Masahiro Yamada
7381db86a9 ARM: uniphier: rename UMC register macros of PH1-LD20
Correct some register names.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:36:58 +09:00
Masahiro Yamada
0586e22783 ARM: uniphier: rename umc-ld20-regs.h to umc64-regs.h
This header will be shared between PH1-LD11 and PH1-LD20
(and hopefully new ARMv8 SoCs developed in the future),
so umc64-regs.h would be a better fit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:35:26 +09:00
Masahiro Yamada
9d0c2ceb35 ARM: uniphier: add PH1-LD20 SoC support
This is the first ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24 09:54:08 +09:00