Commit Graph

65 Commits

Author SHA1 Message Date
Eugeniy Paltsev
c77bbc2215 ARC: rework setting of ARC CPU specific compiler options
It's a very rare if at all existing occasion when ARC CPU template
is used as is w/o any changes - in the end it's a beauty and competitive
advantage of ARC cores to be tailored for a particular use-case - and
so it doesn't make a lot of sense to offer template-based "-mcpu" selection.
Given for each and every platform we end-up adding quite a few more flags
it's logical to move "-mcpu" selection to platform's definition as well
which we exactly do here.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-02-12 21:11:12 +03:00
Alexey Brodkin
95f7103f94 ARC: nsim_hs38: Add support of Virtio NET & BLK
Given now nsim_hs38 configuration is usable on QEMU and in QEMU
we have Virtio working perfectly fine the next logical step
is to add support of supported & known to work net & bkl to this
config.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-02-12 20:40:24 +03:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
9a3b4ceb37 common: Move reset_cpu() to the CPU header
Move this function out of common.h and into a relevant header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 14:02:31 -05:00
Simon Glass
5255932f01 common: Move some board functions out of common.h
A number of board function belong in init.h with the others. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:21 -05:00
Simon Glass
36bf446b64 common: Move enable/disable_interrupts out of common.h
Move these two functions into the irq_funcs.h header file. Also move
interrupt_handler_t as this is used by the irq_install_handler() function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:01 -05:00
Simon Glass
9edefc2776 common: Move some cache and MMU functions out of common.h
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:55 -05:00
Simon Glass
62270f4395 common: Move some SMP functions out of common.h
These functions belong in cpu_func.h so move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:14 -05:00
Alexey Brodkin
3f6b4ea225 arc: emsdp: docs: Prefer Degilent over Opella-XD
Back in the day on early board samples built-in Digilent JTAG probe
was not functional so we used externally attached Ashling Opella-XD
probe. But now with production units everything works as expected and
so we anybody may enjoy readily avaialble built-in JTAG probe so
we specify Digilent oprion on MDB's command line example.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-11-01 16:45:40 +03:00
Alexey Brodkin
0da32633ab arc: emsdp/iotdk: Switch to DM_MMC
Somehow EMSDP & IoT DK boards were skipped on ARC boads conversion
to DM MMC. So doing it now.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-11-01 16:45:40 +03:00
Alexey Brodkin
968b98bc27 arc: emsdp: Add more platform-specific compiler options
Even though EM SDP is FPGA-based board and different FPGA
images (known as .bit-files) are awailable for the board still
there's a common subset of options we may rely on for all configs.

These are:
 * Normalizer
 * Swap instructions
 * Simple multiplier
 * Barrel-shifter
 * Floating-point unit
 * Shorter instructions (code density)

This among other improvements allows to compile code with
64-bit divisions, see [1].

[1] https://patchwork.ozlabs.org/patch/1156541/

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
2019-09-03 19:05:34 +03:00
Alexey Brodkin
9ddaf1d516 arc: emsdp: Add initialization of PSRAM
If the "Page Mode" is not enabled on the device,
read operations from PSRAM may result in incorrect data.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-09-03 19:05:34 +03:00
Simon Glass
9eef56dbe3 env: Move env_get_ulong() to env.h
Move env_get_ulong() over to the new header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11 16:43:41 -04:00
Simon Glass
168068fb3d env: Move env_set_ulong() to env.h
Move env_set_ulong() over to the new header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11 16:43:41 -04:00
Eugeniy Paltsev
cc2f7b6c7d ARC: [plat-axs10x]: migrate to DM_MMC
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-18 09:12:38 +03:00
Eugeniy Paltsev
54858311df ARC: [plat-hsdk]: migrate to DM_MMC
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-18 09:12:38 +03:00
Alexey Brodkin
34d117b1fb hsdk: readme: Suggest getting pyelftools with pip
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Suggested-by: Yunir Salimzyanov <yunir@synopsys.com>
2019-03-28 10:50:32 +03:00
Eugeniy Paltsev
4f5e552d95 ARC: AXS10x: drop NAND support
On AXS10x boards we have non-standard NAND controller
which was never really used a lot as there're other much more
convenient [as they are standard & removable] persistent media
like SD-card and USB mass storage.

Moreover after recent changes we face with some NAND controller
runtime issues. So instead of keeping support of yet another
non-standard peripheral we're dropping its support for good.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-03-28 10:42:47 +03:00
Alexey Brodkin
6ef705b157 arc: devboards: Implement checkboard()
This allows us to print nice board name on boot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-12-03 14:26:53 +03:00
Alexey Brodkin
fb9a46a2ab arc: emsdp: Refactor register and bit accesses
Instead of "base + offset" define all registers right away
and access them later via direct defines.

Generate bit masks with "BIT" macro.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-12-03 14:26:45 +03:00
Alexey Brodkin
4e86c7e3cd arc: emsdp: Read real CPU clock value from hardware
We do real CPU clock measurement with help of built-in
counters. Thus we may accommodate different real clock values
that appear in different FPA images instead of relying on
something hard-coded in the .dtb.

And while at it make make SDIO base address define
look similar to others with casting to "(void *)".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-12-03 14:26:35 +03:00
Alexey Brodkin
7f25b72a78 arc: Get rid of board-specific print_cpuinfo()
Since we now do advanced CPU identification in
generic ARC code there's no need to have per-board
hardcoded data.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-12-03 14:26:26 +03:00
Alexey Brodkin
a6b8c29fb8 iot_dk: Add README
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-11-01 23:04:05 +03:00
Alexey Brodkin
adc9b09a23 emdk->emsdp: Rename board
Real marketing name of the board was recently updated so
to accommodate that change renaming the board and all
related to it.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-11-01 23:04:05 +03:00
Alexey Brodkin
9f87d47088 axs10x/emdk/hsdk/iot_dk: Implement board_mmc_getcd()
So now we may detect MMC/SD-card existence and
instead of completely misleading message on missing card:
------------------------>8-----------------------
Loading Environment from FAT... Card did not respond to voltage select!
------------------------>8-----------------------

we now get very clear one:
------------------------>8-----------------------
Loading Environment from FAT... MMC: no card present
------------------------>8-----------------------

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
8a8f32d8ff iot_dk: Save CPU clock value to gd->cpu_clk
Since gd->cpu_clk is a global item we may once populate it from .dtb
ans use it then in other places like for printing CPU info etc.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
031154fe8f iot_dk: Add support of 136 MHz clock
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
7d388add55 iot_dk: Implement board reset
It is done by writing some magic sequence in a special register.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
5b86ca96d0 iot_dk/hsdk: Implement its own print_cpuinfo()
ARC IDENTITY register only encodes major architecture
type and version while for a particular board/silicon we
may know better which template was used and so we may identify
CPU more precise, which exactly we do here.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:41 +03:00
Alexey Brodkin
5396e8b1dd arc: Add support for IoT development kit
The DesignWare ARC IoT Development Kit is a versatile platform
that includes the necessary hardware and software to accelerate
software development and debugging of sensor fusion,
voice recognition and face detection designs.

More information is avaialble here [1] and here [2].

The board is based on real silicon with
ARC EM9D-based Data Fusion IP Subsystem.

It sports a rich set of I/O including
 * DW USB OTG
 * DW MobileStorage (used for micro SD-card)
 * GPIO
 * multiple serial interface including DW APB UART
 * ADC, PWM and eFlash, SRAM and SPI Flash memory
 * Real-Time Clock (RTC)
 * Bluetooth module with worldwide regulatory compliance
   (FCC, IC, CE, ETSI, TELEC)
 * On-board 9-axis sensor (gyro, accelerometer and compass)

Extensible with Arduino, Pmod, mikroBUS connectors and a 2x18
extension header.

One of the most interesting features for developers is built-in
Digilent USB JTAG probe so only micro-USB cable is needed!

[1] https://www.synopsys.com/dw/ipdir.php?ds=arc_iot_development_kit
[2] https://www.synopsys.com/dw/doc.php/ds/cc/iot_dev_kit.pdf

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:57:00 +03:00
Alexey Brodkin
164abd1775 HSDK: Fixes and improvements in README
1. Explained prerequisites for "make bsp-generate" command.
2. Cleaned-up duplicates

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Alexey Brodkin
0552e104a5 ARC: AXS10x/HSDK: Use our own version of mkimage
Since U-Boot tools are being built anyways it's much nicer
to use them instead of relying on some of them bein installed
on build host (which might easily not be the case).

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Eugeniy Paltsev
817cd83435 ARC: AXS10x: add tool and make target to generate bsp
AXS10x boards have preloader that reads SPI flash pages and searches
special image header to fetch and load binary.

Add tool, make target (bsp-generate) to generate
update script and u-boot binary image with header for preloader.

Also add script to default environment to apply updates.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Alexey Brodkin
0921f9294b ARC: EMDK: Add readme
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-06-21 14:55:01 +03:00
Alexey Brodkin
3b4410dde3 ARC: HSDK: Add readme
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-06-15 15:54:43 +03:00
Eugeniy Paltsev
9ddcfef6d4 ARC: HSDK: Add tool and make target to generate bsp
HSDK board has preloader that reads SPI flash pages and searches
for a special image header to fetch and load binary.

Add tool, make target (bsp-generate) to generate
update script and u-boot binary image with header for preloader.

Also add script to default environment to apply updates.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-06-15 15:54:43 +03:00
Alexey Brodkin
2c3f9261c8 ARC: Add support for EM Development Kit board
Synopsys DesignWare ARC EM Development Kit (ARC EMDK) is
an FPGA-based development platform from Synopsys aimed to speed-up
development of software for ARC EM cores and entire subsystems based on
ARC EM like Data Fusion, Secure and Sensor & Control subsystems.

U-Boot is supposed to be used as a primary bootloader on EMDK allowing
users to easily load and start their application from micro-SD card.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Eugeniy Paltsev
ada8affdfe ARC: HSDK: Add platform-specific commands
This patch add support of hsdk platform-specific commands:

hsdk_clock set - set clock from axi_freq, cpu_freq and tun_freq
environment variables/command line arguments

hsdk_clock get - save clock frequencies to axi_freq, cpu_freq
and tun_freq environment variables

hsdk_clock print - show CPU, AXI, DDR and TUNNEL current
clock frequencies.

hsdk_clock print_all - show all currently used clock frequencies.

hsdk_init - setup board HW in one of pre-defined configuration
(hsdk_hs34 / hsdk_hs36 / hsdk_hs36_ccm / hsdk_hs38 /
hsdk_hs38_ccm / hsdk_hs38x2 / hsdk_hs38x3 / hsdk_hs38x4)

hsdk_go - run baremetal application on hsdk configured
by hsdk_init command.

This patch changes default behaviour of 'bootm' command:
now we are able to set number of CPUs to be kicked by setting
'core_mask' environment variable before 'bootm' command run.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:27:56 +03:00
Eugeniy Paltsev
f665c14f04 ARC: bootm: Refactor GO and PREP subcommands implementation
Refactor GO and PREP subcommands implementation for a simpler
override in the boards platform code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-23 15:57:51 +03:00
Eugeniy Paltsev
4e782b5940 ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000Hz
DW SDIO controller has external CIU clock divider controlled via
register in the SDIO IP. Due to its unexpected default value
(we expected it to divide by 1 but in reality it divides by 8)
SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual
is 12500000Hz) and works unstable (see STAR 9001204800).

So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz
by switching from the default divisor value (div-by-8) to the
minimum possible value of the divisor (div-by-2) in HSDK platform
code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Alexey Brodkin
67482f57e6 arc: Add support for HS Development Kit board
ARC HS Development Kit board is a new low-cost
development platform sporting ARC HS38 in real silicon
with nice set of features such as:
 * Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz
 * 4Gb of DDR (we use only lowest 1Gb out of it now)
 * Lots of DesigWare peripherals
 * Different connectivity modules:
     - Synopsys HAPS HT3
     - Arduino-compatible connector
     - MikroBUS

This initial commit supports the following peripherals:
 * UART (DW 8250)
 * Ethernet (DW GMAC)
 * SD/MMC (DW Mobile Storage)
 * USB 1.1 & 2.0

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-06-29 19:34:10 +03:00
Alexey Brodkin
2a5062ca9e axs103: Support slave core kick-start on axs103 v1.1 firmware
In axs103 v1.1 procedure to kick-start slave cores has changed quite a bit
compared t previous implementation.

In particular:
 * We used to have a generic START bit for all cores selected by CORE_SEL
   mask. But now we don't touch CORE_SEL at all because we have a dedicated
   START bit for each core:
     bit 0: Core 0 (master)
     bit 1: Core 1 (slave)
 * Now there's no need to select "manual" mode of core start

Additional challenge for us is how to tell which axs103 firmware we're
dealing with. For now we'll rely on ARC core version which was bumped
from 2.1c to 3.0.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-03-31 22:09:36 +03:00
Alexey Brodkin
0b0db98be7 axs103: Clean-up smp_kick_all_cpus()
* Rely on default pulse polarity value
 * Don't mess with "multicore" value as it doesn't affect execution

In essence we now do a bare minimal stuff:
 1) Select HS38x2_1 with CORE_SEL=1 bits
 2) Select "manual" core start (via CREG) with START_MODE=0
 3) Generate cpu_start pulse with START=1

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-03-31 22:09:36 +03:00
Vlad Zakharov
0c77092e81 arc: dts: separate single axs10x.dts file
We want to use the same device tree blobs in both Linux and U-Boot for
ARC boards.

Earlier device tree sources in U-Boot were very simplified and hadn't been
updated for quite a long period of time.

So this commit is the first step on the road to unified device tree blobs.

First of all we re-organize device tree sources for AXS10X boards.
As AXS101 and AXS103 boards consist of AXS10X motherboard and AXC001 and
AXC003 cpu tiles respectively we add corresponding device tree source
files: axs10x_mb.dtsi for motherboard, axc001.dtsi and axc003.dtsi for
cpu tiles and axs101.dts and axs103.dts to represent actual boards.

Also we delete axs10x.dts as it is no longer used.

One more important change - we add timer device to ARC skeleton device
tree sources as both ARC700 and ARCHS cores contain such timer.
We add core_clk nodes to abilis_tb100, nsim, axc001 and axc003 device tree
sources as it is referenced via phandle from timer node in common
skeleton.dtsi file.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-24 14:47:52 +03:00
Alexey Brodkin
65fcba1251 arc: Rename AXS101 board to more generic AXS10x
As of now we have 2 flavors of ARC SDP boards:
 1) AXS101 - with ARC770 in ASIC
 2) AXS103 - with ARC HS38 in FPGA

Both options share exactly the same base-board and only differ with
CPU-tiles in use. That means all peripherals are the same (they are
implemented in FPGA on the base-board) and so generic board could be
used for both.

While at it:
 * Recreated defconfigs with savedefconfig
 * In include/configs/axs10x.h numerical sizes replaced with
defines from linux/sizes.h for better readability.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-08-05 12:50:33 +03:00
Alexey Brodkin
cc8be222d1 arc: Rename ARCangel4 board to nSIM
ARCangel was one of the main development boards back in the day but
now it's gone and replaced by other boards like ARC SDP.

But we also used to have simulation platform very similar to ARCangel4
in terms of CPU settings as well as basic IO like UART. Even though
ARCangel4 is long gone now we have a replacement for simulation which is
a plain or stand-alone nSIM and Free nSIM.

Note Free nSIM is available for download here:
https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi

And while at it:
 * Finally switch hex numerical values in nsim.h to defines from
   include/linux/sizes.h
 * Add defconfigs with ARC HS38 cores
 * Recreated all defconfigs with savedefconfig

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-08-05 12:50:25 +03:00
Alexey Brodkin
c7d8db66ff board: axs10x: Flush entire cache after programming reset vector
Now when we have support of IOC (IO-Coherency block) cahce operations
on regions are tuned to not be dummy stubs if IOC was found and enabled
in the core. That makes flush_dcache_range() useless for our purposes
here. And since we do need to flush modified reset vector to at least L2
cache (AKA SLC) so other cores will see it via its L1 instruction cache
we're using always functional flush_dcache_all() here.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
2016-06-13 14:38:05 +02:00
Alexey Brodkin
fb2dea60e8 board: axs10x switch serial port and Ethernet to driver model
With this change Synopsys DesignWare SDP board is switched to driver
model for both serial port (serial_dw) and Ethernet (Designware GMAC).

This simplifies include/configs/axs101.h and allows for reuse of Linux's
Device Tree description.

For simplicity Linux's .dts files are not blindly copied but only very
few extracts of them are really used (those that are supported in U-Boot
at the moment).

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-11-18 00:39:22 +03:00
Alexey Brodkin
f6e27ba5b4 board: axs10x - cap max SDIO clock value to bus/2
It turned out with some boards (FPGA firmwares?) and cards combos
current clock settings doesn't work as expected leading to strange
card freezes or corrupted data being read from the card.

Especially this was seen with Transcend 2Gb cards shipped as a part of
ARC SDP:
----------------->8---------------
AXS# mmcinfo
Device: Synopsys Mobile storage
Manufacturer ID: 74
OEM: 4a60
Name: SDC
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: No
Capacity: 1.8 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
AXS# fatload mmc 0
** Unrecognized filesystem type **
----------------->8---------------

With this change that problem is fixed.
Note "Tran Speed" above doesn't match clock value set in DW MMC.
It is max value for card's speed class.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-10-07 18:16:13 +03:00