3 Commits

Author	SHA1	Message	Date
Miao Yan	a3b15a0556	x86: qemu: setup PM IO base for ACPI in southbridge ... Enable ACPI IO space for piix4 (for pc board) and ich9 (for q35 board) Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>	2016-01-28 13:53:30 +08:00
Bin Meng	4be2f42bbc	x86: qemu: Adjust VGA initialization ... As VGA option rom needs to run at C segment, although QEMU PAM emulation seems to only guard E/F segments, for correctness, move VGA initialization after PAM decode C/D/E/F segments. Also since we already tested QEMU targets to differentiate I440FX and Q35 platforms, change to locate the VGA device via hardcoded b.d.f instead of dynamic search for its vendor id & device id pair. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>	2015-06-04 02:39:40 -06:00
Bin Meng	0fcb7acf67	x86: qemu: Enable legacy IDE I/O ports decode ... QEMU always decode legacy IDE I/O ports on PIIX chipset. However Linux ata_piix driver does sanity check to see whether legacy ports decode is turned on. To make Linux ata_piix driver happy, turn on the decode via IDE_TIMING register. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>	2015-06-04 02:39:39 -06:00