Define CONFIG_PHY_MICREL, and
minimize the tx clock delay.
There is an issue with 1000 baseTx mode on early revs
of the SabreLite boards. The center tap pin 9 of the mag RJ45
USB combo was connected to the 3.3 filtered supply. Letting
this pin float solved the problem. Symptoms of the problem
were packets with many extra zeroes tacked on the end, and random
bit flips causing a high rate of CRC errors. 10/100 baseTx worked
fine on all revs. To disable 1000 baseTx for these boards, simply
define the environment variable disable_giga. ie.
setenv disable_giga 1
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Boards may have things they want done before or after normal phy config.
Letting the boards call drv->config allows them more flexibilty.
Boards affected by this change are corenet_ds and mpc8544ds.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
MX35PDK board does not need to print CPU revision and reset cause in board file
because this is printed by common code when CONFIG_DISPLAY_CPUINFO is selected
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Use gpio_direction_input prior to gpio_get_value.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Use gpio_direction_input prior to gpio_get_value.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
This patch adds SPI support for the MX28EVK. Support for
an optionally installed SPI flash is also added. An example
configuration for redundant envrionment from SPI flash is also
added but disabled by default.
This patch has been tested on a MX28EVK Rev. D with an installed
SST25VF032B 32Mbit SPI flash.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
This patch enables USB host support on the MX28EVK board.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Commit 314284b156 has
changed board_mmc_getcd() function prototype, while
mx6qarm2 has still the old one.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
This allows the Linux kernel to use UART1 before pinmux
support is added for UART1
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Since commit 97039ab98 (env_mmc: Allow board code to override the environment address)
mmc_get_env_addr is a weak-aliased function in common/env_mmc.c
The mmc_get_env_addr implementation that exists at
board/freescale/common/sdhc_boot.c is meant to be used only for PowerPC boards,
but currently it is being used for all platforms that have CONFIG_ENV_IS_IN_MMC defined.
Introduce CONFIG_FSL_FIXED_MMC_LOCATION so that the boards that need to use
the mmc_get_env_addr version from board/freescale/common/sdhc_boot.c could activate
this config option on their board file.
This fixes the retrieval of CONFIG_ENV_OFFSET on non-PowerPC boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefano Babic <sbabic@denx.de>
Add the initial support for Freescale i.MX6Q Sabre Lite board
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Eric Nelson <eric.nelson@boundarydevices.com>
Remove 'all' target from Makefile, as this is unused code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Add initial support for Freescale MX28EVK board.
Tested boot via SD card and by loading a kernel via TFTP through
the FEC interface.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Bits 0 and 1 of CCM_CCGR7 are the usboh3 clock enable bits. Enabling this
clock is necessary for the USB download.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
CC: Jason Hui <jason.hui@linaro.org>
Acked-by: Jason Hui <jason.hui@linaro.org>
This enable the network function on the i.mx6q armadillo2
board(arm2), thus we can use tftp to load image from network.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
* 'master' of git://git.denx.de/u-boot-mpc85xx:
fsl_lbc: add printout of LCRR and LBCR to local bus regs
sbc8548: Fix up local bus init to be frequency aware
sbc8548: enable support for hardware SPD errata workaround
sbc8548: relocate fixed ddr init code to ddr.c file
sbc8548: Make enabling SPD RAM configuration work
sbc8548: Fix LBC SDRAM initialization settings
sbc8548: enable ability to boot from alternate flash
sbc8548: relocate 64MB user flash to sane boundary
Revert "SBC8548: fix address mask to allow 64M flash"
MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC
eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM
eXMeritus HWW-1U-1A: Minor environment variable tweaks
* 'master' of git://git.denx.de/u-boot-mpc83xx:
mpc8313erdb: fix mtdparts address
powerpc/83xx/km: add support for 8321 based tuge1 board
powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1
powerpc/83xx/km: remove obsolete defines for tuda1
powerpc/83xx/km: update SDRAM parameters for km8321 boards
mpc8313erdb: Enable GPIO support on the MPC8313E RDB
mpc83xx: Add a GPIO driver for the MPC83XX family
gpio: Replace ARM gpio.h with the common API in include/asm-generic
gpio: Modify common gpio.h to more closely match Linux
These boards were meaning to deploy this value:
#define LCRR_DBYP 0x80000000
but were missing a zero, and hence toggling a bit that
lands in an area marked as reserved in the 8548 reference
manual.
According to the documentation, LCRR_DBYP should be used as:
PLL bypass. This bit should be set when using low bus
clock frequencies if the PLL is unable to lock. When in
PLL bypass mode, incoming data is captured in the middle
of the bus clock cycle. It is recommended that PLL bypass
mode be used at frequencies of 83 MHz or less.
So the impact would most likely be undefined behaviour for
LBC peripherals on boards that were running below 83MHz LBC.
Looking at the actual u-boot code, the missing DBYP bit was
meant to be deployed as follows:
Between 66 and 133, the DLL is enabled with an
override workaround.
In the future, we'll convert all boards to use the symbolic
DBYP constant to avoid these "count the zeros" problems, but
for now, just fix the impacted boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The new API no longer uses the extra cd parameter that was used to store
the card presence state. Instead, this information is returned via the
function's return value. board_mmc_getcd() returns -1 to indicate that
no card-detection mechanism is implemented; 0 indicates that no card is
present and 1 is returned if it was detected that a card is present.
The rationale for this change can be found in the following email
thread:
http://lists.denx.de/pipermail/u-boot/2011-November/110180.html
In summary, the old API was not consistent with the rest of the MMC API
which always passes a struct mmc as the first parameter. Furthermore the
cd parameter was used to mean "card absence" in some implementations and
"card presence" in others.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Jason Liu <jason.hui@linaro.org>
Fix:
mx51evk.c:206:6: error: conflicting types for 'board_ehci_hcd_init'
/u-boot/include/usb/ehci-fsl.h:254:5: note: previous declaration of
'board_ehci_hcd_init' was here
We also fix board_ehci_hcd_init() for mx53loco board.
Building for mx53loco worked since <usb/ehci-fsl.h> is
not included here.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Add the initial support for Freescale i.MX6Q Armadillo2 board
Support: MMC boot from slot 0/1, debug UART(UART4), usdhc.
There is two MMC slots on the boards:
mmc dev 0 -> connect USDHC3 -> the lower slot on the board,
mmc dev 1 -> connect USDHC4 -> the upper slot on the board,
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
* 'master' of git://git.denx.de/u-boot-arm:
davinci: Remove unwanted memsize.c from hawkboard's nand spl build
devkit8000: Move CONFIG_SYS_TEXT_BASE out of bss
da850evm: pass board revision info to kernel
arch/arm/include/asm/arch-omap5/clocks.h: Fix GCC 4.2 warnings
arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix GCC 4.6 warnings
arch/arm/cpu/armv7/omap-common/spl.c: Fix GCC 4.2 warnings
MX35: flea3: changes due to hardware revision B
MX: serial_mxc: cleanup removing nasty #ifdef
M28: Fix OB1 bug in GPIO driver
MXS: Add static annotations to dma driver
apbh_dma: return error value on timeout
Efika: Configure additional regulators for HDMI output
mx5: Correct a warning in clock.c
MC13892: Add REGMODE0 bits definitions
mx51evk: Configure the pins as GPIOs prior to using gpio_get_value
mx53smd: Configure the pins as GPIOs prior to using gpio_get_value
mx53evk: Configure the pins as GPIOs prior to using gpio_get_value
mx53ard: Configure the pins as GPIOs prior to using gpio_get_value
mx53loco: Configure the pins as GPIOs prior to using gpio_get_value
OMAP3: Add SPL_BOARD_INIT hook
AM3517 CraneBoard: Add SPL support
AM3517: Add SPL support
OMAP3: Add SPL support to omap3_evm
OMAP3: Add SPL support to Beagleboard
OMAP3 SPL: Add identify_nand_chip function
OMAP3 SPL: Rework memory initalization and devkit8000 support
OMAP3: Suffix all Micron memory timing parts with their speed
OMAP3: Add optimal SDRC autorefresh control values
omap3: mem: Add MCFG helper macro
OMAP3: Remove get_mem_type prototype
OMAP3: Change mem_ok to clear again after reading back
OMAP3: Add a helper function to set timings in SDRC
OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()
omap3: mem: Comment enable_gpmc_cs_config more
ARM: davici_emac: Fix condition for number of phy detects
arm: printf() is not available in some SPL configurations
arm, davinci: add support for am1808 based enbw_cmc board
arm, davinci: move misc function in arch tree
arm, board/davinci/common/misc.c: Codingstyle cleanup
arm, davinci, da850: add uart1 tx rx pinmux config
arm, davinci: move davinci_rtc struct to hardware.h
arm, davinci: Remove duplication of pinmux configuration code
arm, hawkboard: Use the pinmux configurations defined in the arch tree
arm, da850evm: Use the pinmux configurations defined in the arch tree
arm, da850: Add pinmux configurations to the arch tree
arm, da850evm: Do pinmux configuration for EMAC together with other pinmuxes
arm, hawkboard: Remove obsolete struct pinmux_config i2c_pins
arm, davinci: Move pinmux functions from board to arch tree
arm, arm926ejs: always do cpu critical inits
omap_gpmc: use SOFTECC in SPL if it's enabled
nand_spl_simple: add support for software ECC
AM3517: move AM3517 specific mux defines to generic header
AM35xx: add EMAC support
davinci_emac: hardcode 100Mbps for AM35xx and RMII
davinci_emac: fix for running with dcache enabled
arm926ejs: add noop implementation for dcache ops
davinci_emac: conditionally compile specific PHY support
davinci_emac: use internal addresses in buffer descriptors
davinci_emac: move arch-independent defines to separate header
BeagleBoard: config: Really switch to ttyO2
ARM: davinci_dm6467Tevm: Fix build breakage
ARM: OMAP: Remove STACKSIZE for IRQ and FIQ if unused
ARM: OMAP3: Remove unused define SDRC_R_C_B
ARM: OMAP3: Remove unused define CONFIG_OMAP3430
omap4: fix IO setting
omap4+: streamline CONFIG_SYS_TEXT_BASE and other SDRAM addresses
omap4460: add ES1.1 identification
omap4: emif: fix error in driver
omap: remove I2C from SPL
omap4460: fix TPS initialization
omap: fix cache line size for omap3/omap4 boards
omap4: ttyO2 instead of ttyS2 in default bootargs
omap: Improve PLL parameter calculation tool
start.S: remove omap3 specific code from start.S
armv7: setup vector
armv7: include armv7/cpu.c in SPL build
armv7: disable L2 cache in cleanup_before_linux()
arm, arm926ejs: Fix clear bss loop for zero length bss
PXA: Move colibri_pxa270 to board/toradex/
PXA: Flip colibri_pxa27x to pxa-common.h
PXA: Introduce common configuration header for PXA
PXA: Rename pxa_dram_init to pxa2xx_dram_init
PXA: Squash extern pxa_dram_init()
PXA: Export cpu_is_ and pxa_dram_init functions
PXA: Cleanup Colibri PXA270
PXA: Replace timer driver
PXA: Add cpuinfo display for PXA2xx
PXA: Separate PXA2xx CPU init
PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]X
PXA: Unify vpac270 environment size
PXA: Enable command line editing for vpac270
PXA: Adapt Voipac PXA270 to OneNAND SPL
PXA: Drop Voipac PXA270 OneNAND IPL
PXA: Fixup PXA25x boards after start.S update
PXA: Re-add the Dcache locking as RAM for pxa250
PXA: Rework start.S to be closer to other ARMs
PXA: Drop XM250 board
PXA: Drop PLEB2 board
PXA: Drop CRADLE board
PXA: Drop CERF250 board
Fix regression in SMDK6400
nand: Add common functions to linux/mtd/nand.h
Ethernut 5 board support
net: Armada100: Fix compilation warnings
ARM: remove duplicated code for LaCie boards
ARM: add support for LaCie 2Big Network v2
mvsata: fix ide_preinit for missing disks
netspace_v2: Read Ethernet MAC address from EEPROM
omap3evm: Add support for EFI partitions
part_efi: Fix compile errors
Description of SerDes clock Bank2 setting in p2041 hardware specification
is wrong, the clock map which based on it is wrong either, so fix the
serdes clock map.
wrong setting of SERDES Reference Clocks Bank2:
SW2[5:6] = ON OFF =>100MHz for PCI mode
SW2[5:6] = OFF ON =>125MHz for SGMII mode
right setting of SERDES Reference Clocks Bank2:
SW2[5:6] = OFF OFF =>100MHz for PCI mode
SW2[5:6] = OFF ON =>125MHz for SGMII mode
SW2[5:6] = ON OFF =>156.25MHZ
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Configure the pins as GPIO prior to using gpio_get_value.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
Configure the pins as GPIO prior to using gpio_get_value.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
Fix:
mpc8610hpcd.c: In function 'pci_init_board':
mpc8610hpcd.c:238:15: warning: variable 'pordevsr' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
This adds support for the Freescale COM Express P2020 board. This board
is similar to the P1_P2_RDB, but has some extra (as well as missing)
peripherals.
Unlike all other mpc85xx boards, it uses a watchdog timeout to reset.
Using the HRESET_REQ register does not work.
This board has no NOR flash, and can only be booted via SD or SPI. This
procedure is documented in Freescale Document Number AN3659 "Booting
from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is
provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated
Processor Reference Manual" (section 4.5).
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The P3060QDS is a Freescale reference board for the six-core P3060 SOC.
P3060QDS Board Overview:
Memory subsystem:
- 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
- 128M Bytes NOR flash single-chip memory
- 16M Bytes SPI flash
- 8K Bytes AT24C64 I2C EEPROM for RCW
Ethernet:
- Eight Ethernet controllers (4x1G + 4x1G/2.5G)
- Three VSC8641 PHYs on board (2xRGMII + 1xMII)
- Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
PCIe: Two PCI Express 2.0 controllers/ports
USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
I2C: Four I2C controllers
UART: Supports two dUARTs up to 115200 bps for console
RapidIO: Two RapidIO, sRIO1 and sRIO2
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Configuring for MPC8360EMDS_66_HOST_33 - Board: MPC8360EMDS, Options: CLKIN_66MHZ,PCI,PCI_33M,PQ_MDS_PIB=1
mpc8360emds.c: In function 'board_eth_init':
mpc8360emds.c:178:12: warning: array subscript is above array bounds [-Warray-bounds]
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
LAW entries not needed during SPL phase.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
mpc8569mds.c: In function 'local_bus_init':
mpc8569mds.c:306:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix:
mpc8568mds.c: In function 'local_bus_init':
mpc8568mds.c:150:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]
mpc8568mds.c: In function 'pib_init':
mpc8568mds.c:271:11: warning: variable 'orig_i2c_bus' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix:
mpc8548cds.c: In function 'local_bus_init':
mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]
mpc8548cds.c: In function 'lbc_sdram_init':
mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix:
pixis.c: In function 'strfractoint':
pixis.c:383:6: warning: variable 'intarr_len' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix:
cds_pci_ft.c: In function 'cds_pci_fixup':
cds_pci_ft.c:31:12: warning: variable 'tmp' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For ICS307-02, there is one general expression to generate SYSCLK:
CLK1Frequency = InputFrequency * 2 * (VDW + 8) / ((RDW + 2) * OD)
If we want the required frequency for SYSCLK, we must find one solution
to generate this frequency, this solution includes VDW, RDW and OD.
For OD, there are only eight option value: 10, 2, 8, 4, 5, 7, 3, 6.
For RDW, the range is 1 to 127.
For VDW, the range is 4 to 511.
First, we use one OD, RDW and required SYSCLK to calculate the VDW,
if VDW is in it's range, we will calculate the CLK1Frequency with
the OD, RDW and VDW calculated, and we will check this percent
(CLK1Frequency / required SYSCLK), and the precision is 1/1000.
if the percent is less than 1/1000, we think the CLK1Frequency is we want.
Otherwise, We will continue to calculate it with the next OD and RDW.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>