Commit Graph

10 Commits

Author SHA1 Message Date
Wolfgang Wegner
b0bc8b70ff add Xilinx_abort_fn to Xilinx_Spartan3_Slave_Serial_fns
Currently the hardware was left in an undefined state in case Spartan3
serial load failed. This patch adds Xilinx_abort_fn to give the board
a possibility to clean up in this case.

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
2010-11-30 21:59:21 +01:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Wolfgang Denk
071bc92330 Coding Style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-27 22:48:30 +02:00
Wolfgang Denk
439f6f7ec1 FPGA: fix support for non-Lattice devices
Commit 3b8ac464 "FPGA: add support for downloading Lattice bitstream"
added support for Lattice devices, but failed to add #ifdef's that are
needed when building for non-Lattice devices, which results in build
failures like these:

Configuring for GEN860T board...
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dev_info':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:145: undefined reference to `lattice_info'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dump':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:269: undefined reference to `lattice_dump'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_load':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:233: undefined reference to `lattice_load'
make: *** [u-boot] Error 1

Add the missing code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2010-10-18 21:32:14 +02:00
Stefano Babic
3b8ac464f2 FPGA: add support for downloading Lattice bitstream
The patch adds support to load a Lattice's bitstream
image (called VME file) into a Lattice FPGA. The code
containing the state machine delivered as part of
Lattice's ispVMtools is integrated.

The FPGA is programmed using the JTAG interface. The
board maintainer must provide accessors to drive the
JTAG signals TCK, TMS, TDI and to get the value of the
input signal TDO.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-13 18:09:31 +02:00
Wolfgang Wegner
89083346d0 add block write function to spartan3 slave serial load
Using seperate function calls for each bit-bang of slave serial
load can be painfully slow. This patch adds the possibility to
supply a block write function that loads the complete block of
data in one call (like it can already be done with Altera FPGAs).
On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load
time from around 15 seconds to around 3 seconds

Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
2010-03-24 11:08:43 -05:00
Peter Tyser
6385b28116 fpga: Remove relocation fixups
PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups.  Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:17:56 +02:00
Matthias Fuchs
670cbde8da fpga: Fix Spartan III FPGA booting
This patch does some minor fixing of the Xilinx Spartan III
FPGA boot code:

- Fixed call order of post configuration callback and
  success message printing (result of copy-paste?)
- remove obsolete comment
- minor coding style cleanup

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2009-02-21 22:52:44 +01:00
Matthias Fuchs
3818b67764 fpga: Fix Spartan II FPGA booting
This patch does some minor fixing of the Xilinx Spartan II
FPGA boot code:

- Fixed call order of post configuration callback and
  success message printing (result of copy-paste?)
- relocate post configuration callback only when it
  is implemented
- remove obsolete comment
- minor coding style cleanup

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2009-02-21 22:52:43 +01:00
Jean-Christophe PLAGNIOL-VILLARD
c8aa7dfc18 FPGA: move fpga drivers to drivers/fpga
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-12-05 22:41:33 +01:00