mx25pdk has a SD/MMC slot connected to esdhc1.
Add support for it and allow the environment variables to be saved into SD/MMC.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This patch modifies start.S for the arm1136 to make it
conform to start.S in armv7 architecture, to make it
usable if the SPL framework is used.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Adds support for HDMI, two LVDS panels and one RGB panel to
the SABRE-Lite board.
Displays supported:
HDMI - 1024 x 768 for maximum compatibility
Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480)
Since the ipuv3_fb display driver currently supports only a single display,
this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect
or the I2C touch controller of the LVDS and RGB displays in the priority
listed above.
Setting 'panel' environment variable to one of the names above will
override auto-detection.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
The kernel from Freescale expects that the bootloader passes the board revision.
Read the board revision and pass it via get_board_rev().
Without passing the board revision the kernel does not operate properly as the
initialization of peripherals are different in revA versus revB boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
Clean up mx35 lowlevel_init:
- Indent with tabs.
- Fix comments.
- Use defined values instead of literal constants.
- Use defined macros instead of duplicating code.
- Use macro parameters with default values instead of #define'd configs.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0
register is actually composed of two bit-fields: one pre-divider and one
post-divider. This patch fixes the CCM access macros and the code using them
accordingly.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Define default SoC input clock frequencies for i.MX5/6 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
mx6qsabreauto is a board based on mx6q SoC with the following features:
- 2GB of DDR3
- 2 USB ports
- 1 HDMI output port
- SPI NOR
- 2 LVDS LCD ports
- Gigabit Ethernet
- Camera
- eMMC and SD card slot
- Multichannel Audio
- CAN
- SATA
- NAND
- PCIE
- Video Input
Add very basic support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
mx6qsabresd has a AR8031 Gigabit PHY.
Add support for it.
Also increase CONFIG_SYS_MALLOC_LEN so that FEC buffer allocation does not fail.
Tested on 1Gbp and 100Mbps networks.
Suggested-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
mx6qsabresd is a board based on mx6q SoC with the following features:
- 1GB of DDR3
- 1 USB OTG port
- 1 HDMI output port
- SPI NOR
- LVDS panel
- Gigabit Ethernet
- Camera Connector
- eMMC and SD card slot
- Audio
Add very basic support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
fecmxc_mii_postcall() is specific to the KSZ9021 PHY on m28evk and
should not be used on mx28evk, which has LAN8270 instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG
information.
If this data is not present, the kernel misconfigures the TZIC, which results in
the timer interrupt handler never being called, so the kernel deadlocks while
calibrating its delay.
Suggested-by: Greg Topmiller <Greg.Topmiller@jdsu.com>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Add support for the onboard eSDHC MMC controller. The hardware on the
MPC8308RDB has the following errata:
- ESDHC111: manual asynchronous CMD12 is broken
- DMA is broken (PIO works)
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
[added include fsl_esdhc header to prevent implicit declarations of
fsl_esdhc_mmc_init() and fdt_fixup_esdhc()]
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The SPI pins are routed to header J8 for testing SPI functionality. A
Spansion flash has been wired up and tested on this header.
This patch breaks support for the second TSEC interface, since the GPIO
pin used as a chip select is pinmuxed with some of the TSEC pins.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Recent conversion from mx28_adjust_memory_params to mxs_adjust_memory_params
missed to update mx28evk, which caused the board not to boot.
Apply the conversion so that the board can boot again.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Align the SSP clock speed with oscilator to achieve higher transfer
stability.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().
Since no_snoop was only used on i.MX, get rid of it BTW.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
The DRAM initialization, after SPL has complete, is exactly the same
for all mxs SoCs so we should name it accordinly.
The following boards has been changed:
* apx4devkit
* m28evk
* mx28evk
* sc_sps_1
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
Each i.MX has its own gpio.h, defining the same structure.
The internal GPIO controller has the same layout
(at least for the register used by u-boot) and can be shared.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Matt Sealey <matt@genesi-usa.com>
This allows a watchdog reset to start the ROM's
usb/serial downloader, or boot from an sdcard.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
This gets us rid of duplication of the same file.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
