Commit Graph

2600 Commits

Author SHA1 Message Date
Hans de Goede
c9f8947e66 sunxi: usb-phy: Never power off the usb ports
USB devices are not really designed to get the power bounced off and on
at them. Esp. USB powered harddisks do not like this.

Currently we power off the USB ports both on a "usb reset" and when
booting the kernel, causing the usb-power to bounce off and then back
on again.

This patch removes the powering off calls, fixing the undesirable power
bouncing.

Note this requires some special handling for the OTG port:
1) We must skip the external vbus check if we've already enabled our own
vbus to avoid false positives
2) If on an usb reset we no longer detect that the id-pin is grounded, turn
off vbus as that means an external vbus may be present now

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-08 16:26:19 +02:00
Simon Glass
d1de41d7fa exynos: Add support for spring
Spring is the first ARM-based HP Chromebook 11. It is similar to snow
and it uses the same Samsung Exynos5250 chip. But has some unusual
features. Mainline support for it has lagged snow (both in kernel and
U-Boot). Now that the exynos5 code is common we can support spring just
by adding a device tree and a few lines of configuration.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:17 -06:00
Simon Glass
71db6341c5 exynos: Tidy up CPU frequency display
Line up the display with the line below, e.g.:

	CPU:   Exynos5250 @ 1.7 GHz
	Model: Google Spring
	DRAM:  2 GiB
	MMC:   EXYNOS DWMMC: 0

Also show the speed as GHz where appropriate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:14 -06:00
Simon Glass
a507454b13 exynos: Add support for the DisplayPort hotplug detect
Allow this function to be selected using the pinmux API.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:14 -06:00
Simon Glass
7fb57396e6 exynos: Enable the debug UART in SPL
As a debugging aid, allow UART3 to be used as a debug UART in SPL. This
is a precursor to proper UART support, which requires a substantial
refactor.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:11 -06:00
Paul Kocialkowski
95de1e2f26 usb: musb-new: CONFIG_MUSB prefix replacement with CONFIG_USB_MUSB
USB-related options are usually prefixed with CONFIG_USB and platform-specific
adaptation for the MUSB controller already have a CONFIG_USB_MUSB prefix, so
this switches all MUSB-related options to a CONFIG_USB_MUSB prefix, for
consistency.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-08-05 17:20:34 +02:00
Wang Dongsheng
6f0586e692 armv7/ls102xa: Fix non-boot cpus cannot correctly fall in spin table
Bootrom will put cpus into WFE state when boot cpu release cpus, so
target cpu cannot correctly go to spin state.

Add 'sev' to wakeup non-boot cpu that hold on bootrom space, let target
cpu can fall into u-boot spin table.

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:37 -07:00
Tom Rini
7a1af7a79b Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2015-08-02 07:40:37 -04:00
Peng Fan
a462c34602 imx:mx6ul add dram spl configuration and header file
1. Define two structures mx6ul_iomux_ddr_regs and mx6ul_iomux_grp_regs.
2. Add a new function mx6ul_dram_iocfg to configure dram io.
3. Refactor MMDC1 macro, discard "#ifdef CONFIG_MX6SX". Since
   only mmdc0 channel exists on i.MX6SX/UL, redefine MMDC1 macro support
   runtime check, but not hardcoding #ifdef macros.
4. Introduce mx6ul-ddr.h, which includes the register address for DRAM
   IO configuration.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-08-02 11:05:09 +02:00
Peng Fan
db1c217c85 imx: mx6ul update soc related settings
1.Update WDOG settings.
2.No need to gate/ungate all PFDs for i.MX6UL.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2015-08-02 11:05:08 +02:00
Peng Fan
a2c74aaf51 imx: mx6ul select SYS_L2CACHE_OFF
i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6
chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled.
There is on specific switch for on/off L2 Cache, so default select
SYS_L2CACHE_OFF.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-08-02 11:05:08 +02:00
Peng Fan
43cb127b75 imx:mx6ul add clock support
1. Add enet, uart, i2c, ipg clock support for i.MX6UL.
2. Correct get_periph_clk, it should account for
   MXC_CCM_CBCDR_PERIPH_CLK2_PODF_MASK.
3. Refactor get_mmdc_ch0_clk to make all i.MX6 share one function,
   but not use 'ifdef'.
4. Use CONFIG_FSL_QSPI for enable_qspi_clk, but not #ifdef CONFIG_MX6SX.
5. Use CONFIG_PCIE_IMX for pcie clock settings, use CONFIG_CMD_SATA for
   sata clock settings. In this way, we not need "#if defined(CONFIG_MX6Q)
   || defined....", only need one CONFIG_PCIE_IMX in header file.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-08-02 11:05:07 +02:00
Nikita Kiryanov
09a096992b arm: mx6: kconfig: don't select CPU_V7 per board
CPU_V7 is already selected by ARCH_MX6, so no point in selecting it again
by boards that depend on ARCH_MX6.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2015-08-02 10:51:38 +02:00
Nikita Kiryanov
81f5598b2d arm: mx6: cm-fx6: move cm-fx6 target under ARCH_MX6
cm-fx6 is an MX6 based board, and the menuconfig hierarchy should
reflect that. Make TARGET_CM_FX6 dependant on ARCH_MX6.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2015-08-02 10:51:38 +02:00
Peng Fan
8d7794615c imx: mx6qp Enable PRG clock for IPU
The i.MX6DQP has a PRG module, need to enable its clock for using IPU.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Brown Oliver <B37094@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-08-02 10:46:34 +02:00
Ye.Li
ec0f9530b1 imx: mx6: hab : Remove the cache issue workaroud in hab for i.MX6QP
Since the i.MX6QP has fixed the issue in boot ROM, so remove the workaround
for i.MX6QP.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-08-02 10:45:41 +02:00
Peng Fan
e1c2d68b39 imx: mx6: ccm: Change the clock settings for i.MX6QP
Since i.MX6QP changes some CCM registers, so modify the clocks settings to
follow the hardware changes.

In c files, use runtime check and discard #ifdef.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-08-02 10:43:45 +02:00
Peng Fan
d0acd99334 imx: add cpu type for i.MX6QP/DP
Add cpu type for i.MX6QP/DP.

This patch also fix is_mx6dqp(), since get_cpu_rev can return MXC_CPU_MX6QP
and MXC_CPU_MX6DP, we should use:
(is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)).

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-08-02 10:42:48 +02:00
Siva Durga Prasad Paladugu
dad17fd510 armv8: caches: Added routine to set non cacheable region
Added routine mmu_set_region_dcache_behaviour() to set a
particular region as non cacheable.

Define dummy routine for mmu_set_region_dcache_behaviour()
to handle incase of dcache off.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2015-07-31 01:38:12 +02:00
Tom Rini
cc35734358 Merge branch 'master' of git://git.denx.de/u-boot-tegra 2015-07-29 18:58:39 -04:00
Thierry Reding
8b19dff579 armv8/cache: Fix page table creation
While generating the page tables, a running integer index is shifted by
SECTION_SHIFT (29) and causes overflow for any integer bigger than 7.
The page tables therefore alias to the same 8 sections and cause U-Boot
to hang once the MMU is enabled.

Fix this by making the index a 64-bit unsigned integer and so avoid the
overflow.

swarren notes: currently "i" ranges from 0..8191 on all ARM64 boards, and
"j" varies depending on RAM size; from 4 to 11 for a board with 4GB at
physical address 2GB, as some Tegra boards have.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-28 10:30:17 -07:00
Tom Rini
66d10c18bf Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze 2015-07-28 11:31:21 -04:00
Michal Simek
225bf9aa65 zynqmp: Add support for IP detection via SLCR
SLCR can be used for IP configuration setting.
Add SLCR skeleton to enable run time checking.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:20 +02:00
Michal Simek
fb101168fa zynqmp: mp: Simplify set_r5_start handling
Pass directly boot_addr which is LOVEC (0) or HIVEC (0xffff0000).
No reason to use magic values 0 and 1.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:20 +02:00
Siva Durga Prasad Paladugu
0b54a9dd09 zynqmp: Define ep config for ZynqMP
Define a new config "zynqmp_ep" for ZynqMP instead
of xilinx_zynqmp. This defconfig supports all emulation
platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP
to ARCH_ZYNQMP.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:19 +02:00
Siva Durga Prasad Paladugu
7558000721 zynqmp: Kconfig: Move zynqmp Kconfig
Move the zynqmp Kconfig from board to arch
as there may be different boards under same
architecture.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:19 +02:00
Antonio Borneo
fffde77e13 stm32f4: add cpu clock option for 180 MHz
While most stm32f4 run at 168 MHz, stm32f429 can work till 180 MHz.
Add option to select 180 MHz through macro CONFIG_SYS_CLK_FREQ.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
To: Albert Aribaud <albert.u.boot@aribaud.net>
To: Tom Rini <trini@konsulko.com>
To: Kamil Lulko <rev13@wp.pl>
Cc: u-boot@lists.denx.de
2015-07-27 15:02:14 -04:00
Masahiro Yamada
b0c8f4a797 Kill unneeded #include <linux/kconfig.h>
Because the top-level Makefile forces all the source files
to include include/linux/kconfig.h (see the UBOOTINCLUDE define),
these includes are redundant.

By the way, there are exceptions for the statement above; host
programs.  In fact, host tools in U-Boot depend on a particular
board configuration, although I think they should not.  So, some
files still include <linux/config.h> to work around build errors
on host tools.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-27 15:02:12 -04:00
Paul Kocialkowski
bafa6f591b am33xx: Unused get_board_rev function removal
All am33xx device tree are using device-tree, so get_board_rev is never actually
called. Thus, we can get rid of it to make the code easier to maintain.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-07-27 15:02:10 -04:00
Paul Kocialkowski
fb9006c3a5 omap3: CONFIG_REVISION_TAG ifdef check for get_board_rev
Despite being defined with __weak, this declaration of get_board_rev will
conflict with the fallback one when ONFIG_REVISION_TAG is not defined.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-07-27 15:02:10 -04:00
Paul Kocialkowski
d1a04b32f4 omap5: Definitions for SYS_BOOT-based fallback boot device selection
This introduces code to read the value of the SYS_BOOT pins on the OMAP5, as
well as the memory-preferred scheme for the interpretation of each value.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-07-27 15:02:09 -04:00
Paul Kocialkowski
94fc751d8a omap4: Definitions for SYS_BOOT-based fallback boot device selection
This introduces code to read the value of the SYS_BOOT pins on the OMAP4, as
well as the memory-preferred scheme for the interpretation of each value.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-07-27 15:02:08 -04:00
Paul Kocialkowski
cfac375616 omap3: Definitions for SYS_BOOT-based fallback boot device selection
This introduces code to read the value of the SYS_BOOT pins on the OMAP3, as
well as the memory-preferred scheme for the interpretation of each value.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-07-27 15:02:07 -04:00
Paul Kocialkowski
ed19bdaea3 omap-common: SYS_BOOT-based fallback boot device selection for peripheral boot
OMAP devices might boot from peripheral devices, such as UART or USB.
When that happens, the U-Boot SPL tries to boot the next stage (complete U-Boot)
from that peripheral device, but in most cases, this is not a valid boot device.

This introduces a fallback option that reads the SYS_BOOT pins, that are used by
the bootrom to determine which device to boot from. It is intended for the
SYS_BOOT value to be interpreted in the memory-preferred scheme, so that the
U-Boot SPL can load the next stage from a valid location.

Practically, this options allows loading the U-Boot SPL through USB and have it
load the next stage according to the memory device selected by SYS_BOOT instead
of stalling.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-07-27 15:02:06 -04:00
Paul Kocialkowski
df844772f7 omap-common: Boot device define instead of hardcoded value
Now that SPL boot devices are clearly defined, we can use BOOT_DEVICE_QSPI_4
instead of a hardcoded value.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-07-27 15:02:05 -04:00
Paul Kocialkowski
60c7c30aa0 omap-common: Common boot code OMAP3 support and cleanup
This introduces OMAP3 support for the common omap boot code, as well as a
major cleanup of the common omap boot code.

First, the omap_boot_parameters structure becomes platform-specific, since its
definition differs a bit across omap platforms. The offsets are removed as well
since it is U-Boot's coding style to use structures for mapping such kind of
data (in the sense that it is similar to registers). It is correct to assume
that romcode structure encoding is the same as U-Boot, given the description
of these structures in the TRMs.

The original address provided by the bootrom is passed to the U-Boot binary
instead of a duplicate of the structure stored in global data. This allows to
have only the relevant (boot device and mode) information stored in global data.
It is also expected that the address where the bootrom stores that information
is not overridden by the U-Boot SPL or U-Boot.

The save_omap_boot_params is expected to handle all special cases where the data
provided by the bootrom cannot be used as-is, so that spl_boot_device and
spl_boot_mode only return the data from global data.

All of this is only relevant when the U-Boot SPL is used. In cases it is not,
save_boot_params should fallback to its weak (or board-specific) definition.
save_omap_boot_params should not be called in that context either.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-07-27 15:02:03 -04:00
Tom Rini
26473945ad Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2015-07-25 09:04:18 -04:00
Hans de Goede
9ecce9707b sunxi: musb: Stop treating not having a vbus-det gpio as an error
On some boards the otg is wired up in host-only mode in this case we
have no vbus-det gpio.

Stop logging an error from sunxi_usb_phy_vbus_detect() in this case, and
stop treating sunxi_usb_phy_vbus_detect() returning a negative errno, as
if a charger is plugged into the otg port.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
48c06c98ec sunxi: usb-phy: Add support for reading otg id pin value
Add support for reading the id pin value of the otg connector to the usb
phy code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:54 +02:00
Tom Rini
6f4e050639 Merge git://git.denx.de/u-boot-usb 2015-07-24 16:39:56 -04:00
Daniel Kochmański
a151403fd2 sunxi: spl: Detect at runtime where SPL was read from
Make possible using a single `u-boot-sunxi-with-spl.bin` binary for both NAND
memory and SD card. Detection where SPL was read from is implemented in
`spl_boot_device`.

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
CC: Roy Spliet <r.spliet@ultimaker.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Some small coding style fixes]
Acked-by: Hans De Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-24 16:17:08 +02:00
Paul Kocialkowski
17da3c0c8c usb: Fastboot function config for better consistency with other functions
USB download gadget functions such as thor and dfu have a separate config option
for the USB gadget part of the code, independent from the command part.
This switches the fastboot USB gadget to the same scheme, for better
consistency.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
2015-07-22 08:57:53 +02:00
Simon Glass
4eae498e68 dm: arm: Put driver model I2C drivers before legacy ones
Driver-model I2C drivers can be picked up by the linker script rule for
legacy drivers. Change the order to avoid this.

We could make the legacy code depend on !CONFIG_DM_I2C but that is not
necessary and it is good to keep conditions to a minimum.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:21 -06:00
Simon Glass
fa78e0a371 dm: Reduce SPL device tree size
The SPL device tree size must be minimised to save memory. Only include
properties that are needed by SPL - this is determined by the presence
of the "u-boot,dm-pre-reloc" property. Also remove a predefined list of
unused properties from the nodes that remain.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:21 -06:00
Zhichun Hua
db14f11dfe armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.
When final MMU table is setup in DDR, TCR attributes must match
those of the memroy for cacheability and shareability.

Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:40 -07:00
Haikun Wang
b0e209dc63 armv8/ls2085a: Enable DSPI get input clk form 'mxc_get_clock'
Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:39 -07:00
Wang Dongsheng
340848b185 arm/ls102xa: Add PSCI support for ls102xa
Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform.

Tested on LS1021AQDS, LS1021ATWR.
Test CPU hotplug times: 60K
Test kernel boot times: 1.2K

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:38 -07:00
Wang Dongsheng
972af2ab51 ARMv7: Factor out reusable timer_wait from sunxi/psci_sun7i.S
timer_wait is moved from sunxi/psci_sun7i.S, and it can be converted
completely into a reusable armv7 generic timer. LS1021A will use it
as well.

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:38 -07:00
Alison Wang
49a5e42a78 arm: ls1021a: Remove the inappropriate use of the function 'sprintf'
As the function 'sprintf' does not check buffer boundaries but outputs
to the buffer 'enet' of fixed size (16), this patch removes the function
'sprintf', and uses 'strcpy' instead. It will assign the character
arrays 'enet' and 'phy' the corresponding character strings.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:38 -07:00
Stuart Yoder
70e52d2115 armv8/fsl-lsch3: device tree fixups for PCI stream IDs
This patch adds the infrastructure to update device
tree nodes to convey SMMU stream IDs in the device
tree.  Fixups are implemented for PCI controllers
initially.

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00