Commit Graph

8801 Commits

Author SHA1 Message Date
Kumar Gala
aaf38ec306 ppc/85xx: Clean up p2020ds PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:34 -05:00
Kumar Gala
2350cdb50e ppc/85xx: Clean up p1_p2_rdb PCI setup
General code cleanup to use in/out IO accessors as well as making
the code that prints out info sane between board and generic fsl pci
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:34 -05:00
Kumar Gala
276e3f2094 ppc/85xx: Simplify the top makefile for P1_P2_RDB boards
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:34 -05:00
Kumar Gala
2ca16b3309 ppc/85xx: Simplify the top makefile for 36-bit config for P2020DS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:34 -05:00
Kumar Gala
0a83c73c95 ppc/85xx: Simplify the top makefile for 36-bit config for MPC8572DS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:33 -05:00
Mingkai Hu
886fadd88a ppc/85xx: simplify the top makefile for 36-bit config for mpc8536ds
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:33 -05:00
Kumar Gala
68f9c1e754 ppc/85xx: Fix LCRR_CLKDIV defines
For some reason the CLKDIV field varies between SoC in how it interprets
the bit values.

All 83xx and early (e500v1) PQ3 devices support:
 clk/2: CLKDIV = 2
 clk/4: CLKDIV = 4
 clk/8: CLKDIV = 8

Newer PQ3 (e500v2) and MPC86xx support:
 clk/4: CLKDIV = 2
 clk/8: CLKDIV = 4
 clk/16: CLKDIV = 8

Ensure that the MPC86xx and MPC85xx still get the same behavior and make
the defines reflect their logical view (not the value of the field).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:33 -05:00
Peter Tyser
d4b5d60d2a MAKEALL: Use POSIX math
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:33 -05:00
Peter Tyser
e6fb20a939 MAKEALL: Add summary information
This change adds some basic summary information to the MAKEALL script.
The summary information includes how many boards were compiled, how many
boards had compile warnings or errors, and which specific boards had
compile warnings or errors.

This information is useful when doing compile testing to quickly
determine which boards are broken.

As a side benefit, no empty $BOARD.ERR files are generated by MAKEALL.
Previously, each board had a corresponding $BOARD.ERR file, even if the
board compiled cleanly.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:33 -05:00
Eric Millbrandt
bd4bca87f1 galaxy5200: enable version environment variable
Add version environment variable configuration to the galaxy5200
board header file.

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>

Edited commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:32 -05:00
Werner Pfister
152d99f004 digsy_mtc: Add TCR register value for RTC (DS1339)
Signed-off-by: Werner Pfister <werner.pfister@intercontrol.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-10-03 09:04:32 -05:00
Werner Pfister
6b0b181afd rtc/ds1337.c: Allow to set TCR register
This is needed to correctly start the charging of an attached capacitor
or battery.

Signed-off-by: Werner Pfister <werner.pfister@intercontrol.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-10-03 09:04:32 -05:00
Simon Kagstrom
3998c62df0 ubifs: Add support for looking up directory and relative symlinks
This patch adds support for resolving symlinks to directories as well as
relative symlinks. Symlinks are now always resolved during file lookup,
so the load stage no longer needs to special-case them.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:32 -05:00
Rupjyoti Sarmah
9efeadc06f ppc4xx: Fix PCIE PLL lock on 440SPe Yucca board
u-boot reports a PCIE PLL lock error at boot time on Yucca board, and
left PCIe nonfunctional. This is fixed by making u-boot function
ppc4xx_init_pcie() to wait 300 uS after negating reset before the
first check of the PLL lock.

Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:32 -05:00
Dirk Eibach
6d7e3229bb ppc4xx: Make DDR2 timing for intip more robust
DDR2 timing for intip was on the edge for some of the available chips
for this board. Now it is verfied to work with all of them.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:32 -05:00
Wolfgang Denk
7893d47194 board/linkstation/ide.c: Fix compile warning
Fix warning: ide.c:60: warning: dereferencing type-punned pointer will
break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Guennadi Liakhovetski <lg@denx.de>
2009-10-03 09:04:31 -05:00
Peter Tyser
81e60235bd ppc: Clean up calling of phy_reset() during init
Remove board-specific #ifdefs for calling phy_reset() during
initializtion

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:31 -05:00
Peter Tyser
b3ab9dfd49 ppc: Clean up calling of misc_init_r() during init
Remove board-specific #ifdefs for calling misc_init_r() during
initializtion

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-10-03 09:04:31 -05:00
Peter Tyser
61c83b7bd2 Remove deprecated 'autoscr' command/variables
The more standard 'source' command provides identical functionality to
the autoscr command.

Environment variable names/values on the MVBC_P, MVBML7, kmeter1,
mgcoge, and km8xx boards are updated to no longer refernce 'autoscr'.

The 'autoscript' and 'autoscript_uname' environment variables are
also removed.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Heiko Schocher <hs@denx.de>
2009-10-03 09:04:31 -05:00
Paul Gibson
6098527186 mpc512x. Micron nand flash needs a reset before a read command is issued.
Micron nand flash needs a reset before a read command is issued.
The current mpc5121_nfc driver ignores the reset command.
2009-10-03 09:04:31 -05:00
Marcel Ziswiler
86f6fc330d FDT: remove obsolete OF_CPU and OF_SOC macros.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2009-10-03 09:04:30 -05:00
Sandeep Paulraj
dcefd82cbc TI: DaVinci DM365: Minor config cleanup
The DM365 config was using the 'CONFIG_CMD_SAVEENV' flag.
This is already included when we include the
config_cmd_default.h header file. So this flag is removed.
Also another flag to enable NAND functions was being
enabled incorrectly.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-03 09:04:30 -05:00
Sandeep Paulraj
745047f534 TI DaVinci DM365: Removing header file which does not exist
The DaVinci DM365 EVM board specific code was including a header file
which does not exist. So removing this header file.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-03 09:04:30 -05:00
Sandeep Paulraj
b741868f04 TI DaVinci: DM355: Config Cleanup and Update
This patch does the following
1) Enables the NAND driver which is now available.
2) Enables the 'CONFIG_MTD_DEVICE' as without this the
compilation will fail
3) We now have a safe place to store environment and defines
an offset where this can be stored. This offset value is such that it is after
the location where U-Boot is flashed using TI flash utilities.
4) Enables Bootdelay
5) Increases malloc() arena size. Manufacturers are coming out with
NAND with large blocks sizes of upto 1 MiB. It has been noticed that
as the block size of the NAND used is increased, if this particular
value is not increased, the NAND driver will output out of memory
errors.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-03 09:04:30 -05:00
Wolfgang Denk
d4a1561a84 board/flagadm/flash.c: fix compile warning
Fix warning: flash.c:531: warning: dereferencing type-punned pointer
will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kri Davsson <kd@flaga.is>
2009-10-03 09:04:30 -05:00
Simon Kagstrom
ef6061e49b Correct ffs/fls regression for PowerPC etc
Commits

  02f99901ed
  52d61227b6

introduced a regression where platform-specific ffs/fls implementations
were defined away. This patch corrects that by using PLATFORM_xxx
instead of the name itself.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:30 -05:00
Stefan Roese
012f51e7c1 ppc4xx: Consolidate get_OPB_freq()
All 4xx variants had their own, mostly identical get_OPB_freq()
function. Some variants even only had the OPB frequency calculated
in this routine and not supplied the sys_info.freqOPB variable
correctly (e.g. 405EZ). This resulted in incorrect OPB values passed
via the FDT to Linux.

This patch now removes all those copies and only uses one function
for all 4xx variants (except for IOP480 which doesn't have an OPB).

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:29 -05:00
Stefan Roese
dc69d41571 ppc4xx: Enable commands for FDT enabled Linux booting on AMCC Acadia
Acadia still used the "old" arch/ppc bootm commands for booting
Linux images without FDT. This patch now enables these fdt-aware
boot commands for Acadia as well.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:29 -05:00
Stefan Roese
bda4dece03 ppc4xx: Fix 405EZ uart base baud calculation
With this fix, Linux correctly configures the baudrate when booting
with FDT passed from U-Boot to Linux.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:29 -05:00
Kumar Gala
f8d7b56e00 ppc/85xx: Disable all async interrupt sources when we boot
We should make sure to clear MSR[ME, CE, DE] when we boot an OS image
since we have changed the exception vectors and the OSes vectors might
not be setup we should avoid async interrupts at all costs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:29 -05:00
Kumar Gala
002ebefddc ppc/85xx: Split out cpu_init_early into its own file for NAND_SPL
By pulling out cpu_init_early we can build just it and not all of
cpu_init for NAND_SPL.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:29 -05:00
Kumar Gala
168f7cfe56 ppc/85xx: Change cpu_init_early_f so we can use with NAND SPL
Use write_tlb and don't use memset so we can use the same code for
cpu_init_early_f between NAND SPL and not.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Mingkai Hu
a87426e6dc NAND boot: change NAND loader's relocate SP to CONFIG param
So that we can set the NAND loader's relocate stack pointer
to the value other than the relocate address + 0x10000.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Mingkai Hu
9f3243612c ppc/85xx: add boot from NAND/eSDHC/eSPI support
The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch
implements these three bootup methods in a unified way - all of these
use the general cpu/mpc85xx/start.S, and load the main image to L2SRAM
which lets us use the SPD to initialize the SDRAM.

For all three bootup methods, the bootup process can be divided into two
stages: the first stage will initialize the corresponding controller,
configure the L2SRAM, then copy the second stage image to L2SRAM and
jump to it. The second stage image is just like the general U-Boot image
to configure all the hardware and boot up to U-Boot command line.

When boot from NAND, the eLBC controller will first load the first stage
image to internal 4K RAM buffer because it's also stored on the NAND
flash. The first stage image, also call 4K NAND loader, will initialize
the L2SRAM, load the second stage image to L2SRAM and jump to it. The 4K
NAND loader's code comes from the corresponding nand_spl directory, along
with the code twisted by CONFIG_NAND_SPL.

When boot from eSDHC/eSPI, there's no such a first stage image because
the CPU ROM code does the same work. It will initialize the L2SRAM
according to the config addr/word pairs on the fixed address and
initialize the eSDHC/eSPI controller, then load the second stage image
to L2SRAM and jump to it.

The macro CONFIG_SYS_RAMBOOT is used to control the code to produce the
second stage image for all different bootup methods. It's set in the
board config file when one of the bootup methods above is selected.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Kumar Gala
8d82308305 ppc/85xx: Move code around to prep for NAND_SPL
If we move some of the functions in tlb.c around we need less
ifdefs.  The first stage loader just needs invalidate_tlb and
init_tlbs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Kumar Gala
b855dc47de ppc/85xx: Repack tlb_table to save space
We can pack the initial tlb_table in MAS register format and use
write_tlb to set things up.  This savings can be helpful for NAND
style first stage boot loaders.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Kumar Gala
ccea800346 ppc/85xx: Introduce low level write_tlb function
Factor out the code we use to actually write a tlb entry.

set_tlb is a logical view of the TLB while write_tlb is a low level
matching the MAS registers.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Roy Zang
0fb37e5733 ppc/85xx: Enable usb ehci support for p2020ds board
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:27 -05:00
Kumar Gala
6690dcc173 ppc/8xxx: Misc DDR related fixes
* Fix setting of ESDMODE (MR1) register - the bit shifting was wrong
* Fix the format string to match size in a debug print

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:27 -05:00
Scott Wood
f761439418 ppc/85xx: Remove some bogus code from external interrupt handler.
Skipping the interrupted instruction will accomplish nothing other
than turning a spurious interrupt into a crash.

External interrupts are not machine checks, so don't count them as such.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-10-03 09:04:27 -05:00
Scott Wood
eea886da9a ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.
Its reset value is random, and we sometimes read uninitialized TLB
arrays.  Make sure that we don't retain MAS8 from reading such an entry
if the VF bit in MAS8 is set, attempts to use the mapping will trap.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-10-03 09:04:27 -05:00
Scott Wood
3477bda1f5 ppc/85xx: Don't enable interrupts before we're ready
We cannot handle any exceptions while running in AS1, as the exceptions
will transition back to AS0 without a valid mapping.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-10-03 09:04:27 -05:00
Marcel Ziswiler
fd5a6c07c9 mpc8260: remove Ethernet node fixup to use generic FDT code.
Remove Ethernet node fixup from mgcoge and muas3001 boards and modify its
configs for the common mpc8260 code to use generic Ethernet fixup.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Tested-by: Heiko Schocher <hs@denx.de>
2009-10-03 09:04:26 -05:00
Mike Frysinger
c73fdc2f5d tools/netconsole: use ncb automatically if available
The standard netcat, while ubiquitous, doesn't handle broadcast udp packets
properly.  The local ncb util does however.  So if ncb can be located in
the standard locations, automatically use that instead.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:26 -05:00
Mike Frysinger
9914be9dee tools/netconsole: make a bit more robust
The netcat utility likes to exit when it receives an empty packet (as it
thinks this means EOF).  This can easily occur when working with command
line editing as this behavior will be triggered when using backspace.  Or
with tabs and command line completion.  So create two netcat processes -
one to only listen (and put it into a loop), and one to do the sending.
Once the user quits the transmitting netcat, the listening one will be
killed automatically.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:26 -05:00
Simon Kagstrom
85c735f9a5 arm: Define test_and_set_bit and test_and_clear bit for ARM
Needed for (e.g.) ubifs support to work.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-03 09:04:26 -05:00
Simon Kagstrom
c1d1bfa583 Define ffs/fls for all architectures
UBIFS requires fls(), which is not defined for arm (and some other
architectures) and this patch adds it. The implementation is taken from
Linux and is generic. ffs() is also defined for those that miss it.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-03 09:04:26 -05:00
Simon Kagstrom
f83ab09566 arm: Make arm bitops endianness-independent
Bring over the bitop implementations from the Linux
include/asm-generic/bitops/non-atomic.h to provide
endianness-independence.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-03 09:04:26 -05:00
Simon Kagstrom
ab32ffa1fd Move __set/clear_bit from ubifs.h to bitops.h
__set_bit and __clear_bit are defined in ubifs.h as well as in
asm/include/bitops.h for some architectures. This patch moves
the generic implementation to include/linux/bitops.h and uses
that unless it's defined by the architecture.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-03 09:04:25 -05:00
Mike Frysinger
c0072e6cbe standalone: convert to kbuild style
Clean up the arch/cpu/board/config checks as well as redundant setting of
srec/bin variables by using the kbuild VAR-$(...) style.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:25 -05:00