Commit Graph

29352 Commits

Author SHA1 Message Date
Stefan Agner
55765b1842 mtd: vf610_nfc: specify transfer size before each transfer
Testing showed, that commands like STATUS made the buffer dirty
when executed with NFC_SECSZ set to the page size. It looks
like the controller transfers bogus data when this register
is configured. When setting it to 0, the buffer does not get
altered while the status command still seems to work flawless.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-03-30 23:35:27 -05:00
Stefan Agner
7653fc288a mtd: vf610_nfc: mark page as dirty on block erase
The driver tries to re-use the page buffer by storing the page
number of the current page in the buffer. The page is only read
if the requested page number is not currently in the buffer. When
a block is erased, the page number is marked as invalid if the
erased page equals the one currently in the cache. However, since
a erase block consists of multiple pages, also other page numbers
could be affected.

The commands to reproduce this issue (on a written page):
> nand dump 0x800
> nand erase 0x0 0x20000
> nand dump 0x800

The second nand dump command returns the data from the buffer,
while in fact the page is erased (0xff).

Avoid the hassle to calculate whether the page is affected or not,
but set the page buffer unconditionally to invalid instead.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-03-30 23:33:42 -05:00
Peter Tyser
004a1fdb45 nand: yaffs: Remove the "nand write.yaffs" command
This command is only enabled by one board, complicates the NAND code,
and doesn't appear to have been functioning properly for several
years.  If there are no bad blocks in the NAND region being written
nand_write_skip_bad() will take the shortcut of calling nand_write()
which bypasses the special yaffs handling.  This causes invalid YAFFS
data to be written. See
http://lists.denx.de/pipermail/u-boot/2011-September/102830.html for
an example and a potential workaround.

U-Boot still retains the ability to mount and access YAFFS partitions
via CONFIG_YAFFS2.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2015-03-30 23:24:39 -05:00
Peter Tyser
073adf987e nand: Remove CONFIG_MTD_NAND_VERIFY_WRITE
The CONFIG_MTD_NAND_VERIFY_WRITE has been removed from Linux for some
time and a more generic method of NAND verification now exists in U-Boot.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-03-30 23:24:39 -05:00
Peter Tyser
9ac71f112e dfu: nand: Verify writes
Previously NAND writes were not verified and could fail silently.  Add
a verification step after all writes to NAND.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-03-30 23:24:38 -05:00
Peter Tyser
6b94f118a2 cmd_nand: Verify writes to NAND
Previously NAND writes were only verified when CONFIG_MTD_NAND_VERIFY_WRITE
was defined.  On boards without this define writes could fail silently.
Boards with CONFIG_MTD_NAND_VERIFY_WRITE could prematurely report
failures which ECC could correct.

Add a verification step after all "nand write[.x]" commands to ensure the
writes were successful.  The verification uses ECC for for "normal"
writes, but does not for raw and yaffs writes.  Some test cases which
inject fake bad bits on a 2K page flash are below.

Test cases with CONFIG_MTD_NAND_VERIFY_WRITE defined:
  Example of an ECC write which previously failed when
  CONFIG_MTD_NAND_VERIFY_WRITE was defined, but now succeeds because ECC
  is used during verification:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10020 0xfe 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000020 0x01 1
      nand write 0x1000000 0x800 0x1800

Test cases without CONFIG_MTD_NAND_VERIFY_WRITE defined:
  Example of an ECC write which previously silently failed:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10020 0x00 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000020 0xff 1
      nand write 0x1000000 0x800 0x1800

  Example of a raw write which previously failed silently due to stuck
  data bit, but now errors out:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10020 0xfe 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000020 0x01 1
      nand write.raw 0x1000000 0x800 3

  Example of a raw write which previously failed silently due to stuck OOB
  bit, but now errors out:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10810 0xfe 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000810 0x01 1
      nand write.raw 0x1000000 0x800 3

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-03-30 23:24:38 -05:00
Peter Tyser
59b5a2ad83 nand: Add verification functions
Add nand_verify() and nand_verify_page_oob().  nand_verify() verifies
NAND contents against an arbitrarily sized buffer using ECC while
nand_verify_page_oob() verifies a NAND page's contents and OOB.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-03-30 23:24:38 -05:00
Peter Tyser
800772a1a6 nand: Remove unused read/write structures
The use of the nand_write_options and nand_read_options structures were
removed in commit dfbf617ff0.  Remove the
now-unused structures too.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2015-03-30 23:17:16 -05:00
Peter Tyser
aff092ed13 nand: Remove unused CONFIG_MTD_NAND_ECC_JFFS2 option
This option was removed along with legacy NAND support in
be33b046b5.  Clean up some remnants.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2015-03-30 23:16:54 -05:00
Luca Ellero
88a2cbb2ae mtd: nand: mxs: fix PIO_WORDs in mxs_nand_write_buf()
There is only one pio_word in this DMA transaction so data field must be 1.

Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
2015-03-30 22:25:54 -05:00
Luca Ellero
5263a02e8b mtd: nand: mxs: fix PIO_WORDs in mxs_nand_read_buf()
There is only one pio_word in this DMA transaction so data field must be 1.

Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
2015-03-30 22:25:47 -05:00
Marcel Ziswiler
76a30fedd4 ARM: tegra: colibri_t20: fix nand pinmux
Pingroup ATC seems to come out of reset with config set to NAND, so we
need to explicitly configure some other function to this group in order
to avoid clashing settings.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:44 -07:00
Lucas Stach
9b219d4dfb tegra: pinmux: fix FUNCMUX_NDFLASH_KBC_8_BIT
Even the 8-bit case needs KBCB configured, as pin D7 is located in this
pingroup.

Please note that pingroup ATC seems to come out of reset with its
config set to NAND so one needs to explicitly configure some other
function to this group in order to avoid clashing settings which is
outside the scope of this patch.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:44 -07:00
Marcel Ziswiler
e979a80861 ARM: tegra: update colibri_t20 configuration
Bring the Colibri T20 configuration in-line with Apalis/Colibri T30.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:44 -07:00
Marcel Ziswiler
00a5270bd8 ARM: tegra: fix colibri_t20 asix reset
Fix ASIX USB to Ethernet chip reset.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:43 -07:00
Marcel Ziswiler
1ed056e84d ARM: tegra: fix colibri_t20 machine type
A while ago I got Russell to change the machine type of our Colibri T20
from COLIBRI_TEGRA2 to COLIBRI_T20 which at least in parts is also
reflected in his machine registry:

http://www.arm.linux.org.uk/developer/machines/list.php?id=3323

For us it is really very beneficial to actually still be able to boot
downstream L4T kernel with its working hardware accelerated
graphics/multimedia stack albeit it being proprietary/closed-source.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:43 -07:00
Marcel Ziswiler
e57c6e5b50 ARM: tegra: rename colibri_t20 board/configuration/device-tree
In accordance with our other modules supported by U-Boot and as agreed
upon for Apalis/Colibri T30 get rid of the carrier board in the board/
configuration/device-tree naming.

While at it also bring the prompt more in line with our other products.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:43 -07:00
Marcel Ziswiler
d1db97aaa4 ARM: tegra: get rid of colibri_t20-common
As a preparatory step to renaming the board folder as well first get
rid of the colibri_t20-common after having integrated it into
colibri_t20_iris for now.

While at it also migrate to using NVIDIA's common.mk magic.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:43 -07:00
Simon Glass
37220efab8 tegra: seaboard: Correct the gpio_request() call
Requesting a GPIO without a name is not supposed anymore. This causes the
request to fail. Add a name so that the serial console works on seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:59:58 -07:00
Simon Glass
a101638ece tegra: seaboard: Remove unused CONFIG_UART_DISABLE_GPIO
This CONFIG is not used, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:59:58 -07:00
Stephen Warren
89d9437356 ARM: tegra: enable MIPI PAD CTRL support for Tegra124
This allows selection between CSI and DSI_B on the MIPI pads.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Stephen Warren
5ee7ec7baf ARM: tegra: pinctrl: add support for MIPI PAD control groups
Some pinmux controls are in a different register set. Add support for
manipulating those in a similar way to existing pins/groups.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Stephen Warren
c21478bc6e ARM: tegra: pinctrl: minor cleanup
Move struct pmux_pingrp_desc type and tegra_soc_pingroups variable
declaration together with other pin/mux level definitions. Now the whole
file is grouped/ordered pin/mux-related then drvgrp-related definitions.

Fix typo in ifdef comment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Stephen Warren
0edb3a8ec9 ARM: tegra: pinctrl: move Tegra210 code to the correct dir
Patches that added the Tegra210 pinctrl driver and renamed directories
arch/arm/cpu/tegra{$soc}-common -> arch/arm/mach-tegra/tegra-${soc}
crossed. Move the Tegra210 pinctrl driver to the correct location. This
wasn't detected since Tegra210 support is in the process of being added,
and isn't buildable yet.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Axel Lin
52091ad146 spi: designware_spi: revisit FIFO size detection again
By specification the FIFO size would be in a range 2-256 bytes. From TX Level
prospective it means we can set threshold in the range 0-(FIFO size - 1) bytes.
Hence there are currently two issues:
  a) FIFO size 2 bytes is actually skipped since TX Level is 1 bit and could be
     either 0 or 1 byte;
  b) FIFO size is incorrectly decreased by 1 which already done by meaning of
     TX Level register.

Fixes: 501943696e (spi: designware_spi: Fix detecting FIFO depth)
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:42:49 +05:30
Axel Lin
1478aeb32d spi: cf_spi: Staticize local functions
Make local functions static and remove unneeded forward declarations.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:42:49 +05:30
Axel Lin
bb1662760e spi: cf_spi: Use to_cf_spi_slave to resolve cfslave from slave
Don't assume slave is always the first member of struct cf_spi_slave.
Use container_of instead of casting first structure member.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:42:49 +05:30
Ravi Babu
46122960f0 qspi: dra7x: enable quad mode read for ti-qspi driver
This patch enables QUAD read mode for qspi to improve the
read performace while loading the binaries from qspi.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:39:20 +05:30
Axel Lin
81a66446c3 spi: ftssp010_spi: Use to_ftssp010_spi() to ensure free correct address
Don't assume slave is always the first member of struct ftssp010_spi.
Use to_ftssp010_spi() to ensure free correct address in spi_free_slave().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:39:20 +05:30
Axel Lin
aa8306a90e spi: davinci: Remove duplicate code to set bus and cs for slave
It's done in spi_alloc_slave().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:39:20 +05:30
Axel Lin
a46988f11f spi: cf_qspi: Fixup to_cf_qspi_slave macro
The third parameter of container_of is the name of the member within the struct.
Current code only works if the parameter passed to to_cf_qspi_slave named slave.
Fix it.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:39:20 +05:30
Hans de Goede
662e2acb46 sunxi: UTOO_P66: Add missing MAINTAINERS entry
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-29 14:56:48 +02:00
Iain Paton
961e77712b sunxi: a10-LIME set the cpu clock at boot to 912MHz
following kernel patches to reduce the cpu clock to 912MHz due to
reported instability at 1008MHz, select 912MHz as the boot speed
for the a10-lime

Signed-off-by: Iain Paton <ipaton0@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-29 13:37:39 +02:00
Iain Paton
e71b422bd7 sunxi: use CONFIG_SYS_CLK_FREQ to set cpu clock
make the CPU clock selectable via Kconfig

this removes the sunxi specific CONFIG_CLK_FULL_SPEED defined in each
soc header and replaces it's use in board/sunxi/board.c with
CONFIG_SYS_CLK_FREQ from Kconfig which allows us to configure board
specific frequency on boot

Signed-off-by: Iain Paton <ipaton0@gmail.com>
[hdegoede@redhat.com s/CONFIG_SYS_CLK_FREQ/CONFIG_TIMER_CLK_FREQ/ for the
 arch-timer clk speed on sun7i to fix mis-compile on sun7i]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-29 13:36:03 +02:00
Iain Paton
7a140117ef sunxi: sun4i: improve cpu clock selection method
clock_set_pll1 would pick the next highest available cpu clock speed if
a value not in the pre defined table was selected. this potentially
results in overclocking the soc.

reverse the selection method so that we select the next lowest speed
and add the missing 912Mhz setting that's requested by sun7i which also
uses the sun4i clock code.

Signed-off-by: Iain Paton <ipaton0@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-29 13:08:39 +02:00
Hans de Goede
246e3b8787 sunxi: musb: Fix some lo speed devices not working with musb host
The usb0 / otg phy on sunxi boards has a bug where it wrongly detects a
high speed squelch on usb reset deassert when a lo speed device is plugged in.

The android kernel has a work around for this in the form of temporary
disabling the phy's squelch detection on reset deassert, this commit adds
the same workaround to the u-boot sunxi musb code, thereby fixing various usb
lo speed devices not working.

Tested with a (before non working) usb keyboard and a usb 2.4 GHz wireless
keyboard/mouse combo receiver.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-03-29 12:58:59 +02:00
Anatolij Gustschin
5db752353b powerpc: ppc4xx: convert AMCC boards to generic board
Add CONFIG_SYS_GENERIC_BOARD to amcc-common.h and CONFIG_DISPLAY_BOARDINFO
to Kconfig files. canyonlands.h includes amcc-common.h, so remove
CONFIG_SYS_GENERIC_BOARD definition there.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Feng Kan <fkan@amcc.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
2015-03-28 12:09:46 -04:00
Brian McFarland
80ee0196a6 Patch to mkenvimage to handle text files with length that exceed env size
The current head revision of mkenvimage
(e72be8947e) will prevent you from creating
an env image from a text file that is larger than the env length specified
by the '-s' option.  That doesn't make sense given that the tool now allows
comments and blank lines.  This patch removes that limitation and allows
longer text files to be used.

I don't have time / desire at the moment to figure out "patman" and could
really care less if this is adopted up stream.  Just figured I would share
in case anybody else finds it useful enough to take time to do a proper
patch.

>From 39ff30190c2bf687861f4b4b33230f1944fb64f9 Mon Sep 17 00:00:00 2001
From: Brian McFarland <bmcfarland@rldrake.com>
Date: Thu, 12 Mar 2015 11:37:19 -0400
Subject: [PATCH] In mkenvimage, removed the check that prevented using a
 source text file larger than the output environment image.  Instead, the main
 parsing loop checks to see if the environment buffer is full, and quits if it
 is.  After the main parse loop, a second loop swallows comments and
 whitespace until either the EOF is reached or more env vars are found, in
 which case an error will be thrown.
2015-03-28 12:07:47 -04:00
angelo@sysam.it
944ab340b6 m68k: fix 3 broken boards
Fix eb_cpu5282 and eb_cpu5282_internal unresolved external error.
These boards have video but don't need any ppc related
video_setmem().

Fix M53017EVB moving away embedded env to a different offset,
as in M52277EVB.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2015-03-28 12:07:46 -04:00
Alexey Brodkin
5bcd19aa29 common/board_f: move board_init_f_mem() from #else CONFIG_X86
Purpose of this change is to make it possible to re-use code currently
used on X86 solely for other architectures. For example:
 * init_sequence_f_r
 * board_init_f_r

Even though board_init_f_mem() has nothing to do with any particular
architecture it won't work (at least in current implementation) for X86.

This is because on X86 "gd" is an alias to function get_fs_gd_ptr(),
thus we cannot assign anything to it.

So this change separates selection of board_init_f_mem() from X86 while
keeping it disabled for X86 still.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2015-03-28 12:07:46 -04:00
Linus Walleij
03314f0e24 vexpress64: cut config and defaults for unclear variant
This variant that is neither FVP / Base Model or Juno Versatile
Express 64bit is confusing. Get rid of it unless someone can
point out what machine that really is. Seems to be an evolutional
artifact in the config base.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:46 -04:00
Linus Walleij
d5f3d17ca6 armv8: semihosting: delete external interface
Now that loading files using semihosting can be done using
a command in standard scripts, and we have rewritten the boardfile
and added it to the Vexpress64, let's delete the external
interface to the semihosting file retrieveal and rely solely
on these commands, and staticize them inside that file so the
whole business is self-contained.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:46 -04:00
Linus Walleij
49995ffe81 vexpress64: remove board late init, use smhload
This removes the kludgy late board init from the FVP simulator
version of Versatile Express 64bit (ARMv8), and replace it with
a default boot command using the new smhload command to load
the files using semihosting. Tested on the Foundation Model.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:45 -04:00
Linus Walleij
202a674bb8 armv8: semihosting: add a command to load semihosted images
Instead of sprinkling custom code and calls over the Vexpress64
boardfile, create a command that loads images using semihosting
just like we would load from flash memory of over the network,
using a special command:

    smhload <image> <address>

This will make it possible to remove some custom calls and
code and make the boot easier.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:45 -04:00
Linus Walleij
e769f68613 armv8: semihosting: do not inline trap call
The semihosting trap call does not like being inlined, probably
because that will mean register reordering screwing up the return
value in r0, so tag this function "noinline".

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:45 -04:00
Karsten Merker
8c24929019 Document config_distro_bootcmd environment variables for interactive booting.
config_distro_bootcmd.h defines a common boot environment for multiple
platforms, including several environment variables that are intended for
interactive use by an end-user.  Document which variables are considered
public interfaces that must remain compatible in future u-boot versions.

Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
2015-03-28 12:07:45 -04:00
Thierry Reding
1344bd7ebe config: Define BOOTP client architecture and VCI for ARMv8
Reuse the 32-bit ARM client architecture and identify ARMv8 specifically
by setting the BOOTP VCI string.

Cc: Dennis Gilmore <dennis@ausil.us>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-03-28 12:07:45 -04:00
Thierry Reding
e2a5d55642 config: Use booti instead of bootz on 64-bit ARM
The bootz command doesn't work with Linux kernel images on 64-bit ARM.
The replacement command with the same interface and functionality is
booti.

Cc: Dennis Gilmore <dennis@ausil.us>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-03-28 12:07:44 -04:00
Hannes Petermaier
750461887e board/BuR/common: remove unused function 'blink'
since we have possibility to write out on lcd whats going on, we don't need
the gpio blink functionality anymore.

Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com>

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-03-28 12:07:44 -04:00
Hannes Petermaier
2b5b2be5e9 board/BuR/common: move I2C initialization from common part to board-specific
At this time I2C and responsible pin-mux is setup during PMIC initialziation
within common.c, this is possible because today PMIC is always connected on
I2C0.

In Future this will be changed, PMIC isn't anymore connected to bus0 in call
cases.

So we do following:
- rename enable_i2c_pin_mux0 to enable_i2c_pin_mux to be generic for enabling
  pin-mux on different or more busses.
- move the call to i2c_pin_mux and i2c_init from common.c to the specific
  board.c

Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com>
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-03-28 12:07:44 -04:00