4 Commits

Author	SHA1	Message	Date
Prabhakar Kushwaha	b707090432	ppc/85xx: Fix compile err when PCI disabled on P1_P2_RDB ... u-boot cannot be compiled after disabling CONFIG_PCI. Place PCI related codes under #ifdef CONFIG_PCI Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>	2011-01-19 22:58:24 -06:00
Kumar Gala	abc76eb6a6	ppc/85xx: Map boot page guarded for MP boot ... We already map the page cache-inhibited. There is no reason we shouldn't also be marking it guarded to prevent speculative accesses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>	2010-01-05 13:49:09 -06:00
Dipen Dudhat	f7780ec977	ppc/P1_P2_RDB: NAND Boot Support ... NAND Boot support for P1 and P2 series RDB platforms. This patch is derived from NAND Boot support on MPC8536DS. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>	2009-10-16 10:21:39 -05:00
Poonam Aggrwal	728ece343e	85xx: Add support for P2020RDB board ... The code base adds P1 & P2 RDB platforms support. The folder and file names can cater to future SOCs of P1/P2 family. P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series. Tested following on P2020RDB: 1. eTSECs 2. DDR, NAND, NOR, I2C. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>	2009-08-28 17:12:38 -05:00