brain-hackers_pepepper-mirror/u-boot-brain
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46,327 Commits 45 Branches 255 Tags 213 MiB
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3 Commits

Author SHA1 Message Date
Bin Meng
507f1024b8 x86: braswell: Disable PUNIT power configuration for B0 stepping 
FSP's built-in UPD configuration enables PUNIT power configuration,
but on B0 stepping, this causes CPU hangs in fsp_init(). Disable it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
 2017-09-16 14:57:44 +08:00
Bin Meng
fffad9264a x86: braswell: Add FSP configuration 
Add FSP related configuration for Braswell.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
 2017-09-16 14:57:44 +08:00
Bin Meng
de9ac9a1b9 x86: Add Intel Braswell SoC support 
This adds initial Intel Braswell SoC support. It uses Intel FSP
to initialize the chipset.

Similar to its predecessor BayTrail, there are some work to do to
enable the legacy UART integrated in the Braswell SoC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
 2017-09-16 14:57:44 +08:00