Commit Graph

14140 Commits

Author SHA1 Message Date
Wolfgang Denk
33b48657df Merge branch 'emaclite' of git://git.denx.de/u-boot-microblaze
* 'emaclite' of git://git.denx.de/u-boot-microblaze:
  net: emaclite: Use dynamic allocation
  net: emaclite: Remove baseaddress from xemaclite
  net: emaclite: Use calloc instead of malloc
  net: emaclite: Remove deviceid property
  net: emaclite: Change driver name and add address
2011-10-04 22:05:15 +02:00
Wolfgang Denk
ec594e8c98 Merge branch 'master' of git://git.denx.de/u-boot-microblaze
* 'master' of git://git.denx.de/u-boot-microblaze:
  microblaze: Enable FDT/FIT support
  microblaze: Remove address offset for uart16550
  microblaze: Do not select NFS for platforms without ethernet
  microblaze: Clean up reset asm code
  microblaze: Save and restore first unused vector
  microblaze: Setup MB vectors if feature is enable for u-boot
  microblaze: Remove debug saving value
2011-10-04 21:32:16 +02:00
Wolfgang Denk
f092f15d39 Revert "GCC4.6: Convert various empty macros to inline functions"
This reverts commit 60ce53cf9f.

The commit causes build breakage for a number of boards. This results
from the fact that now the arguments of debug() actually get
referenced (even if there is hope that the compiler will optimize
away the debug() call).  The obvious fix to that probem (change the
code to always declare the referenced variables and data structures)
increases the code size, and was this rejected.  So it was decided to
revert this commit until a better solution is found.
2011-10-04 21:19:19 +02:00
Marek Vasut
169de9059f PPC: Fix socrates NAND problem
nand.c:36: error: static declaration of 'nand_read_buf' follows non-static declaration
/home/marex/u-boot/include/nand.h:139: error: previous declaration of 'nand_read_buf' was here

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:44:40 -05:00
Marek Vasut
24dd863f8b PPC: Fix fsl_upm.c by renaming nand handling functions
This avoids colision with nand subsystem's functions.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:41:02 -05:00
Marek Vasut
ce80ddc180 NAND: Make page, erase, oob size available via cmd_nand
The "nand info" and "nand device" now set shell/environment variables:
	nand_writesize ... nand page size
	nand_oobsize ..... nand oob area size
	nand_erasesize ... nand erase block size

Also, the "nand info" command now displays this info.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
[scottwood@freescale.com: removed unnecessary memsets]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:12 -05:00
mhench
17d261df18 mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poi
The eLBC NAND driver currently follows up each program/write operation with a
read-back of the page, in order to [ostensibly] fill in ECC data for the
caller. However, the page address used for this read is always -1, so the read
will never work correctly.  Remove this useless (and potentially problematic)
block of code.

v2: fix broken mailer

Signed-off-by: mhench <mhench@elutions.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:12 -05:00
Marek Vasut
6089981663 NAND: Add -y option to nand scrub command
This allows the scrub command to scrub without asking the user if he really
wants to scrub the area. Useful in scripts.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:12 -05:00
Marek Vasut
fb3659ac42 NAND: Add nand read.raw and write.raw commands
These commands should work around various "hardware" ECC and BCH methods.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
[scottwood@freescale.com: s/write the page/access the page/]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:12 -05:00
Marek Vasut
6d41419f0b NAND: Really ignore bad blocks when scrubbing
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
[scottwood@freescale.com: use chip instead of redundant priv_nand]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:12 -05:00
Heiko Schocher
dc7cd8e59b spl, nand: add 4bit HW ecc oob first nand_read_page function
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:12 -05:00
Helmut Raiger
b4b1e769b8 mxc_nand: fix a problem writing more than 32MB
When writing 0x4000 to the unlockend_blkaddr register, large writes to
a 2k page NAND sometimes fail. The current kernel driver writes 0xFFFF
to this register for V2 of the nand controller.

However on an i.MX31 this also fixes writes larger than 32MB.
The datasheet is very unspecific, but (0x4000=16384)*2000
roughly fits the limits we're encountering with NAND writes.
This problem might be NAND chip specific.

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:12 -05:00
Helmut Raiger
780f30b642 mxc_nand: fixed some typos (cosmetic)
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:11 -05:00
Stefan Bigler
156800905a nand: increase chip_delay in mv kirkwood nand driver
The new SAMSUNG NAND Flash K9F1G08U0D require a bigger chip_delay.
The Data Transfer from Cell to Register is >= 35us. Other Vendors
and older chips normally use >= 25us. To have enough margin 40us
is selected.

Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:11 -05:00
Shengzhou Liu
6d7b061af1 powerpc/p3060: Add SoC related support for P3060 platform
Add P3060 SoC specific information:cores setup, LIODN setup, etc

The P3060 SoC combines six e500mc Power Architecture processor cores with
high-performance datapath acceleration architecture(DPAA), CoreNet fabric
infrastructure, as well as network and peripheral interfaces.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 09:36:28 -05:00
Kumar Gala
6b3a8d0086 powerpc/85xx: Add support for setting up RAID engine liodns on P5020
Add support for Job Queue/Ring LIODN for the RAID Engine on P5020.  Each
Job Queue/Ring combo needs one id assigned for a total of 4 (2 JQs/2
Rings per JQ).  This just handles RAID Engine in non-DPAA mode.

Signed-off-by: Santosh Shukla <santosh.shukla@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:15 -05:00
Kumar Gala
c6d3390160 powerpc/85xx: Refactor some defines out of corenet_ds.h
Move some SoC/board specific defines out of corenet_ds.h and into the
corresponding P3041DS/P4080DS/P5020.h.

We moved CONFIG_MMC, CONFIG_PCIE3, & CONFIG_FSL_NGPIXIS because the P3060
SoC/reference board does not have these devices and it will share the same
board code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:15 -05:00
Kumar Gala
69a8524258 fm-eth: Add ability for board code to disable a port
The SoC configuration may have more ports enabled than a given board
actually can utilize.  Add a routinue that allows the board code to
disable a port that it knows isn't being used.

fm_disable_port() needs to be called before cpu_eth_init().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:15 -05:00
Kumar Gala
2b3a1cdd9e powerpc/mpc8548: Add workaround for erratum NMG_LBC103
The erratum NMG_LBC103 is LBIU3 in MPC8548 errata document.
Any local bus transaction may fail during LBIU resynchronization
process when the clock divider [CLKDIV] is changing. Ensure there
is no transaction on the local bus for at least 100 microseconds
after changing clock divider LCRR[CLKDIV].

Refer to the erratum LBIU3 of mpc8548.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:15 -05:00
Kumar Gala
5ace2992b5 powerpc/mpc8548: Add workaround for erratum NMG_DDR120
Erratum NMG_DDR120 (DDR19 in MPC8548 errata document) applies to some
early version silicons. The default settings of the DDR IO receiver
biasing may not work at cold temperature. When a failure occurs,
a DDR input latches an incorrect value. The workaround will set the
receiver to an acceptable bias point.

Signed-off-by: Gong Chen
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:14 -05:00
chenhui zhao
568336ecc7 powerpc/mpc85xxcds: Fix PCI speed
The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz.

Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:14 -05:00
chenhui zhao
a6d0bfa86f powerpc/mpc8548cds: Fix booting message
Align the output for PCI. Replace "PCI" with "PCI1".

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
2011-10-03 08:52:14 -05:00
Ruchika Gupta
7065b7d466 powerpc/p4080: Add support for secure boot flow
Pre u-boot Flow:
1. User loads the u-boot image in flash
2. PBL/Configuration word is used to create LAW for Flash at 0xc0000000
   (Please note that ISBC expects all these addresses, images to be
    validated, entry point etc within 0 - 3.5G range)
3. ISBC validates the u-boot image, and passes control to u-boot
   at 0xcffffffc.

Changes in u-boot:
1. Temporarily map CONFIG_SYS_MONITOR_BASE to the 1M
   CONFIG_SYS_PBI_FLASH_WINDOW in AS=1.
   (The CONFIG_SYS_PBI_FLASH_WINDOW is the address map for the flash
    created by PBL/configuration word within 0 - 3.5G memory range. The
    u-boot image at this address has been validated by ISBC code)
2. Remove TLB entries for 0 - 3.5G created by ISBC code
3. Remove the LAW entry for the CONFIG_SYS_PBI_FLASH_WINDOW created by
   PBL/configuration word after switch to AS = 1

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>
Acked-by: Wood Scott-B07421 <B07421@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:14 -05:00
Ruchika Gupta
2f439e805e powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>
2011-10-03 08:52:14 -05:00
Kumar Gala
550a249211 powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:13 -05:00
Shaohui Xie
93ab6ca1c8 powerpc/p2041rdb: remove watch dog related codes
CPLD 2.2 removed board watch dog support due to the limitation of CPLD
capacity after adding all the requested features, such as switch overriding.
There is no pin-compatible upgrade part available for current PCB design.
So remove codes related to it.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:13 -05:00
Shaohui Xie
60820457cc powerpc/p2041rdb: updated description of cpld command
According to CPLD 2.2, the default configuration is changed, so updated the
description of CPLD command, otherwise it will confusing.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:13 -05:00
Shaohui Xie
47784af714 powerpc/p2041rdb: add more ddr frequencies support
This table covers DDR frequencies from 666 to 1666. Frequencies 666, 833,
1000, 1066 and 1333 were verified on this board with SO-DIMM
(UG51U6400N8SU-ACF).

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:30:06 -05:00
Shaohui Xie
44d50f0b54 powerpc/p2041rdb: set sysclk according to status of physical switch SW1
P2041RDB supports 3 sysclk frequencies, it's selected by SW1[6~8],
software need to read the SW1 status to decide what the sysclk needs.

SW1[8~6] : frequency
0 0 1 : 83.3MHz
0 1 0 : 100MHz
others: 66.667MHz

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:30:02 -05:00
Shaohui Xie
ba50fee6ae powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
CPLD 2.0 provides a new register which bit[0] is set to '1' will reset
board with initializing the CPLD registers to default values. And add
bit[6] of register at offset 0x5 to use to enable flash bank selection.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:29:54 -05:00
Lei Wen
d308c9d35a I2C: mv_i2c: fix multi-bus init issue
When enable the multi-bus, the current_bus is not inited in the original
implementation, which make the i2c operation unpredicatable.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-10-03 11:50:09 +02:00
Lei Wen
2be1ed349c I2C: mv_i2c: fix build issue when enable debug option
When DEBUG_I2C is open, the following build issue would shows up.

mv_i2c.c: In function 'i2c_transfer':
mv_i2c.c:257: error: 'ISR' undeclared (first use in this function)
mv_i2c.c:257: error: (Each undeclared identifier is reported only once
mv_i2c.c:257: error: for each function it appears in.)

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-10-03 11:47:07 +02:00
Michal Simek
773cfa8d08 net: emaclite: Use dynamic allocation
Every emaclite instance use own setting.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-03 08:04:14 +02:00
Michal Simek
8d95ddbb5e net: emaclite: Remove baseaddress from xemaclite
Use dev->iobase instead of baseaddress.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:04:14 +02:00
Michal Simek
28ae02e5af net: emaclite: Use calloc instead of malloc
Simplify driver logic and clear eth_device structure
in one command.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:04:14 +02:00
Michal Simek
be98696741 net: emaclite: Remove deviceid property
Cleanup structure.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:04:13 +02:00
Michal Simek
25a025518b net: emaclite: Change driver name and add address
Current xilinx emaclite use net multi registration
but doesn't support several emaclites interfaces.
Changing driver name with adding address to name
is the first step how to distiguish several drivers.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:04:13 +02:00
Michal Simek
37e892d93a microblaze: Enable FDT/FIT support
Enable FDT and FIT support.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:01:56 +02:00
Michal Simek
68332608bc microblaze: Remove address offset for uart16550
U-Boot BSP handle 0x3 offset for big endian systems.
Little endian Microblaze systems don't use any offset.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:01:56 +02:00
Michal Simek
1252df0659 microblaze: Do not select NFS for platforms without ethernet
Undefined network functionality for systems without ethernet
and disable NFS support.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:01:56 +02:00
Michal Simek
5562bcc241 microblaze: Clean up reset asm code
- Remove code copying
- Reset address is setup from first stage bootloader
- Support reset vector setup on little endian

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:01:56 +02:00
Michal Simek
f3090fce77 microblaze: Save and restore first unused vector
Use one memory space to detect little/big endian platforms.
The first unused address(0x28) is used instead 0x0 address (reset vectors).
Detection rewrited reset vector setup from first stage bootloader.

Workflow:
1. Store 0x28 to r7
2. Do little/big endian test
3. Restore r7 to 0x28

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:01:56 +02:00
Michal Simek
86c1b2a86b microblaze: Setup MB vectors if feature is enable for u-boot
For example: Setup reset vectors if reset address is setup.
Setup user exception vector if user exception is enabled

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:01:56 +02:00
Michal Simek
dfc10703d7 microblaze: Remove debug saving value
Forget to remove debug code.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:01:55 +02:00
Marek Vasut
7b8ffea2ac GCC4.6: Squash warning in lzo1x_decompress.c
lzo1x_decompress.c: In function ‘parse_header’:
lzo1x_decompress.c:35:5: warning: variable ‘level’ set but not used
[-Wunused-but-set-variable]

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-01 23:34:38 +02:00
Marek Vasut
2984fd1673 GCC4.6: Squash warning in cmd_ubi.c:
cmd_ubi.c: In function ‘ubi_volume_read’:
cmd_ubi.c:319:9: warning: variable ‘count_save’ set but not used
[-Wunused-but-set-variable]

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-01 23:34:21 +02:00
Marek Vasut
cac952ffe3 GCC4.6: Squash warning in vmt.c
vmt.c: In function ‘ubi_free_volume’:
vmt.c:681:6: warning: variable ‘err’ set but not used
[-Wunused-but-set-variable]

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-01 23:34:03 +02:00
Marek Vasut
9099ac3e7e GCC4,6: Squash warning in cmd_nand.c
cmd_nand.c: In function ‘do_nand’:
cmd_nand.c:490:7: warning: variable ‘chip’ set but not used
[-Wunused-but-set-variable]
cmd_nand.c:489:7: warning: variable ‘part’ set but not used
[-Wunused-but-set-variable]

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-01 23:33:52 +02:00
Marek Vasut
89131e90a2 GCC4.6: Squash warning in nand_bbt.c
nand_bbt.c: In function ‘search_bbt’:
nand_bbt.c:465:6: warning: variable ‘bits’ set but not used
[-Wunused-but-set-variable]

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
2011-10-01 23:33:25 +02:00
Marek Vasut
f3b3c3df18 GCC4.6: Squash warning in cmd_mem.c
cmd_mem.c: In function ‘do_mem_loop’:
cmd_mem.c:474:25: warning: variable ‘junk’ set but not used
[-Wunused-but-set-variable]

The assigned variable can be removed because the pointers are volatile so
accesses to their addresses are always generated.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-10-01 23:26:36 +02:00