Commit Graph

70 Commits

Author SHA1 Message Date
Trevor Woerner
1bc5d3a568 drivers/reset/Kconfig: fix typo
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
71f6354b0e rename symbol: CONFIG_STM32 -> CONFIG_ARCH_STM32
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Tom Rini
9a8942b53d sandbox conversion to SDL2
TPM TEE driver
 Various minor sandbox video enhancements
 New driver model core utility functions
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAl48iogACgkQfxc6PpAI
 reaVzAf/an3/yKe6r3CVWlcRV6H/dVg1ApnnLpX7jS0p0b++oCVvOiy7z1WPXj3k
 b1SSgENDeeZ/8EHio+Gf7ZidH/TGEj7L6YEFwd1t60GMkZiWEkNf4Z53tw482YG+
 96hoPD+ySTW+ddIdVHWAFG2I4aEiKHANJAp/ItNdD+rLbrEwNQy+eiK5JTOk80B6
 /X8AJCLZeAC1s7vs+2+WolgjT78QGzA9HHalMiublcqh0ivKKk0QeQiOKKPe8JYJ
 om5YY1TxayQ60Xmo5f39/SBfzEEklxw83sU9o1tBeYzyVUpu7fQdkxiDbWdsij77
 DgwLdeYQJGbN+hdSWE0gjTqyhW+lWA==
 =KRoA
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
2020-02-11 10:58:41 -05:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Simon Glass
94474b25c3 reset: Rename free() to rfree()
This function name conflicts with our desire to #define free() to
something else on sandbox. Since it deals with resources, rename it to
rfree().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Ley Foon Tan
9e6082198a reset: socfpga: Poll for reset status after deassert reset
In Cyclone 5 SoC platform, the first USB probing is failed but second
probing is success. DWC2 USB driver read gsnpsid register right after
de-assert reset, but controller is not ready yet and it returns gsnpsid 0.
Polling reset status after de-assert reset to solve the issue.

Retry with this fix more than 10 times without issue.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-02-03 09:26:14 +01:00
Eugeniy Paltsev
c597e248d9 ARC: HSDK: introduce reset driver
Introduce reset driver for Synopsys ARC HSDK SoC

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-11-01 16:45:40 +03:00
Weijie Gao
f7ae6b682c reset: add reset controller driver for MediaTek MIPS platform
This patch adds reset controller driver for MediaTek MIPS platform and
header file for mt7628.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Patrick Wildt
6300dc4c61 imx: add support for i.MX7/i.MX8MQ reset controller
Add support for the reset controller that's used on the i.MX7D
and i.MX8MQ.  This will be needed to be able to assert the PCIe
reset pins.  Bindings taken from Linux, driver implementation
mostly taken from Linux and adjusted to U-Boot infrastructure.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:36:36 +02:00
Simon Glass
7b51b576d6 env: Move env_get() to env.h
Move env_get() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Goldschmidt
ef72ba0b87 sysreset: add support for socfpga sysreset
This moves sysreset support for socfgpa from ad-hoc code in mach-socfpga
to a UCLASS_SYSRESET based dm driver.

A side effect is that gen5 and a10 can now select between cold and warm
reset.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-07-21 12:45:10 +02:00
Simon Goldschmidt
6cdd0a4e54 reset: socfpga: convert to livetree
Convert 'socfpga_reset_probe' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int'.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Tom Rini
504bf790da Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- H6 Beelink GS1 board (Clément)
- Olimex A64-Teres-I board (Jonas)
- sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej)
- Change include order (Jagan)
- EPHY clock changes (Jagan)
- EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
2019-05-08 16:21:43 -04:00
Jagan Teki
ea9dc35aab reset: Get the RESET by index without device
Getting a RESET by index with device is not straight forward
for some use-cases like handling clock operations for child
node in parent driver. So we need to process the child node
in parent probe via ofnode and process RESET operation for child
without udevice but with ofnode.

So add reset_get_by_index_nodev() and move the common code
in reset_get_by_index_tail() to use for reset_get_by_index()

Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-09 00:44:13 +05:30
Kever Yang
15f09a1a83 rockchip: use 'arch-rockchip' as header file path
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Tom Rini
ceb6ddbc73 - Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
 - Add support for the Libretech-AC AML-S805X-AC board
 - Add Amlogic AXG reset compatible
 - Add I2C support for Amlogic AXG
 - Fix AXG PIN and BANK pinctrl definitions
 - Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
 - Add initial support for Amlogic G12A SoC and U200 board
 - Enable PHY_REALTEK for selected boards
 - Fix Khadas VIM2 README
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJcvtmpAAoJEHfc29rIyEnRc78P/0vN7zuxfSganTctZJGyrika
 9i3aIwr03KaFJJKg2FpnjMvdoYfjbuQoJmCdtgyO5Gzw/E5m3b8zbOwxoXW0r8Mg
 56fTSh8my8XHxnrc+Ryv+qwnf8SRIDv7apNqk6vpmnq3OC6di/Z/BBi7jT/ptNm+
 fT/VvQDZkPl5Em3kO1899dpZ7mk5WBwrBeD3R8hrrHtpF45zlRXKPIA/rlcT01DD
 w1gKL7n8NNuV+PHB7fh+xYYW7XkZpINqg6RbEi4w/DpM9Piys4XlB8+W361OkU3O
 Mk0u4omb6ahVIzV7AT4/Xz7B6edO/JpuCkLF0CCIzWo6TBT4Dpkz2h0wVaUCuZBC
 /mykRIgYmFCtdFuUuklf12xKA2VzNfEqk+mzyohDwTxdpWnKZOyX+OfR6Y2PKL8Y
 qSSDYkgucf16SIDBXu8/uVI0RCLtCfza68/Py63Hu9tzFWrG3tC94j3xmXAt+gBA
 Rg25xQ+KfX6oEGbHpViBJDLDWZDzqRPlkAdp3mb08Zpq9cynQSfM5dyS02YnEod7
 80uyva2Bq8S5a2NQYtLJRim54N2rM4srgFFFS0Qw4Feqv7KRkbZl37mTraOLKFo+
 h8t2EQnlaiIzWEKwXmgd7eXS3wV3lsVDn1q/UzBdqkPgp4HQcBsUONh5dxrD5Bvq
 bm6hYo2+hqt583THUltr
 =Qb3V
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogic

- Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
- Add support for the Libretech-AC AML-S805X-AC board
- Add Amlogic AXG reset compatible
- Add I2C support for Amlogic AXG
- Fix AXG PIN and BANK pinctrl definitions
- Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
- Add initial support for Amlogic G12A SoC and U200 board
- Enable PHY_REALTEK for selected boards
- Fix Khadas VIM2 README
2019-04-24 12:26:25 -04:00
Shawn Guo
f5e6c168c1 reset: add reset driver for HiSilicon platform
It adds a Driver Model compatible reset driver for HiSlicon platform.
The driver implements a custom .of_xlate function, and uses .data field
as reset register offset and .id field as bit shift.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-23 17:57:24 -04:00
Simon Goldschmidt
ede6e7b64f reset: socfpga: add reset handling for old kernels
This adds code to take peripherals out of reset based on an environment
variable. This is in preparation for removing the code that does this from
SPL.

However, some drivers even in current Linux cannot handle peripheral reset,
so until this works, we need a compatibility workaround.

This workaround is implemented in the 'assert' and 'remove' callbacks of
this reset driver: the 'assert' callback does not disable peripherals that
were already taken out of reset, while the 'remove' callback, which is
called on OS_PREPARE, deasserts all peripheral resets if the environment
variable "socfpga_legacy_reset_compat" is set to 1, which is what the gen5
SPL did up to now.

This is in preparation to clean up the SPL and implementing proper reset
handling for U-Boot.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17 22:20:16 +02:00
Simon Goldschmidt
1ea975010d reset: socfpga: rename membase ptr to modrst_base
The only member of this driver's priv struct is a pointer, which is
called 'membase'. However, since this driver handles multiple sub-
architectures, this is not the base address from dts but the base
address of some common registers of those sub-arches.

Reflect this better in sourcecode by renaming 'membase' to 'modrst_base'.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17 22:20:16 +02:00
Neil Armstrong
fd6b934d06 reset-meson: Add AXG reset compatible
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-10 16:53:38 +02:00
Jagan Teki
99ba430870 reset: Add Allwinner RESET driver
Add common reset driver for all Allwinner SoC's.

Since CLK and RESET share common DT compatible, it is CLK driver
job is to bind the reset driver. So add CLK bind call on respective
SoC driver by passing ccu map descriptor so-that reset deassert,
deassert operations held based on ccu reset table defined from
CLK driver.

Select DM_RESET via CLK_SUNXI, this make hidden section of RESET
since CLK and RESET share common DT compatible and code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Weijie Gao
3e066bcaef reset: MedaiTek: add reset controller driver for MediaTek SoCs
This patch adds reset controller driver for MediaTek SoCs.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-01-14 17:43:18 -05:00
Patrick Delaunay
22929e1266 drivers: cosmetic: Convert SPDX license tags to Linux Kernel style
Complete in the drivers directory the work started with
commit 83d290c56f ("SPDX: Convert all of our single
license tags to Linux Kernel style").

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-28 09:26:39 -04:00
Andreas Dannenberg
65c8a79811 reset: Introduce TI System Control Interface (TI SCI) reset driver
Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.

This patch adds a reset driver that communicates to the system
controller over the TI SCI protocol for performing reset management of
various devices present on the SoC. Various reset functionalities are
achieved by the means of different TI SCI device operations provided by
the TI SCI framework.

This code is loosely based on the drivers/reset/reset-ti-sci.c driver of
the Linux kernel.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
e7012e6e1f dm: reset: Update uclass to allow querying reset status
Add a reset operations function pointer to support querying the current
status of a reset control.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Patrick Delaunay
d090cbab64 misc: stm32: Add STM32MP1 support
Following next kernel rcc bindings, we must use a MFD
RCC driver which is able to bind both clock and reset
drivers.

We can reuse and adapt RCC MFD driver already available
for MCU SoCs (F4/F7/H7).

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:05 -04:00
Masahiro Yamada
25ed0fefa4 reset: uniphier: sync reset data with Linux 4.18-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-23 01:28:08 +09:00
Álvaro Fernández Rojas
56d4b706d3 reset: bcm6345: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Masahiro Yamada
d35812368a regmap: change regmap_init_mem() to take ofnode instead udevice
Currently, regmap_init_mem() takes a udevice. This requires the node
has already been associated with a device. It prevents syscon/regmap
from behaving like those in Linux.

Change the first argumenet to take a device node.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:51 -04:00
Masahiro Yamada
8c1de5e08b regmap: clean up regmap allocation
Putting zero length array at the end of struct is a common technique
to embed arbitrary length of members.  There is no good reason to let
regmap_alloc_count() branch by "if (count <= 1)".

As far as I understood the code, regmap->base is an alias of
regmap->ranges[0].start, but it is not helpful but make the code
just ugly.

Rename regmap_alloc_count() to regmap_alloc() because the _count
suffix seems pointless.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: fixup cpu_info-rcar.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:15:27 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Tom Rini
a35747b5e1 Merge git://git.denx.de/u-boot-uniphier 2018-04-18 16:24:26 -04:00
Kunihiko Hayashi
f8c08ab409 reset: uniphier: add ethernet reset control support
Add reset lines for ethernet controller on each SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-18 23:42:33 +09:00
Tom Rini
40df6b3e18 Merge git://git.denx.de/u-boot-socfpga 2018-04-17 17:45:28 -04:00
Neil Armstrong
895a82ce90 reset: fix reset_get_bulk when phandle error
This fixes the Coverity Defect CID 175348 when dev_count_phandle_with_args()
returns a negative value.

Fixes: 0c28233903 ("reset: Add get/assert/deassert/release for bulk of reset signals")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-17 17:45:08 -04:00
Dinh Nguyen
2ac718821a reset: socfpga: add reset driver for SoCFPGA platform
Add a DM compatible reset driver for the SoCFPGA platform.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-04-17 11:39:49 +02:00
Neil Armstrong
91f5f8b73c reset: add sandbox test for bulk API
This patch adds the bulk reset API tests for the sandbox test suite.

Unlike the main test, it also check the "other" reset signal using the bulk API
and checks if the resets are correctly asserted/deasserted.

To allow the bulk API to work, and avoid changing the DT, the number of resets
of the sandbox reset controller has been bumped to 101 for the "other" reset
line to be valid.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Neil Armstrong
0c28233903 reset: Add get/assert/deassert/release for bulk of reset signals
This patch adds a "bulk" API to the reset API in order to get/deassert/
assert/release a group of reset signals associated with a device.

This bulk API will avoid adding a copy of the same code to manage
a group of reset signals in drivers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Neil Armstrong
20367bb560 reset: Add Amlogic Meson Reset Controller
The Amlogic Meson SoCs embeds up to 256 reset lines, add the corresponding
driver.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-10 11:52:16 -04:00
Patrick Delaunay
a7519b3324 reset: stm32: adapt driver for stm32mp1
- move to livetree and allow to get address to parent
- add stm32mp1 compatible for probe

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:22 -04:00
Álvaro Fernández Rojas
48263504c8 wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Elaine Zhang
760188c1aa rockchip: reset: support a (common) rockchip reset drivers
Create driver to support the soft reset (i.e. peripheral)
of all Rockchip SoCs.

Example of usage:
i2c driver:
	ret = reset_get_by_name(dev, "i2c", &reset_ctl);
	if (ret) {
		error("reset_get_by_name() failed: %d\n", ret);
	}

	reset_assert(&reset_ctl);
	udelay(50);
	reset_deassert(&reset_ctl);

i2c dts node:
resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
reset-names = "p_i2c", "i2c";

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed commit tag:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-09 11:13:32 +01:00
Patrice Chotard
3bc599c956 stm32: fix STMicroelectronics copyright
Uniformize STMicroelectronics copyrights headers for STM32
related code.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-06 09:51:01 -05:00
Patrice Chotard
fb48bc448c sti: fix STMicroelectronics copyright
Uniformize all STMicroelectronics copyrights headers for STi
related code.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-06 09:51:01 -05:00
Masahiro Yamada
def4eadba9 reset: uniphier: fix the first argument passed to dev_err()
priv->dev does not exist.  Pass the correct pointer to udevice.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-10-15 22:32:25 +09:00
Masahiro Yamada
9b643e312d treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:

  # define __compiletime_error(message) __attribute__((error(message)))

This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux.  (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

Let's convert error() into now treewide-available pr_err().

Done with the help of Coccinelle, excluing tools/ directory.

The semantic patch I used is as follows:

// <smpl>
@@@@
-error
+pr_err
 (...)
// </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-04 11:59:44 -04:00
Patrice Chotard
23a0641685 dm: reset: add stm32 reset driver
This driver is adapted from linux drivers/reset/reset-stm32.c
It's compatible with STM32 F4/F7/H7 SoCs.

This driver doesn't implement .of_match as it's binded
by MFD RCC driver.

To add support for each SoC family, a SoC's specific
include/dt-binfings/mfd/stm32xx-rcc.h file must be added.

This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs.
Other SoCs support will be added in the future.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:40:01 -04:00
Masahiro Yamada
111689e744 reset: uniphier: add PXs3 support
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30 09:07:04 +09:00