Commit Graph

19105 Commits

Author SHA1 Message Date
Ilias Apalodimas
92e8489611 tee: optee: Change printing during optee_probe
Right now the error messages when optee has a version mismatch or shared
memory is not configured are done with a debug().
That's not very convenient since you have to enable debugging to figure
out what's going on, although this is an actual error.

So let's switch the debug() -> dev_err() and report those explicitly.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-12 17:44:55 -04:00
Heiko Schocher
05a0776ed5 rtc: add support for rv3028 rtc
Add support for rtc3028 rtc from microcrystal.
based on linux dirver:
commit a38fd8748464: ("Linux 5.12-rc2")

Signed-off-by: Heiko Schocher <hs@denx.de>

Reviewed-by: Stefan Roese <sr@denx.de>
2021-04-12 17:44:55 -04:00
Etienne Carriere
c3bba708da firmware: scmi: fix inline comments and minor coding style issues
Fix inline comments and empty line in scmi driver and test files.

Remove test on IS_ENABLED(CONFIG_*_SCMI) in test/dm/scmi.c since these
configuration are expected enabled when CONFIG_FIRMWARE_SCMI is enabled
in sandbox configuration.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-12 17:17:11 -04:00
Etienne Carriere
0124218b8b firmware: scmi: sandbox test for voltage regulator
Implement sandbox regulator devices for SCMI voltage domains
and test them in DM scmi tests.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-12 17:17:11 -04:00
Etienne Carriere
1f213ee4db firmware: scmi: voltage regulator
Implement voltage regulators interfaced by the SCMI voltage domain
protocol. The DT bindings are defined in the Linux kernel since
SCMI voltage domain and regulators patches [1] and [2] integration
in v5.11-rc7.

Link: [1] 0f80fcec08
Link: [2] 2add5cacff
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-12 17:17:11 -04:00
Phil Sutter
a62de442e4 pci: Mark 64bit Memory BARs as such
Just a bit more info to the reader.

Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-04-12 17:17:11 -04:00
Farhan Ali
c146de4872 mtd: Update fail_addr when erase fails due to bad blocks
For all other erase failures, the fail_addr is updated with the
failing address. Only in the case of erase failure due to bad block
detection, the fail_addr is not updated. This change simply updates
the fail_addr for this specific scenario so that it is consistent with
the rest of the code.

Signed-off-by: Farhan Ali <farhan.ali@broadcom.com>
2021-04-12 17:17:11 -04:00
Jaehoon Chung
67696abf1f power: pmic: remove pmic_max77696.c file
Remove pmic_max77696.c file.
The maintaining pmic_max77696.c file is useless.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-12 14:25:30 -04:00
Tom Rini
3b676a1662 Merge branch '2021-04-11-remove-non-migrated-boards'
- Remove a large number of boards that have not migrated to DM_MMC, for
  which the migration deadline with 2 years ago at v2019.04.
2021-04-11 14:11:05 -04:00
Tom Rini
c6a4ee2aae - rk3399 eDP support
- pwm backlight without a known period_ns
  - add Chrome OS EC PWM driver
  - Kconfig SIMPLE_PANEL DM_GPIO dependency
  - remove mb862xx driver remnants
  - fix KiB format in reserve_video() debug trace
  - fix tegra124 sor CSTM LVDS_EN_ENABLE/DISABLE config
  - fix line padding calculation for 16 and 24 BPP bitmaps
 -----BEGIN PGP SIGNATURE-----
 
 iGwEABECACwWIQSC4hxrSoIUVfFO0kRM6ATMmsalXAUCYHIVZQ4cYWd1c3RAZGVu
 eC5kZQAKCRBM6ATMmsalXGGUAJ43opdvM3K/Sl2jJlJedhqlHkKx4ACeOvg4BmUU
 tkZ6sxzf8lAS++xi0P0=
 =rExe
 -----END PGP SIGNATURE-----

Merge tag 'video-2021-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-video

 - rk3399 eDP support
 - pwm backlight without a known period_ns
 - add Chrome OS EC PWM driver
 - Kconfig SIMPLE_PANEL DM_GPIO dependency
 - remove mb862xx driver remnants
 - fix KiB format in reserve_video() debug trace
 - fix tegra124 sor CSTM LVDS_EN_ENABLE/DISABLE config
 - fix line padding calculation for 16 and 24 BPP bitmaps
2021-04-11 07:40:25 -04:00
Sylwester Nawrocki
38e18d6392 video: Fix line padding calculation for 16 and 24 BPP bitmaps
Each row in the pixel array in the bitmap file is padded
if necessary so the row size is always a multiple of 4 bytes.
In current code the complement of row size to a multiple of
4 bytes is further unnecessarily multiplied by the pixel size.
This results in incorrect displaying of bitmaps having row size
that is not a multiple of 4 bytes. Fix this by removing
the unnecessary multiplication.

Tested with 24BPP bitmap and XRGB32 display.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-10 17:09:59 +02:00
Heinrich Schuchardt
131c224168 tegra: video: fix tegra_dc_sor_config_panel()
Bitwise OR has a higher operator precedence than the ternary conditional.
Add the missing parentheses.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-10 17:07:35 +02:00
Trevor Woerner
ff4e1e277f finish removing mb862xx video driver
drivers/video/mb862xx.c was removed in commit
9c1e098fb9 from December 2020, however, this
last little remnant in drivers/video/cfb_console.c remained.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2021-04-10 16:51:04 +02:00
Asherah Connor
1bed576d41 video: SIMPLE_PANEL depends on DM_GPIO
SIMPLE_PANEL currently only depends on PANEL && BACKLIGHT, but the code
makes references to dm_gpio_set_value and gpio_request_by_name.  These
are defined in drivers/gpio/gpio-uclass.c, so a dependency on DM_GPIO
corrects these link errors:

aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_set_backlight':
/home/kameliya/u-boot/drivers/video/simple_panel.c:42: undefined reference to `dm_gpio_set_value'
aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_enable_backlight':
/home/kameliya/u-boot/drivers/video/simple_panel.c:27: undefined reference to `dm_gpio_set_value'
aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_of_to_plat':
/home/kameliya/u-boot/drivers/video/simple_panel.c:72: undefined reference to `gpio_request_by_name'

This issue is only exposed if you have a board which enables
CONFIG_DM_VIDEO without CONFIG_DM_GPIO; so far, none do, but soon a QEMU
board may.

Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
2021-04-10 16:50:07 +02:00
Alper Nebi Yasak
1b9ee2882e pwm: Add a driver for Chrome OS EC PWM
This PWM is used in rk3399-gru-bob and rk3399-gru-kevin to control
the display brightness. We can only change the duty cycle, so on
set_config() we just try to match the duty cycle that dividing duty_ns
by period_ns gives us. To disable, we set the duty cycle to zero while
keeping the old value for when we want to re-enable it.

The cros_ec_set_pwm_duty() function is taken from Depthcharge's
cros_ec_set_bl_pwm_duty() but modified to use the generic pwm type.
The driver itself is very loosely based on rk_pwm.c for the general pwm
driver structure.

The devicetree binding file is from Linux, before it was converted to
YAML at 5df5a577a6b4 ("dt-bindings: pwm: Convert google,cros-ec-pwm.txt
to YAML format") in their repo.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-10 16:08:39 +02:00
Alper Nebi Yasak
fefa713b18 video: backlight: Support PWMs without a known period_ns
The PWM device provided by Chrome OS EC doesn't really support anything
other than setting a relative duty cycle. To support it as a backlight,
this patch makes the PWM period optional in the device tree and pretends
the valid brightness range is its period_ns.

Also adds a sandbox test for a PWM channel that has a fixed period,
checking that the resulting duty_cycle matches on a set_config() even if
the requested period_ns can't be set.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-10 16:07:12 +02:00
Tom Rini
a99dab1d33 ppc: Remove Cyrus_P5020 and P5040 boards
These boards have not been converted to CONFIG_DM_MMC by the deadline.
Remove them.  As the P5020 is the last ARCH_P5020 platform, remove that
support as well.

Cc: Andy Fleming <afleming@gmail.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-10 08:05:07 -04:00
Tom Rini
2322b9568f ppc: Remove T2081QDS board and ARCH_T2081 support
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.  It is also the only ARCH_T2081 board so remove that support
as well.

Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:04:42 -04:00
Tom Rini
bf85995a25 ppc: Remove TARGET_T1040QDS references
The TARGET_T1040QDS platforms have been removed already, drop some
remaining references in the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:04:42 -04:00
Tom Rini
9ac8368071 arm: Remove s32v234evb board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Eddy Petrișor <eddy.petrisor@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:01:00 -04:00
Tom Rini
c6c26a05b8 arm: Remove vexpress_ca15_tc2 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:00:12 -04:00
Tom Rini
4652bef1b6 arm: Remove apf27 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Philippe Reynes <tremyfr@yahoo.fr>
Cc: Eric Jarrige <eric.jarrige@armadeus.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:35 -04:00
Tom Rini
a80e03683b drivers: ata: Remove mvsata_ide driver
The mvsata_ide driver was due for DM conversion by v2019.07.  As that
has long passed, remove the driver and disable it in the boards which
had enabled it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:30 -04:00
Tom Rini
90932da70c ata: DWC_AHSATA depends on BLK
The dwc ahsata driver is written such that CONFIG_BLK must be enabled,
add this as a dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:53:50 -04:00
Arnaud Patard (Rtp)
9749d2ea29 rockchip: video: vop: Add reset support
In order to ensure that the VOP registers are in correct state,
add missing support for the VOP reset lines found in the device-tree

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:57:03 +02:00
Arnaud Patard (Rtp)
cd529f7ad6 rockchip: video: edp: Add missing reset support
In order to ensure that the eDP registers are in correct state,
add missing support for the eDP reset lines found in the device-tree.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:56:22 +02:00
Arnaud Patard (Rtp)
3fd64112ce rockchip: video: vop: Fix format of fbbase in debug string
The debug string printing the device name, framebuffer address and of node
is using %lu as format for the framebuffer address, which is not so nice.
Change it to %lx.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:55:37 +02:00
Arnaud Patard (Rtp)
4db3926874 rockchip: pwm: Fix default polarity
In the code, the default polarity is set to positive/positive,
which is neither normal polarity or inverted polarity. It's
only the hardware default. This leads to booting linux with
wrong polarity setting.

Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE
by default instead.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:54:59 +02:00
Arnaud Patard (Rtp)
decbc18ed2 Rockchip: video: vop: Reserve efi fb memory
When booting with EFI and graphics, the memory used for framebuffer
has to be reserved, otherwise it may leads to kernel memory
overwrite.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:53:36 +02:00
Arnaud Patard (Rtp)
04d67ceb1c rockchip: video: edp: Add rk3399 support
According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP
support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399
eDP IPs are nearly the same, the difference is in the grf register
(SOC_CON6 versus SOC_CON20). So, change the code to use the right
register on each IP.

The clocks don't seem to be the same, the eDP clock is not at index 1
on rk3399, so don't try changing the clock at index 1 to rate 0 on
rk3399.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:51:56 +02:00
Arnaud Patard (Rtp)
7fe2ebf3a3 rockchip: video: vop: Use endpoint compatible string to find VOP mode
The current code is using an hard coded enum and the of node reg value of
endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order
is different between rk3288, rk3399 vop little, rk3399 vop big.

A possible solution would be to make sure that the rk3288.dtsi and
rk3399.dtsi files have "expected" reg value or an other solution is
to find the kind of endpoint by comparing the endpoint compatible value.

This patch is implementing the more flexible second solution.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:51:13 +02:00
Tom Rini
3f2e3c7845 Add rt-thread art-pi board support based on STM32H750 SoC
Add Engicam i.Core STM32MP1 SoM
 Add FIP header support for STM32programmer
 Update uart number when no serial device found for STM32MP1
 Remove board_check_usb_power function when ADC flag is not set
 Update SPL size limitation for STM32MP1
 Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmBwTr0cHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/plSwD/9SAhxTYqAblFZqZmJj
 Lu+F5fwuXXd8S5LwqNeIKULv+UhJngClkE4HdjSl6T0yR10v6YkPNRDVj4+1gzBd
 wZizmCsnqqDW0QGsTO5AVo+oTwhX4RHkvxEF7BjOqtVuoMZGiozE53+29QORHTnZ
 +j8CYAeORf9wvGAi5y+Wr8ICqP6HwPJPNlta4S8iYC867BM38R9evBqynlaZaWPE
 8FhaXwbAj9ZR9ifCiO+7ObgfXGDT63ejCecjE+539m3FWlBrn+/AWLsg4zF037Dw
 DcV324pnVFP4AIOVsuc9hF7luAYctoXQcNHt1QbD3gmWqPQAgpH8Llfq5cMyudza
 /m/112Y7fuLxO3F14DzZSj5l3ims0XG56Yg7zBwN6exDPr3iWA4UwTSH9lRJDnBq
 aJyvLfAFAvz+X15oePjrQrVp7c+6MigeY2nmhVCWV53Yrl+/TnnekQXlHJ3TsHED
 bPW5/LarLge18uACTZvLzYruIvDSU3INPP1W0vUu7YMDwuEp21K1GSspN7yA0yDK
 nrWXxmYJGVWanAEvW//zuuqUhxtNjAb/qIQl0UgjFN9cDT5vJZ7oY3nWOwP+0V2a
 o+qrRxBTWSVliOShYpfjyHRsASRna2QLLUNQaBeoUqZBKNnFvuw4LZzmqNvV+Idj
 +XWRCiSDJnf1zRrMwFLvZZ+UTQ==
 =4VxR
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20210409' of https://source.denx.de/u-boot/custodians/u-boot-stm

Add rt-thread art-pi board support based on STM32H750 SoC
Add Engicam i.Core STM32MP1 SoM
Add FIP header support for STM32programmer
Update uart number when no serial device found for STM32MP1
Remove board_check_usb_power function when ADC flag is not set
Update SPL size limitation for STM32MP1
Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
2021-04-09 13:10:59 -04:00
Tom Rini
a1e95e3805 u-boot-imx-20210409
-------------------
 
 - Secure Boot :
 	- HAB for MX8M / MX7ULP
 	- CAAM fixes
 - Fixes for imxrt1020
 - Fixes for USDHC driver
 - Fixes for Toradex (Colibri / Apalis)
 - Switch to DM for several boards
 	- mx23 olinuxo
 	- usbarmory
 	- marsboard / riotboard
 	- Gateworks GW Ventana
 - NXP upstream patches (LPDDR / CAAM / HAB)
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQS2TmnA27QKhpKSZe309WXkmmjvpgUCYHA8Xg8cc2JhYmljQGRl
 bnguZGUACgkQ9PVl5Jpo76aVbQCfb0Z+N836ZSAodyLa0t6FSHgKqfYAnRdrWQAv
 MNlGOmmpfHENtE75eSnd
 =g48D
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20210409' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20210409
-------------------

- Secure Boot :
	- HAB for MX8M / MX7ULP
	- CAAM fixes
- Fixes for imxrt1020
- Fixes for USDHC driver
- Fixes for Toradex (Colibri / Apalis)
- Switch to DM for several boards
	- mx23 olinuxo
	- usbarmory
	- marsboard / riotboard
	- Gateworks GW Ventana
- NXP upstream patches (LPDDR / CAAM / HAB)

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
2021-04-09 10:08:52 -04:00
dillon min
1f0305e0d0 ram: stm32: fix strsep failed on read only memory
strsep will change data from original memory address,
in case the memory is in non-sdram/sram place, will
run into a bug(hang at SDRAM: )

just add a temporary array to store bank_name[] to fix this
bug.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
Haibo Chen
8974ff1a60 mmc: fsl_esdhc_imx: add extra delay for IO voltage switch if necessary
Some board like imx8mm-evkb, IO voltage switch from 3.3v to 1.8v need
around 18ms, common code only delay 10ms, so need to delay extra 8ms.
Otherwise voltage switch will timeout when wait for data0 line.

This IO voltage switch time depends on board design, depend on the
PMIC and capacitance. imx8mm-evkb board use PCA9450(PMIC) and 10uF
capacitance.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08 23:59:50 +02:00
Haibo Chen
1e595a81d9 mmc: fsl_esdhc_imx: remove redundant cmd11 related code.
Common code already handle the voltage switch sequence based on spec,
so remove the redundant voltage switch code.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08 23:59:50 +02:00
Haibo Chen
63756575b4 mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output
For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these
are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the
card clock output.

After commit b5874b552f ("mmc: fsl_esdhc_imx: add wait_dat0() support"),
we meet SD3.0 card can't work at UHS mode, mmc_switch_voltage() fail because
the second mmc_wait_dat0 return -ETIMEDOUT. According to SD spec, during
voltage switch, need to gate off/on the card clock. If not set the FRC_SDCLK_ON,
after CMD11, hardware will gate off the card clock automatically, so card do
not detect the clock off/on behavior, so will draw the data0 line low until
next command.

Fixes: b5874b552f ("mmc: fsl_esdhc_imx: add wait_dat0() support")
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08 23:44:40 +02:00
Tim Harvey
aa0032f672 spl: fit: nand: allow for non-page-aligned elements
Add a weak nand_get_mtd function for nand drivers to provide mtd info
and use this to set pagesize such that reading of non page-aligned
elements can succeed.

The spl_load_simple_fit already handles block block access so all we
need to do is provide the nand writesize as the block length.

Further cleanup of the drivers which use nand_spl_loaders.c such as
am335x_spl_bch.c, atmel_nand.c, and nand_spl_simple.c could be done
using info from mtd_info instead of statically defined details.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-04-08 20:29:53 +02:00
Ye Li
2ff17d2f74 crypto: fsl: refactor for 32 bit version CAAM support on ARM64
Previous patch "MLK-18044-4: crypto: caam: Fix pointer size to 32bit
for i.MX8M" breaks the 64 bits CAAM.

Since i.MX CAAM are all 32 bits no matter the ARM arch (32 or 64),
to adapt and not break 64 bits CAAM support,  add a new config
CONFIG_CAAM_64BIT and new relevant type "caam_dma_addr_t".

This config is default enabled when CONFIG_PHYS_64BIT is set except
for iMX8M.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:53 +02:00
Breno Lima
58fc03e2a6 fsl_mfgprot: Fix typo in sign_mppubk()
The signature is generated using manufacturing protection private key.

Fix typo in fsl_mfgprot.c.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:52 +02:00
Clement Faure
56d2050f40 imx8m: Add DEK blob encapsulation for imx8m
Add DEK blob encapsulation support for IMX8M through "dek_blob" command.
On ARMv8, u-boot runs in non-secure, thus cannot encapsulate a DEK blob
for encrypted boot.
The DEK blob is encapsulated by OP-TEE through a trusted application call.
U-boot sends and receives the DEK and the DEK blob binaries through OP-TEE
dynamic shared memory.

To enable the DEK blob encapsulation, add to the defconfig:
CONFIG_SECURE_BOOT=y
CONFIG_FAT_WRITE=y
CONFIG_CMD_DEKBLOB=y

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:52 +02:00
Tom Rini
f6127db8cc Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- Watchdog, Unleashed and Icicle improvements
2021-04-08 07:33:14 -04:00
Bin Meng
53a97d22f1 clk: mpfs_clk: Enable DM_FLAG_PRE_RELOC flag
This driver is needed in the pre-relocation phase as the serial
driver depends on it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
2021-04-08 15:37:30 +08:00
Bin Meng
9c02e50fa1 timer: sifive_clint: Support the official clint DT bindings
Linux kernel commit a2770b57d083 ("dt-bindings: timer: Add CLINT bindings")
adds the official DT bindings for CLINT, which uses "sifive,clint0"
as the compatible string. "riscv,clint0" is now legacy and has to
be kept for backward compatibility of legacy systems.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-04-08 15:37:29 +08:00
Bin Meng
ae2d9506a3 riscv: sifive: Rename fu540 board to unleashed
In preparation to add SiFive Unmatched board support, let's rename
the existing fu540 board to unleashed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-04-08 15:37:29 +08:00
Sean Anderson
97bcdd28ad wdt: dw: Free the clock on error
The clock subsystem requires that clk_free be called on clocks obtained via
clk_get_*.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-08 15:37:27 +08:00
Sean Anderson
4cb0ab4ebc wdt: dw: Enable the clock before using it
The watchdog won't work if the clock isn't enabled.

Fixes: cf89ef8d10
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-08 15:37:27 +08:00
Sean Anderson
7d8394366a wdt: dw: Switch to if(CONFIG()) instead of using #if
This is preferred over #if because the compiler can check syntax even if
the feature is disabled. This cannot be used for CONFIG_CLK because
CONFIG_DW_WDT_CLOCK_KHZ is not defined on all platforms.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-08 15:37:27 +08:00
Sean Anderson
cb57811fbc wdt: dw: Switch to using fls for log2
log_2_n_round_up is only found in arm. fls performs the same job and is
generic.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-08 15:37:27 +08:00
Aymen Sghaier
a018e6e4f7 crypto: caam: Fix pointer size to 32bit for i.MX8M
The CAAM block used in i.MX8M is 32 bits address size but when the flag
 PHYS_64BIT is enabled for armv8, the CAAM driver will try to use a
 wrong pointer size.
  This patch fixes this issue.

Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00