Commit Graph

67751 Commits

Author SHA1 Message Date
Michal Simek
653809f43f xilinx: common: Get rid of initrd_high variable setup
When bootm_low/bootm_size are setup properly there is no need to setup any
initrd_high address. Location for initrd is determined through LMB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
0bfb43dfc1 xilinx: common: Get rid of fdt_high variable
There is no need to setup this variable if bootm_low and bootm_size
variable are properly setup. If fdt_high variable is missing U-Boot is
asking LMB to return free memory which is not used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
9fea3b18d6 xilinx: Change logic around zynq_board_read_rom_ethaddr()
There is no reason to build private function when
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak
function which handles default case properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
62b96262b6 xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIG
Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG to enable/disable updating
variables with run time information.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
d5c42ec31b xilinx: versal: Enable i2c misc eeprom driver
Enable this driver to be able to work with i2c based eeproms on Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
de4f748ef5 xilinx: zynqmp: fix incorrect map not align with IPI HW
Current IPI module register description is not align with IPI HW. The
registers with the wrong offset are not used so it does not cause real
issues. This patch aligns the register description.

Additionally comments added to explain why recv function does not check
any flag prior copying rx data.

Fixes: 660b0c77d8 ("mailbox: zynqmp: ipi mailbox driver")
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
050f10f103 xilinx: zynqmp: remove chip_id function
Remove chip_id function and integrate the firmware call in the
zynqmp_get_silicon_idcode_name function. The change avoids querying the
firmware twice and makes the code bit more clear.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
4b2ad7b111 xilinx: zynqmp: get chip ID at EL3
Modify the board init function to allow getting the chip ID when U-Boot
proper is executed at EL3.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
21c2fc7c6a xilinx: zynqmp: get chip ID using firmware driver
Current implementation for getting chip ID uses either raw access on EL3
or a SMC call to get the silicon information. Following change
simplifies the code using always the firmware driver.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
2eabb6bfea xilinx: zynqmp: merge firmware calls for EL2 and EL3
This patch merges ZynqMP firmware calls under xilinx_pm_request in order
to make trainsparent the EL. Calls at EL3 are send through IPI messages
and EL2 through SMC calls.

The EL2 call uses fixed payload and arg size as the EL3 call. The
firmware is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the
firmware API is limited by the SMC call size.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
f6cccbb5f2 xilinx: zynqmp: synchronize firmware call return payload
Removes duplicated definition of PAYLOAD_ARG_CNT and define it in the
firmware driver. Additionally fixes payload buffer declarations without
macro usage

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
e8deb22185 mmc: zynq: Fix default value for xlnx,mio-bank
DT binding is saying that default value is 0 not -1 that's why fix it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-08-20 09:49:20 +02:00
Michal Simek
01a6da1661 xilinx: Fix xlnx,mio_bank property
s/xlnx,mio_bank/xlnx,mio-bank/g

DT binding is describing mio-bank not mio_bank that's why fix all DTSes and
also driver itself.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-08-20 09:49:20 +02:00
Michal Simek
f692b479f0 i2c: eeprom: Use reg property instead of offset and size
Remove adhoc dt binding for fixed-partition definition for i2c eeprom.
fixed-partition are using reg property instead of offset/size pair.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-20 09:49:20 +02:00
Michal Simek
2d06361a11 xilinx: zynqmp: Enable DFU tftp support
Enable DFU tftp support for firmware update. Fill dfu_ram_tftp variable to
have command present for showing how to use it.

boot FIT image has been created from below fragment. Key part is that type
of image has to be firmware. Also based on experiment load property is
completely ignored and base addresses are taken from dfu_alt_info variable.

$ cat update_uboot.its
/dts-v1/;

/ {
	description = "Automatic U-Boot update";
	#address-cells = <1>;

	images {
		Image {
			description = "Kernel";
			data = /incbin/("/tftpboot/Image");
			compression = "none";
			arch = "arm64";
			type = "firmware";
			os = "linux";
			load = <0x80000>;
			entry = <0x80000>;
			hash-1 {
				algo = "sha1";
			};
		};
		system.dtb {
			description = "DTB";
			data = /incbin/("/tftpboot/system.dtb");
			compression = "none";
			arch = "arm64";
			type = "firmware";
			load = <0>;
			hash-1 {
				algo = "sha1";
			};
		};
	};
};

$ mkimage -f update_uboot.its /tftpboot/boot

When U-Boot starts get IP address and server IP.
dhcp
setenv serverip 192.168.0.105

And then run prepared command.
run dfu_ram_tftp

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
9643000e14 xilinx: Align dfu ram with booti command
Image should be loaded to 0x80000 address and not to $kernel_addr_r.
Also kernel_addr, fdt_addr and fdt_size in zynqmp case are not defined
that's why define it to be aligned with Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ashok Reddy Soma
8d00d224c9 arm64: zynqmp: Reduce malloc memory for mini QSPI configuration
Mini U-boot runs on lower foot print of 256KB OCM. Hence 8K memory
for malloc may not be required. Reduce it by 1.5K.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
22b6bb6ccd xilinx: versal: Use lowest memory for U-Boot
Find and use the lowest memory for Versal to make sure that we keep u-boot
as low as possible and never use memory above u-boot's maximum VA mapping.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
c2f0950c33 lib: fdt: Convert fdtdes_setup_mem..() to livetree API
Convert fdtdec_setup_mem_size_base(), get_next_memory_node(),
fdtdec_setup_memory_banksize() and fdtdec_setup_mem_size_base_lowest() to
livetree API.

Tested on ZynqMP zcu104 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-20 09:49:20 +02:00
Michal Simek
7fce739665 lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest()
New function should be called from board dram_init() because it initialized
gd->ram_base/ram_size. It finds the lowest available memory.

On systems with multiple memory nodes finding out the first memory node by
fdtdec_setup_mem_size_base() is not enough because this memory can be above
actual U-Boot VA mapping. Currently only mapping till 39bit is supported
(Full 44bit mapping was removed by commit 7985cdf74b ("arm64: Remove
non-full-va map code")).
If DT starts with the first memory node above 39bit address then system can
be unpredictable.

The function is available only when multiple memory bank support is
enabled.

Calling fdtdec_setup_memory_banksize() from dram_init() is not possible
because fdtdec_setup_memory_banksize() is saving dram information to bd
structure which is placed on stack but not initialized at this time. Also
stack is placed at location setup in dram_init().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
11b1dcec09 versal: fix versal PM ret payload size
The PM return payload size is defined as 4 bytes for Versal arquitecture
while the PM calls implemented both in the Versal clock driver and
ZynqMP firmware driver expects 5 bytes length.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
T Karthik Reddy
526a67eb35 xilinx: versal: Add new versal loadpdi command
Versal loadpdi command is used for loading secure & non-secure
pdi images.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Igor Lantsman
1b208d59ba arm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB
Origin function was calling strsep which replaced delimiter ',' by a null
byte ('\0'). Operation was done directly on FDT which ends up with the
following behavior:

ZynqMP>  printenv fdtfile
fdtfile=xilinx/zynqmp.dtb
ZynqMP> fdt addr $fdtcontroladdr
ZynqMP> fdt print / compatible
compatible = "xlnx", "zynqmp"

As is visible fdtfile was correctly composed but a null byte caused that
xlnx was separated from zynqmp.
This hasn't been spotted because in all Xilinx DTs there are at least 3
compatible string and only the first one was affected by this issue.
But for systems which only had one compatible string "xlnx,zynqmp" it was
causing an issue when U-Boot's DT was used by Linux kernel.

The patch removes strsep calling and strchr is called instead which just
locate the first char after deliminator ',' (variable called "name").
And using this pointer in fdtfile composing.

Fixes: 91d7e0c47f ("arm64: zynqmp: Create fdtfile from compatible string")
Reported-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
834de89842 xilinx: Enable preboot feature for ZynqMP and Versal
Enable preboot functionality for ZynqMP and Versal platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:46:55 +02:00
Michal Simek
664e16ce99 xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-20 09:46:55 +02:00
Michal Simek
c8da6513c0 xilinx: Setup bootm variables
On system with PL DDR which is placed before PS DDR in DT
env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low
and bootm_size variables are taking by default gd->bd->bi_dram[0].start and
gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be
PS ddr and even can be memory above 39bit VA which is what U-Boot supports
now.
That's why setup bootm variables based on ram_base/ram_size setting to make
sure that boot images are placed to the same location as U-Boot is placed.
This location should be by default location where OS can boot from.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:46:55 +02:00
Frank Wunderlich
7cf8537d5e dts: r64: add sata- and asm_sel nodes
asm_sel is for switching between sata and pcie mode
on r64 there is GPIO90 connected to ASM1480 which
switches RX/TX pairs to PCIe/SATA connector
output-low means sata-controller is active

with 2020-10 now reg is also needed for the phy itself

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:15 -04:00
Frank Wunderlich
38bff327d7 ahci: mediatek: add ahci driver
add AHCI driver ported from linux

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/ata/ahci_mtk.c

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:15 -04:00
Frank Wunderlich
fee276ee31 reset: add basic reset controller for pciesys
bind reset controller to pciesys

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:15 -04:00
Frank Wunderlich
ffbcde248d phy: mtk-tphy: add PHY_TYPE_SATA
add support for PHY_TYPE_SATA to Mediateks TPHY driver

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-19 17:38:15 -04:00
Frank Wunderlich
362e5e1e19 arm: dts: mt7622: add SATA reset constants
add reset constants used for SATA to header file

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:14 -04:00
Frank Wunderlich
f08c2c2d87 arm: dts: mt7622: add PCIe nodes for BananaPi-R64
this patch adds PCIe-Nodes for BananaPi R64

original nodes from Chuanjia Liu for mt7622-rfb

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:14 -04:00
Frank Wunderlich
8ad2fc413f dts: r64: add r64 dts
add a separate DTS for BananaPi R64 because it has 1GB RAM and SATA-Support

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:14 -04:00
Frank Wunderlich
35d0fdbf17 arm: dts: add watchdog-node for mt7622
adding a watchdog-node to mt7622 dtsi

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:37:37 -04:00
Chuanjia Liu
b5d4cbbf13 configs: mt7622: add PCIe controller related configs
Add PCIe command and related configs

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Signed-off-by: Henry Yen <henry.yen@mediatek.com>
2020-08-19 17:37:37 -04:00
Chuanjia Liu
bb9d3ad521 arm: dts: mediatek: add PCIe node for MT7622
This patch adds PCIe node in dts for Mediatek MT7622 Soc.

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Signed-off-by: Henry Yen <henry.yen@mediatek.com>
2020-08-19 17:37:37 -04:00
Chuanjia Liu
91ee45d806 PCI: mediatek: Add PCIe support for MT7622
This patch adds PCIe support for the Mediatek MT7622 SOC.

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Signed-off-by: Henry Yen <henry.yen@mediatek.com>
2020-08-19 17:37:37 -04:00
Chuanjia Liu
0cc587dd86 arm: dts: mediatek: add pciesys support for MT7622 SoC
This patch adds pciesys support in dts for MediaTek MT7622 SoC.

Signed-off-by: Henry Yen <henry.yen@mediatek.com>
Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
2020-08-19 17:37:37 -04:00
Chuanjia Liu
c5bfe694e7 clk: mediatek: add pciesys support for MT7622 SoC
This patch adds pciesys support in clock driver for
MediaTek MT7622 SoC.

Signed-off-by: Henry Yen <henry.yen@mediatek.com>
Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
2020-08-19 17:37:37 -04:00
Chunfeng Yun
324220da63 pinctrl: mediatek: mt8512: fix the wrong start address of ranges
The start address of dout, pullen and pullsel ragnes are wrong,
so fix up them.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-19 17:37:37 -04:00
Tom Rini
ba989cf1ca UniPhier SoC updates for v2020.10 (2nd)
- minor code cleanups
 
  - sync DT with Linux
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Merge tag 'uniphier-v2020.10-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier

UniPhier SoC updates for v2020.10 (2nd)

 - minor code cleanups

 - sync DT with Linux
2020-08-18 21:28:49 -04:00
Wig Cheng
4992090ed4 pico-imx6ul: convert ethernet function to DM_ETH
- Remove pinmux definition from pico-imx6ul.c
- Enable NET_RANDOM_ETHADDR for temporary solution, because micrel_ksz8xxx
driver does not support DM_ETH yet, so cannot read MAC address directly.

Before enable DM_ETH:
  Net:   FEC [PRIME]

After enable DM_ETH:
  Net:
  Warning: using random MAC address - ca:3f:43:8f:67:d4
  eth1: ethernet@20b4000

Here is the test commands:
  => dhcp
  BOOTP broadcast 1
  DHCP client bound to address 10.88.88.94 (139 ms)
  *** ERROR: `serverip' not set
  Cannot autoload with TFTPGET
  => ping 8.8.8.8
  Using ethernet@20b4000 device
  host 8.8.8.8 is alive

Signed-off-by: Wig Cheng <wig.cheng@technexion.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-18 10:10:25 +02:00
Wig Cheng
d9d77a5209 configs: pico-imx6ul: convert DM_VIDEO
It's due to the warning messages issue after compiled:

  ===================== WARNING ======================
  This board does not use CONFIG_DM_VIDEO Please update
  the board to use CONFIG_DM_VIDEO before the v2019.07 release.
  Failure to update by the deadline may result in board removal.
  See doc/driver-model/migration.rst for more info.
  ====================================================

Enable DM_VIDEO can fix it on the stage of compilation.

Signed-off-by: Wig Cheng <wig.cheng@technexion.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-18 10:10:25 +02:00
Wig Cheng
6e861c35e7 configs: pico-imx6ul: convert DM_USB
Here is the test commands:

  => ums 0 mmc 0
  UMS: LUN 0, dev 0, hwpart 0, sector 0x0, count 0x710000

Signed-off-by: Wig Cheng <wig.cheng@technexion.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-18 10:10:25 +02:00
Matthias Schiffer
0c2b03cace tools/imximage: fix DCD Blocks message output order
The correct order is load address, offset, length. The order was
accidentally switched a while ago; make it match the HAB Blocks output and
what CST expects again.

Fixes: e97bdfa5da ("tools/imximage: share DCD information via Kconfig")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2020-08-18 10:10:25 +02:00
Masahiro Yamada
65282edbdf ARM: dts: uniphier: resync DT with Linux 5.9-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
351b74cb6d ARM: uniphier: use FIELD_GET() to get access to revision register fields
Define register fields as macros, and use FIELD_GET().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
26f0c8600e serial: uniphier: fix typo in comment
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
055e5ad287 ARM: uniphier: remove unneeded header inclusion from board_late_init.c
<nand.h> is unneeded since commit 9248a78f40 ("ARM: UniPhier: remove
Denali NAND controller fixup code").

<linux/io.h> is uneeded since commit 1320fa2e55 ("ARM: uniphier:
remove workaround for the NAND write protect").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
2dbb6beb00 ARM: uniphier: remove unused uniphier_pin_init()
This function is unused since commit 862274913f ("bus:
uniphier-system-bus: move hardware init from board files").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00