Commit Graph

16783 Commits

Author SHA1 Message Date
Giulio Benetti
76f6bcd742 video: mxsfb: enable setting ENABLE negative polarity
ENABLE signal can now be flipped by writing its bitmask on vdctrl0
register.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
7c30d767b8 video: mxsfb: enable setting PIXDATA on negative edge
DOTCLK signal can now be flipped by writing its bitmask on vdctrl0
register.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
606668af96 video: mxsfb: enable setting VSYNC negative polarity
VSYNC signal can now be flipped by writing its bitmask on vdctrl0
register.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
e121e00352 video: mxsfb: enable setting HSYNC negative polarity
HSYNC signal can now be flipped according to display_flags bitmaks by
writing its bitmask on vdctrl0 register.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
abda0a5a22 video: mxsfb: refactor for using display_timings
struct display_timings provides more informations such clock and DE
polarity, so let's refactor the code to use struct display_timings
instead of struct ctfb_res_modes, so we'll become able to get clock and
DE polarity settings and set register according to them in the next patch.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
aa045701c2 video: mxsfb: add support for i.MXRT
Add support for i.MXRT by adding CONFIG_IMXRT in register structure and
adding .compatible = "fsl,imxrt-lcdif".

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
ceb4ffc74d video: mxsfb: add support for DM CLK
Allow using DM CLK instead of mxs_set_lcdclk() so we can avoid to
implement a special function to set lcd clock on i.MXRT.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
92a68368c0 sunxi: display: use common video_ctfb_mode_to_display_timing()
Since video_ctfb_mode_to_display_timing() has been implemented by moving
sunxi_ctfb_mode_to_display_timing() to video_modes.c and it's meant to be
used by other video subsystem, let's use it instead of local
sunxi_ctfb_mode_to_display_timing().

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
10374da777 videomodes: add helper function to convert from ctfb to display_timing
This function converts from "struct ctf_res_modes" to
"struct display_timing".

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
ecd8497bcb clk: imx: clk-imxrt1050: add set_parent() callback
Need to add set_parent() callback to allow dts assigned-clock-parents to
work so let's add it accordingly.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-04-18 12:54:43 +02:00
Giulio Benetti
caac71b725 clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL
mxsfb needs PLL5 as source, so let's setup it at its default frequency
specified in RM(650Mhz).

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
d303f9c356 clk: imx: clk-imxrt1050: fix typo in clock name "video:"
"video:" must be "video", ":" is a typo.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
8cefbe98b1 clk: imx: pllv3: add enable_bit
pllv3 PLLs have powerdown/up bits but enable bits too. Specifically
"enable bit" enable the pll output, so when dis/enabling pll by
setting/clearing power_bit we must also set/clear enable_bit.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 12:54:43 +02:00
Tom Rini
0f238dab6d Merge tag 'arc-fixes-for-2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
This is pretty minor set of changes mostly touching HSDK board:

 * Enable on-chip reset controller on HSDK
 * Add possibility to turn-on & off L2$ on more
   recent ARC HS processors.
 * AXI tunnel clock calculation on HSDK
2020-04-16 17:14:44 -04:00
Tom Rini
cf87f7cd8c Pull request for UEFI sub-system for efi-2020-07-rc1
This pull request
 
 * provides an implementation of UEFI secure booting
 * fixes a problem with the rsa_mod_exp driver which stops some boards
   from booting when CONFIG_RSA is enabled which is needed for UEFI
   secure booting
 * enables the EFI_RNG_PROTOCOL if DM_RNG is enabled
 * fixes some function comments
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAl6YjlcACgkQxIHbvCwF
 GsQ6Jg/+KVRQF0Dn2jiag8Me9ZhafZx4xGTI3LEzFD7V9kG3dmUzbO3m8a5dEevW
 bcPNA6EmcKAjyP09AZY4C8ns4sU7wzPu/GQvApD4S5+vcuNbEqRHfW6zzReNXq09
 t89DrFH+XLhGnh4uSh0hmfjrlIPVi86hs/f57vKRayrBu8W2yGPci3SNTO5Y0AY1
 to7sxP3hGlDCUhqIABWp5ylpWWUSG1MsVNcMOnHpj+jl0iWWYP46EQrGr95egQor
 gcGgUOLdOLLOHPYUIOBmo9INnS2MbvE9Mfgh5Bw7JW8DIu/Xp7r1qePQyMLsngc1
 pO5yzwMq6EQy6OjuYnXdIBXtHOlZ8rnE9pbTgyUR8T/2CdL2hqr9ddpqa4ryDABX
 iaQF8FG+KhY0XQ5EIJV7pEkvf9TMwGguJNlOkmJPeub2n9i0k1tPk0Rwq5ZWWBIn
 rHcgZXwl0On3O3f0HvfL0Oas5u9KE1HhA12h/EVmu2Muy36x2WxAAzDnsH19HzqU
 QnWBAo8VMyp3qTIZjb3y+qrxcU/joPGt9+hxmur03hzmKOJ9JNOv6vExb+yUIyXQ
 4ML6jvTvSVZbvkP++0zMKOjT8ks3xv5q84oFD5Gp4cG8ZpHpA9dj3mXM92Waepo4
 pAkko5IGQ4SqaGIBltEQzrG+cCiHHezdD/raCwAo6DgYSmfZUvc=
 =+ZDZ
 -----END PGP SIGNATURE-----

Merge tag 'efi-2020-07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-07-rc1

This pull request

* provides an implementation of UEFI secure booting
* fixes a problem with the rsa_mod_exp driver which stops some boards
  from booting when CONFIG_RSA is enabled which is needed for UEFI
  secure booting
* enables the EFI_RNG_PROTOCOL if DM_RNG is enabled
* fixes some function comments
2020-04-16 16:41:40 -04:00
Eugeniy Paltsev
7b50db8242 ARC: HSDK: CGU: fix tunnel clock calculation
We set wrong tunnel PLL frequency when we request 125MHz tunnel clock.
Fix that.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-16 23:37:10 +03:00
Tom Rini
f51b4bcf61 Functions for reading indexed values from device tree
Enhancements to 'dm' command
 Log test enhancements and syslog driver
 DM change to read parent ofdata before children
 Minor fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAl6YdaMRHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIreYLRwf8C+vKmERVLLcrMZMMiLctbY2kVflJV8zG
 RjFwBcazZDPYjtHqClFZtJyIDYzgkVQRo+QPcdLxjcA+gjSXdteeRa0XTsBTXOZQ
 kbs7yBkL+rCIO2WyXtuyajsmDMQtqM5vYgeBdTeYnJu7NVxwRMYrUqqAKLolNpIN
 SKNYz+a8OEOG2EetbTdwwrmSpNy/cZ3wDGYK25DFTte8/vCZMRBTPiiNSrLp/RsM
 xIojRcLqzARwpvPfFZ8psASKei9+5oIICUrNvwwQGtjepvZwdFQEl90SKaHw8kMf
 sP9rxuqlEN5ec6xnMTUgwfnyBZgNIMSeb4KVPP1rxN2eAa5+bK1OlQ==
 =gyyY
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-10apr20-take2' of git://git.denx.de/u-boot-dm

Functions for reading indexed values from device tree
Enhancements to 'dm' command
Log test enhancements and syslog driver
DM change to read parent ofdata before children
Minor fixes
2020-04-16 13:45:03 -04:00
Simon Glass
b0dcc87106 dm: core: Read parent ofdata before children
At present a device can read its ofdata before its parent has done the
same. This can cause problems in the case where the parent has a 'ranges'
property, thus affecting the operation of dev_read_addr(), for example.

We already probe parent devices before children so it does not seem to be
a large step to do the same with ofdata.

Make the change and update the documentation in this area.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-16 08:07:58 -06:00
Patrick Delaunay
5c9c9bc957 dm: core: remove the duplicated function dm_ofnode_pre_reloc
The content dm_ofnode_pre_reloc() is identical with ofnode_pre_reloc()
defined in drivers/core/ofnode.c and used only three times:
- drivers/core/lists.c:lists_bind_fdt()
- drivers/clk/at91/pmc.c::at91_clk_sub_device_bind
- drivers/clk/altera/clk-arria10.c::socfpga_a10_clk_bind

So this function dm_ofnode_pre_reloc can be removed and replaced
by these function calls by ofnode_pre_reloc().

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Dario Binacchi
59006608d6 dm: core: refactor functions reading an u32 from dt
Now reading a 32 bit value from a device-tree property can be expressed
as reading the first element of an array with a single value.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Dario Binacchi
4bb7075c83 dm: core: support reading a single indexed u32 value
The patch adds helper functions to allow reading a single indexed u32
value from a device-tree property containing multiple u32 values, that
is an array of integers.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Simon Glass
ced1080489 dm: core: Add a way to skip powering down power domains
When removing a device the power domains it uses are generally powered
off. But when we are trying to unbind all devices (e.g. for running tests)
we don't want to probe a device in the 'remove' path.

Add a new flag to skip this power-down step.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Simon Glass
8474da946f dm: core: Add logging on unbind failure
This failure path is tricky to debug since it continues after failure and
there are a lot of error paths. Add logging to help.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Patrick Delaunay
0544ecbfe9 dm: core: Move "/chosen" and "/firmware" node scan
Use the new function dm_scan_fdt_ofnode_path() to scan all the nodes
which aren't devices themselves but may contain some:
- "/chosen"
- "/clocks"
- "/firmware"

The patch removes the strcmp call in recursive function dm_scan_fdt_live()
and also corrects a conflict with the 2 applied patches in
the commit 1712ca2192 ("dm: core: Scan /firmware node by default")
and in the commit 747558d014 ("dm: fdt: scan for devices under
/firmware too"): the subnodes of "/firmware" (optee for example)
are bound 2 times.

For example the dm tree command result on STM32MP1 is:

STM32MP> dm tree
 Class     Index  Probed  Driver                Name
 -----------------------------------------------------------
 root          0  [ + ]   root_driver           root_driver
 firmware      0  [   ]   psci                  |-- psci
 sysreset      0  [   ]   psci-sysreset         |   `-- psci-sysreset
 simple_bus    0  [ + ]   generic_simple_bus    |-- soc
...
 tee           0  [ + ]   optee                 |-- optee
...
 tee           1  [   ]   optee                 `-- optee

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:57 -06:00
Heinrich Schuchardt
67817b3b7a dm: core: remove redundant assignment
Variable count is initialized at the start of every round of the while
loop and it is not used after the while loop. So there is no need to
initialize it beforehand.

Identified by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:57 -06:00
Heinrich Schuchardt
f93a07dd4f dm: core: remove redundant if statement
The value of parent is not changed in the first if statement. So we can
merge the two if statements depending on parent.

Indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:57 -06:00
Simon Glass
8a770f9eb7 sandbox: p2sb: Silence compiler warning
Some compilers produce a warning about 'child' being used before init.
Silence this by setting to NULL at the start.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 08:07:57 -06:00
Sean Anderson
b41d4b83f0 serial: Set baudrate on boot
Currently, the baud rate is never set on boot. This works ok when a previous
bootloader has configured the baudrate properly, or when the baudrate is set to
a reasonable default in the serial driver's probe(). However, when this is not
the case, we could be using a different baud rate than what was configured.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-04-16 08:07:57 -06:00
Simon Glass
3cabcf966d x86: Move acpi_s3.h to include/acpi/
This header relates to ACPI and we are about to add some more ACPI
headers. Move this one into a new directory so they are together.

The header inclusion in pci_rom.c is not specific to x86 anymore, so drop
the #ifdef CONFIG_X86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
7ca2850cbc dm: core: Add basic ACPI support
ACPI (Advanced Configuration and Power Interface) is a standard for
specifying information about a platform. It is a little like device
tree but the bindings are part of the specification and it supports an
interpreted bytecode language.

Driver model does not use ACPI for U-Boot's configuration, but it is
convenient to have it support generation of ACPI tables for passing to
Linux, etc.

As a starting point, add an optional set of ACPI operations to each
device. Initially only a single operation is available, to obtain the
ACPI name for the device. More operations are added later.

Enable ACPI for sandbox to ensure build coverage and so that we can add
tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-16 14:36:28 +08:00
Simon Glass
9ece4b090f pci: Adjust dm_pci_read_bar32() to return errors correctly
At present if reading a BAR returns 0xffffffff then the value is masked
and a different value is returned. This makes it harder to detect the
problem when debugging.

Update the function to avoid masking in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-16 14:36:28 +08:00
Simon Glass
d8c7fb5036 dm: pci: Allow disabling auto-config for a device
Add a means to avoid configuring a device when needed. Add an explanation
of why this is useful to the binding file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
88307654af tpm: Don't cleanup unless an error happens
At present the cleanup() method is called on every transfer. It should
only be called on failing transfers. Fix this and tidy up the error
handling a little.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
32e8ee004a tpm: cr50: Use the correct GPIO binding
This device should use ready-gpios rather than ready-gpio. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
fe6831dac4 tpm: cr50: Add a comment for cr50_priv
Add a comment for the private structure

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
79b7ade5b5 tpm: cr50: Release locality on exit
At present the cr50 driver claims the locality and does not release it for
Linux. This causes problems. Fix this by tracking what is claimed, and
adding a 'remove' method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
600f584d81 cpu: Support querying the address width
Different CPUs may support different address widths, meaning the amount of
memory they can address. Add a property for this to the cpu_info struct.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Andy Shevchenko
5db92a0e96 serial: ns16550: Provide UART base clock speed in ->getinfo()
Some callers may need the UART base clock speed value.
Provide it in the ->getinfo() callback.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Andy Shevchenko
bf4661bcb0 dm: serial: Add clock member to struct serial_device_info
Some callers of serial_getinfo() would like to know the UART base
clock speed in order to make decision what to pass to OS in some
cases. In particular, ACPI SPCR table expects only certain base
clock speed and thus we have to act accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Heinrich Schuchardt
17e1174085 drivers: crypto: rsa_mod_exp: avoid DM_FLAG_PRE_RELOC
Function rsa_verify_key() is not called before relocation. So there is no
need to load the UCLASS_MOD_EXP drivers before relocation.

This avoid a failure to boot for pine64-lts_defconfig with CONFIG_RSA=y.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-16 08:12:32 +02:00
Tom Rini
66b8669d77 - Replace STM32MP1_TRUSTED by TFABOOT flag
- Enable bootd, iminfo, imxtract on ST defconfig
 - Rename LEDs to match silkscreen on AV96
 - Add KS8851-16MLL ethernet on FMC2
 - Define FMC2 base address
 - net: dwc_eth_qos: implement reset-gpios for stm32
 - net: dwc_eth_qos: implement phy reg and max-speed for stm32
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCgA1FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAl6WzDIXHHBhdHJpY2Uu
 Y2hvdGFyZEBzdC5jb20ACgkQysd4L3sz/6axxQ//eMrpWRXJN312XzPo9aj9Pxnn
 GOdYtIiRrV3hFHi5vtzhJ66OwLA3KSuFCL13u2rCeQpeF1gswsbKSQTAIAMp9OTk
 lG/4uSYpbjALI5dq3QdjQjCyx9TjRUtKjzd+amF6DSeTd2LJzbkh0JG70zfDgmh0
 OO4I/m9sDJ3qa/rsirxUu+LrhoCUcDFdPjfvUnvLYlE3WqH2bu+GP41nkDAKwrFG
 JEp0mVm8pmwU0e0OHmCDydUxz9WxOAybQjHl8JicWpqPfmkwdv2gPgWZQ5+h3NuR
 CRLclp5fmgxj096bttMDts9g4rOh+9PyWQWbQ3W+jZohCsnlZRXOkmowCsEAafoJ
 Anc2B4dODTiD5L1QNtRQID9LSMaAA3HGa1Yd2p72nYCAtZ0sBFgO8kfVKT7VhF7s
 dp6JQBPry1C6EWBujHcEPlMSj4nKgrlQJPtPyTu6r2tYzIHvz1TnpJ42k24NM7Vl
 ov2w16qSUsAKN8Hn69djF1VgUpVHDxlGAktfbhS5eXWUlZovBFk4UnhULt2w6pAW
 0HUbIFXLh2TgurtL3N/f7fJQBTYFGmaCZ/G7HiHEATZdcita9BRBuy7ipPIieXXP
 rbYn/5g+C6AOfUWLM2wMkN3eEVlgwF/cGB7TH1BZ052CBYL+TD7OINdbF3HBk3Lg
 F+G5GaDcL+bkyHGJh/A=
 =FNeD
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20200415' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Replace STM32MP1_TRUSTED by TFABOOT flag
- Enable bootd, iminfo, imxtract on ST defconfig
- Rename LEDs to match silkscreen on AV96
- Add KS8851-16MLL ethernet on FMC2
- Define FMC2 base address
- net: dwc_eth_qos: implement reset-gpios for stm32
- net: dwc_eth_qos: implement phy reg and max-speed for stm32
2020-04-15 12:10:51 -04:00
Patrick Delaunay
654706be84 configs: stm32mp1: replace STM32MP1_TRUSTED by TFABOOT
Activate ARCH_SUPPORT_TFABOOT and replace the arch stm32mp
specific config CONFIG_STM32MP1_TRUSTED by the generic CONFIG_TFABOOT
introduced by the commit 535d76a121 ("armv8: layerscape: Add TFABOOT
support").
This config CONFIG_TFABOOT is activated for the trusted boot chain,
when U-Boot is loaded by TF-A.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-15 09:08:37 +02:00
Patrick Delaunay
4f60a51d07 net: dwc_eth_qos: implement phy reg and max-speed for stm32
Add management of property "reg" to configure @ of phy and
also "max-speed" property to specify maximum speed in Mbit/s
supported by the device

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15 09:08:29 +02:00
Christophe Roullier
5177b31ba6 net: dwc_eth_qos: implement reset-gpios for stm32
Add management of property "reset-gpios" in the node identified by
"phy-handle" to configure any GPIO used to reset the PHY.

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15 09:08:29 +02:00
Rayagonda Kokatanur
19a159f94a watchdog: sp805_wdt: get platform clock from dt file
Get the watchdog platform clock from the DTS file
using clk subsystem and use the same for calculating
ticks in msec.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-15 08:54:07 +02:00
Rasmus Villemoes
40d7f3c8d1 watchdog: honour hw_margin_ms DT property
Some watchdog devices, e.g. external gpio-triggered ones, must be
reset more often than once per second, which means that the current
rate-limiting logic in watchdog_reset() fails to keep the board alive.

gpio-wdt.txt in the linux source tree defines a "hw_margin_ms"
property used to specifiy the maximum time allowed between resetting
the device. Allow any watchdog device to specify such a property, and
then use a reset period of one quarter of that. We keep the current
default of resetting once every 1000ms.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-15 08:54:00 +02:00
Rasmus Villemoes
b4d9452c44 watchdog: move initr_watchdog() to wdt-uclass.c
This function is a bit large for an inline function, and for U-Boot
proper, it is called via a function pointer anyway (in board_r.c), so
cannot be inlined.

It will shortly set a global variable to be used by the
watchdog_reset() function in wdt-uclass.c, so this also allows making
that variable local to wdt-uclass.c.

The WATCHDOG_TIMEOUT_SECS define is not used elsewhere.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-15 08:53:55 +02:00
Tom Rini
142a07f2a4 Merge branch 'master' of git://git.denx.de/u-boot-marvell
- Misc enhancements to Clearfog, including board variant detection
  (Joel)
- Misc enhancements to Turris Mox, including generalization of the
  ARMADA37xx DDR size detection (Marek)
2020-04-14 08:47:07 -04:00
Heinrich Schuchardt
a1dd1fcb6e arm: mvebu: drivers/ddr: remove redundant assignment
The value of local variable ecc is immediately overwritten. So we can
remove the first assignment.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Chris Packham
236609d93c ddr: marvell: a38x: Allow boards to specify CK_DELAY parameter
For some layouts it is necessary to adjust the CK_DELAY parameter to
successfully complete DDR training. Add the ability to specify the
CK_DELAY in the mv_ddr_topology_map.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2020-04-14 08:59:44 +02:00