The RX Control/Status register has bits that we want to preserve, so don't
just write out a single bit. Preserve the others bits in the process.
The original code posted to the u-boot list had this behavior, but looks
like it was lost somewhere along the way to merging.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
The multipoint handling under MUSB is optional, and some parts (like the
Blackfin processor) do not implement support for it.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
The dynamic FIFO handling under MUSB is optional, and some parts (like
the Blackfin processor) do not implement support for it.
Due to this, the FIFO reading/writing steps need special handling, so
mark the common versions weak so drivers can override.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Introduces various optimisations that approximately triple the
read data rate from NAND when run on da830evm.
Most of these optimisations depend on the endianess of the machine
and most of them are very similar to optimisations already present
in the Linux Kernel.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
All users of is_fsl_pci_agent have been converted to fsl_is_pci_agent
that uses the standard PCI programming model to determine host vs
agent/end-point.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.
This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.
Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.
Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Davinci: NAND enable ECC even when not in NAND boot mode
On Davinci platforms, the default NAND device is enabled (for ECC)
in low level boot code when NAND boot mode is used. If booting in
another mode, NAND ECC is not enabled. The driver should make
sure ECC is enabled regardless of boot mode if NAND is configured
in U-Boot.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Davinci: Configurable NAND chip selects
Add a CONFIG_SYS_NAND_CS setting to all davinci configs and
use it to setup the NAND controller in the davinci_nand
mtd driver.
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
Not all boards have both LEDs hooked, so enabling both on
boards with single LED will just waste power. Make it
possible to choose LEDs by adding argument to
twl4030_led_init().
Using this turn on only LEDB for pandora, leave both LEDs
on for all other boards, as it was before this patch.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Prototype for gunzip/zunzip was only in lib_generic/gunzip.c and thus
repeated in every file using it. This patch moves the prototypes to
common.h and removes all prototypes distributed anywhere else.
Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
OMAP3EVM uses ISP1504 phy and so twl4030 related init is not required.
Submitted-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
This change adds the usb device support for musb.
Omap3 platform support added at the same level as davinci.
The interface for usbtty to use the musb device support was added.
Verified on omap3 beagle, zoom1 and zoom2.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The twl4030 provides a PHY device for connecting a link device,
like musb, to physical connection.
This change adds the twl4030 usb registers and functions for
initializing the PHY as required by omap3.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The header files usb.h and usbdescriptors.h have the same nameed
structure definitions for
usb_config_descriptor
usb_interface_descriptor
usb_endpoint_descriptor
usb_device_descriptor
usb_string_descriptor
These are out right duplicates in usb.h
usb_device_descriptor
usb_string_descriptor
This one has extra unused elements
usb_endpoint_descriptor
unsigned char bRefresh
unsigned char bSynchAddress;
These in usb.h have extra elements at the end of the usb 2.0
specified descriptor and are used.
usb_config_descriptor
usb_interface_descriptor
The change is to consolidate the definition of the descriptors
to usbdescriptors.h. The dublicates in usb.h are removed.
The extra element structure will have their name shorted by
removing the '_descriptor' suffix.
So
usb_config_descriptor -> usb_config
usb_interface_descriptor -> usb_interface
For these, the common descriptor elements are accessed now
by an element 'desc'.
As an example
- if (iface->bInterfaceClass != USB_CLASS_HUB)
+ if (iface->desc.bInterfaceClass != USB_CLASS_HUB)
This has been compile tested on MAKEALL arm, ppc and mips.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
make -C drivers/bios_emulator/
make[2]: Entering directory
`drivers/bios_emulator'
In file included from atibios.c:49:
biosemui.h:47:21: error: biosemu.h: No such file or directory
...
x86emu/decode.c:40:28: error: x86emu/x86emui.h: No such file or directory
...
Due to lack of proper CPPFLAGS being passed to .depend generation rule
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
commit 60f61e6d76 breaks compile with gcc by introducing __func__
instead of constant string "func" in the macro call but missed to change the macro.
Signed-off-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
fec_init() will only allocate fec->base_ptr if it is non-NULL. But
the cleanup routine on error will free the pointer without setting
it to NULL. This means that a later call to fec_init() would result
in using an invalid pointer.
Signed-off-by: John Ogness <john.ogness@linutronix.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This chip is equipped for example on the esd PMC-ETH2-GB board. So let's
add it to the list of supported chips to the e1000 driver.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Make the lan91c96 driver capable of CONFIG_NET_MULTI
to be clean for the new arch, add a a lil detect function
Most of the formatting change was done to keep checkpatch
silent, but a few functions and #if 0ed code which
does not make sense for NET_MULTI have been removed
Now, use the lan91c96_initialize() function to init the driver
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Currently, the last block of NAND devices can't be accessed. This patch
fixes this issue by correcting the boundary checking (off-by-one error).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
There is more and more usage of printing 64bit values,
so enable this feature generally, and delete the
CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
defines.
Signed-off-by: Heiko Schocher <hs@denx.de>
Depending on offset, flash size and the number of bad blocks,
get_len_incl_bad may return a too small value which may lead to:
1) If there are no bad blocks, nand_{read,write}_skip_bad chooses the
bad block aware read/write code. This may hurt performance, but does
not have any adverse effects.
2) If there are bad blocks, the nand_{read,write}_skip_bad may choose
the bad block unaware read/write code (if len_incl_bad == *length)
which leads to corrupted data.
Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
This patch adds a unified s3c24x0 cpu header file that selects the header
file for the specific s3c24x0 cpu from the SOC and CPU configs defined in
board config file. This removes the current chain of s3c24-type #ifdef's
from the s3c24x0 code.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Because of Frame error, Parity error and Overrun error are occured only receive
operation, need to masking when error checking.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch moves the s3c24x0 header files from include/ to
include/asm-arm/arch-s3c24x0/.
checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due
to a non-UTF8 character in David M?ller's name:
ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8
#489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3:
+ * David M?ller ELSOFT AG Switzerland. d.mueller@elsoft.ch
As David's name correctly contains a non-UTF8 character I haven't fixed
these errors.
The 3 warnings were all because of the use of 'volatile' in s3c24x0.h:
WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35:
+typedef volatile u8 S3C24X0_REG8;
+typedef volatile u16 S3C24X0_REG16;
+typedef volatile u32 S3C24X0_REG32;
I'll fix these errors in another patch.
Tested by running MAKEALL for ARM8 targets and ensuring there were no new
errors or warnings.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds support for NAND devices with a page size of
4K in the DaVinci NAND driver. The layout matches the layout that TI uses
for 4K page size NAND devices in the kernel NAND driver.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch add nand_read_buf() for S3C2410 NAND SPL.
In nand_spl/nand_boot.c, nand_boot() will check nand->select_chip,
so nand->select_chip should also be initialized.
Signed-off-by: Hui.Tang <zetalabs@gmail.com>
This patch updates a check condition in the NAND driver.
The check condition is similat to what is in linux/next.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Add support to use second and third I2C bus, too.
Bus 0 is still the default, but by calling i2c_set_bus_num(1/2) before doing
I2C accesses, code can switch to bus 1 and 2, too. Don't forget to switch
back afterwards, then.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
This patch adds support for Flex-OneNAND devices.
Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com>
Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
The commit 66372fe2 manually relocated the bbt pattern pointer,
which can be removed by using full relocation.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
The syndrome based page read/write routines store ECC, and possibly other
"OOB" data, right after each chunk of ECC'd data. With ECC chunk size of
512 bytes and a large page (2KiB) NAND, the layout is:
data-0 OOB-0 data-1 OOB-1 data-2 OOB-2 data-3 OOB-3 OOB-leftover
Where OOBx is (prepad, ECC, postpad). However, the current "raw" routines
use a traditional layout -- data OOB, disregarding the prepad and postpad
values -- so when they're used with that type of ECC hardware, those calls
mix up the data and OOB. Which means, in particular, that bad block
tables won't be found on startup, with data corruption and related chaos
ensuing.
The current syndrome-based drivers in mainline all seem to use one chunk
per page; presumably they haven't noticed such bugs.
Fix this, by adding read/write page_raw_syndrome() routines as siblings of
the existing non-raw routines; "raw" just means to bypass the ECC
computations, not change data and OOB layout.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
When computing oobavail from the list of free areas in the OOB,
don't assume there will always be an unused slot at the end.
This syncs up with the kernel NAND driver.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The patch updates the check condition for determining
whether the ECC corrections has failed.
This makes it similar to what is in the kernel NAND driver.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This was originally part of Thomas Gleixner's patch for
adding support for 4KiB pages.
This is not part of the U-Boot NAND driver so updating the
driver with this to sync up with the kernel NAND driver.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch updates the "chip_shift" calculation in the
NAND driver. This is being done to sync up the NAND driver with
the kernel NAND driver.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for NANDs greater than 2 GB.
Patch is based on the MTD NAND driver in the kernel.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Make smc911x_initialize return -1 on error and number of interfaces
detected otherwise.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Sometimes, inside NetLoop, eth_halt() is called before eth_init() has
been called. This is harmless except for free() calls to pointers
which have not been allocated yet.
This patch initializes those pointers to NULL and allocates them only
the first time. This way we can get rid of free calls in halt callback.
This has been tested in i.MX27 Litekit board and eldk-4.2 toolchains.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch fixes erroneous access to the ethernet PHY which broke the driver.
1. Selector field in the auto-negotiation register must be 0x00001 for
using 802.3, not 0x00000 which is reseved.
2. Access to the PHY address specified by CONFIG_FEC_MXC_PHYADDR, not
0x0 fixed address.
This has been tested in i.MX27 Litekit board and eldk-4.2 toolchains.
Now using proper defines for auto-negotiation register.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch fixes the following warnings:
Configuring for xaeniax board...
smc91111_eeprom.c: In function 'print_macaddr':
smc91111_eeprom.c:278: warning: suggest parentheses around + or - in operand of &
smc91111_eeprom.c:281: warning: suggest parentheses around + or - in operand of &
...
Configuring for xsengine board...
smc91111_eeprom.c: In function 'print_macaddr':
smc91111_eeprom.c:278: warning: suggest parentheses around + or - inside shift
smc91111_eeprom.c:281: warning: suggest parentheses around + or - inside shift
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The following error was seen on impa7 board, due to its use of a 32-bit bus
on CS8900.
cs8900.c:137:37: error: macro "get_reg_init_bus" passed 2 arguments, but takes just 1
This patch gives the macro the correct number of arguments
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Ensure all CS8900 data structures are assigned before accessing device
Signed-off-by: Hui.Tang <zetalabs@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
commit 70ed869e broke fsl pcie end-point initialization.
Returning 0 is not correct. The function must return the first free
bus number for the next controller.
fsl_pci_init() must still be called and a bus allocated even if the
controller is an end-point.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This reverts commit 70ed869ea5.
There isn't any need to modify the API for fsl_pci_init_port to pass the
status of host/agent(end-point) status. We can determine that
internally to fsl_pci_init_port. Revert the patch that makes the API
change.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In 16 bpp mode, the new IPEK01 board only requires swapping of D16 words
for D32 accesses due to the diffferent connecting to the GDC bus. This
patch introduces the configuration option VIDEO_FB_16BPP_WORD_SWAP,
which should be set for all board using the mb862xx in 16 bpp mode. For
the IPEK01, VIDEO_FB_16BPP_PIXEL_SWAP should not be set.
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
The new IPEK01 board can use the 32 bpp mode for the Lime graphics
controller. For this mode, video accelaration does not work. This patch
makes the accelaration configurable via CONFIG_VIDEO_MB862xx_ACCEL,
which is enabled for the lwmon5 and the socrates board for backward
compatibility.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
To avoid board-specific code accessing the mb862xx registers directly,
the public function mb862xx_probe() has been introduced. Furthermore,
the "Change of Clock Frequency" and "Set Memory I/F Mode" registers
are now defined by CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx__MMR,
respectively. The BSPs for the socrates and lwmon5 boards have been
adapted accordingly.
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
The current transfer code relies on ctrlc() to abort transfers, but this
requires user interactivity. Naturalize the process with a timeout.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Proper behavior is to pull MAC address from NVRAM in the initialization() an
stuff it in dev->address, then program the device from dev->address in
the init() function.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Currently the CFI driver issues both AMD and Intel reset commands.
This is because the driver doesn't know yet which chips are connected.
This dual reset seems to cause problems with the M29W128G chips as
reported by Richard Retanubun. This patch now introduces a weak default
function for the CFI reset command, still with both resets. This can
be overridden by a board specific version if necessary.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Richard Retanubun <RichardRetanubun@ruggedcom.com>
Add missing newline.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Luigi Mantellini <luigi.mantellini@idf-hit.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Setup QE pin multiplexing for USB function, configure needed BCSRs
and add some fdt fixups.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Originally written by Jason Jin and Mingkai Hu for mpc8536.
When QorIQ based board is configured as a PCIe agent, then unlock/enable
inbound PCI configuration cycles and init a 4K inbound memory window;
so that a PCIe host can access the PCIe agents SDRAM at address 0x0
* Supported in fsl_pci_init_port() after adding pcie_ep as a param
* Revamped copyright in drivers/pci/fsl_pci_init.c
* Mods in 85xx based board specific pci init after this change
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some of the new spi flash files were missing explicit license lines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Move the test up in the function to not hang on systems without ethernet.
Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
fix the following compile warnings
warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes
to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4, 2/4 and 3/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch re-formats the arm920t s3c24x0 driver files, excluding the nand
driver, in preparation for changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4 and 2/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch includes the serial driver for s5pc1xx.
s5pc1xx uart driver needs own register setting and clock configuration.
So, need to special driver.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch includes the onenand driver for s5pc100
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Refactor the smc911x driver to allow for detecting when the chip is missing.
I.e. the detect_chip() function is called earlier and will abort gracefully
when the Chip ID read returns all 1's.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Forcing the tables into got2 caused extra relocation when using -mrelocatable.
This patch requires any board defining CONFIG_BIOSEMU to use -mrelocatable.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Jin Zhengxiong <Jason.Jin@freescale.com>
This feature is useful when your board uses different mii buses for different
phys and all (or a part) of these buses are implemented via bit-banging mode.
The driver requires that the following macros should be defined into the board
configuration file:
CONFIG_BITBANGMII - Enable the miiphybb driver
CONFIG_BITBANGMII_MULTI - Enable the multi bus support
If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs
to define at least the following macros:
MII_INIT - Generic code to enable the MII bus (optional)
MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional)
MDIO_ACTIVE - Activate the MDIO pin as out pin
MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
MDIO_READ - Read the MDIO pin
MDIO(v) - Write v on the MDIO pin
MDC_DECLARE - Declaration needed to access to the MDC pin (optional)
MDC(v) - Write v on the MDC pin
The previous macros make the driver compatible with the previous version
(that didn't support the multi-bus).
When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill
the bb_miiphy_buses[] array with a record for each required bus and declare
the bb_miiphy_buses_num variable with the number of mii buses.
The record (struct bb_miiphy_bus) has the following fields/callbacks (see
miiphy.h for details):
char name[] - The symbolic name that must be equal to the MII bus
registered name
int (*init)() - Initialization function called at startup time (just
before the Ethernet initialization)
int (*mdio_active)() - Activate the MDIO pin as output
int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin
int (*set_mdio)() - Write the MDIO pin
int (*get_mdio)() - Read the MDIO pin
int (*set_mdc)() - Write the MDC pin
int (*delay)() - Delay function
void *priv - Private data used by board specific code
The board code will look like:
struct bb_miiphy_bus bb_miiphy_buses[] = {
{ .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... },
{ .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... },
...
int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
sizeof(bb_miiphy_buses[0]);
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Modify all existing *.c files to use the new register names
as seen in the AMCC manuals.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
if link up detection code is disabled through config option, it gives build warning.
This patch fixes the same
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
