Vikas Manocha
6c9a10034a
stm32f7: sdram: use sdram device tree node to configure sdram controller
...
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:05 -04:00
Vikas Manocha
d0b24c1aa9
stm32f7: use clock driver to enable sdram controller clock
...
This patch also removes the sdram/fmc clock enable from board specific
code.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:04 -04:00
Vikas Manocha
910a52ede3
stm32f7: dm: add driver model support for sdram
...
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:02 -04:00
Vikas Manocha
bf1ae4426b
stm32f7: sdram: move sdram driver code to ram drivers area
...
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:02 -04:00
Masahiro Yamada
40c9abbd6b
ram: rename CONFIG_SPL_RAM_SUPPORT to CONFIG_SPL_RAM
...
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-18 13:46:02 -04:00
Simon Glass
64ce0cad9e
dm: test: Add a test for the ram uclass
...
Add a test to confirm that we can probe this device and get information on
the available RAM.
Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:32 -06:00
Simon Glass
6c51df6859
dm: Add support for RAM drivers
...
Add support for a driver which sets up DRAM and can return information about
the amount of RAM available. This is a first step towards moving RAM init
to driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:27 -06:00
