Haiying Wang
6cfea33477
Remove unneeded INIT_RAM_LOCK cache twiddling.
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Correctly tracks r29 as global data pointer now.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2006-05-10 09:38:06 -05:00
Jon Loeliger
5c9efb36a6
Cleanup whitespaces and style issues.
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Removed //-style comments.
Use 80-column lines.
Remove trailing whitespace.
Remove dead code and debug cruft.
2006-04-27 10:15:16 -05:00
Jon Loeliger
debb7354d1
Initial support for MPC8641 HPCN board.
2006-04-26 17:58:56 -05:00
Wolfgang Denk
8419c01304
MPC5200: enable snooping of DMA transactions on XLB even if no PCI
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is configured; othrwise DMA accesses aren't cache coherent which
causes for example USB to fail.
2006-04-18 11:05:03 +02:00
Wolfgang Denk
cf48eb9abd
Some code cleanup
2006-04-16 10:51:58 +02:00
Wolfgang Denk
9bc97a3d91
Fix Lite500B support: Merge with /home/raj/git/u-boot.l5200b_pci
2006-04-06 10:42:23 +02:00
Wolfgang Denk
197b049b8b
Merge with /home/sr/git/u-boot/4xx-sdram
2006-04-05 23:55:15 +02:00
Wolfgang Denk
db28ddb4da
Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S
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Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473]
2006-04-03 15:46:10 +02:00
Wolfgang Denk
d87080b721
GCC-4.x fixes: clean up global data pointer initialization for all boards.
2006-03-31 18:32:53 +02:00
Stefan Roese
62534beb2f
Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
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405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Patch by Stefan Roese, 17 Mar 2006
2006-03-31 14:32:07 +02:00
Rafal Jaworowski
b66a938342
Set SDelay register in the DDR controller for the MPC5200B chip.
2006-03-29 13:17:09 +02:00
Markus Klotzbuecher
2770bcb21c
Merge with http://www.denx.de/git/u-boot.git
2006-03-24 15:43:16 +01:00
Markus Klotzbuecher
40b0bafbb2
Added config options CFG_MONAHANS_RUN_MODE_OSC_RATIO and
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CFG_MONAHANS_TURBO_RUN_MODE_RATIO for configuring the Monahans core
frequency.
2006-03-24 14:35:25 +01:00
Markus Klotzbuecher
ba70d6a417
delta board: DA9030 initialization and i2c support. Some minor changes to
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make the pxa i2c driver work with the monahans cpu.
2006-03-24 12:23:27 +01:00
Wolfgang Denk
7b4fd36b03
Add support for MPC859/866 Rev. A.0
2006-03-18 23:31:12 +01:00
Rafal Jaworowski
dc9e499c62
Support for DDR with 32-data path. Addotional notes on injecting
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multiple-bit errors.
2006-03-16 17:46:46 +01:00
Marian Balakowicz
4c8d1ecce2
Add support for ECC DDR initialization on MPC83xx.
2006-03-14 16:23:35 +01:00
Marian Balakowicz
61f25155ac
Add DMA support for MPC83xx.
2006-03-14 16:14:48 +01:00
Marian Balakowicz
6d8ae5abb5
Add sync in do_reset() routine for MPC83xx after RPR register
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was written to. It is need on some targets when BAT translation
is enabled.
2006-03-14 16:12:48 +01:00
Marian Balakowicz
cd94ba397e
Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx.
2006-03-14 16:02:31 +01:00
Marian Balakowicz
a7c66ad2e5
Correct shift offsets in icache_status and dcache_status for MPC83xx.
2006-03-14 16:01:25 +01:00
Wolfgang Denk
ff7fefe679
Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific timer and
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cpu_reset code from cpu/$(CPU) into the new cpu/$(CPU)/$(SOC) directories
Patch by Andreas Engel, 13 Mar 2006
2006-03-13 12:37:35 +01:00
Stefan Roese
f3fecfe6d7
Fix problem with updated PCI code in cpu/ppc4xx/405gp_pci.c
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Patch by Stefan Roese, 13 Mar 2006
2006-03-13 09:43:01 +01:00
Stefan Roese
9a7b408c11
cpu/ppc4xx/start.S : exceptions are enabled after relocation
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Patch by Cedric Vincent, 6 June 2005
2006-03-13 09:42:28 +01:00
Wolfgang Denk
9551530615
au1x00_eth.c: check malloc return value and abort if it failed
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Patch by Andrew Dyer, 26 Jul 2005
2006-03-13 01:00:22 +01:00
Wolfgang Denk
b38dbd4622
Fix bug in [id]cache_status commands for MPC85xx processors;
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should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
2006-03-13 00:46:05 +01:00
Wolfgang Denk
795bee8496
Merge with git://git.kernel.org/pub/scm/boot/u-boot/u-boot.git#mpc83xx
2006-03-12 21:33:52 +01:00
Wolfgang Denk
a3f0169880
Merge with git://git.kernel.org/pub/scm/boot/u-boot/u-boot.git#ft_infr
2006-03-12 19:11:42 +01:00
Wolfgang Denk
23466d6a33
Fix PCIDF calculation in cpu/mpc8260/speed.c for MPC8280EC
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Patch by KokHow Teh, 16 Jun 2005
2006-03-12 16:14:29 +01:00
Wolfgang Denk
8e7b703a62
Coding Style cleanup
2006-03-12 02:55:22 +01:00
Wolfgang Denk
6cb142fa3b
Add missing Blackfin files.
2006-03-12 02:12:27 +01:00
Wolfgang Denk
d2ed2f661b
More GCC 4.x woes
2006-03-11 23:07:09 +01:00
Wolfgang Denk
d52fb7e3d1
Some code cleanup for GCC 4.x
2006-03-11 22:53:33 +01:00
Wolfgang Denk
0be248fa9a
Cleanup (get rid of debug code that sneaked in)
2006-03-07 00:22:36 +01:00
Wolfgang Denk
951a954b77
Merge with /home/wd/git/u-boot/master
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Code cleanup.
2006-03-06 23:18:48 +01:00
Markus Klotzbücher
43638c674a
Cleanup of NAND support of delta board using the Monahans Data Flash
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Controller.
2006-03-06 15:04:25 +01:00
Markus Klotzbücher
bf7cac033b
Lots of new stuff:
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* Debug message can be turned on and off.
* Waiting for events now times out.
* Implemented RESET command.
* Added appropriate nand_bbt_descriptor and nand_oobinfo.
Remaining Problems:
* Read Status still behaves weird an returns invalid stuff sometimes.
* ECC Placement does not respect our scheme in nand_oobinfo.
2006-03-04 18:35:51 +01:00
Markus Klotzbücher
e8cd00835e
All subsystem clocks not immediately need are turned at reset.
2006-02-28 23:11:07 +01:00
Markus Klotzbücher
00c35bd214
Added GPIO initialization of DF signal. Still not working.
2006-02-28 22:51:01 +01:00
Wolfgang Denk
86ea5f93d7
Initial port to MCC200 board (work in progress)
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Minimally modified patch by Bluetechnix, Vienna
2006-02-22 00:43:16 +01:00
Kumar Gala
2688e2f972
Enable address translation on MPC83xx
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Patch by Kumar Gala, 10 Feb 2006
2006-02-10 15:40:06 -06:00
Markus Klotzbücher
e0269579a5
This is the first commit for the u-boot zylonite port. The following has be
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done so far:
* created zylonite board dir (based on lubbock)
* extended some - but not all pxa sources and headers for Intel
Monahans support (CONFIG_CPU_MONAHANS)
* created Makefile zylonite target + MAKEALL entry
* added some debug nonsense, remove later, grep for mk@tbd
Status: compiles (eldk-4.0), and can be started with BDI, but runs forever
and doesn't halt at breakpoints. Hmmm...
2006-02-07 20:04:48 +01:00
Kumar Gala
c99f384dce
Decopuled setting of OR/BR and LBLAWBAR/LBLAWAR on MPC83xx
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Patch by Kumar Gala, 25 Jan 2006
2006-01-25 16:12:46 -06:00
Stefan Roese
2076d0a15f
PMC405 and CPCI405: Moved configuration of pci resources into config file.
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PMC405 and CPCI2DP: Added firmware download and booting via pci.
Patch by Matthias Fuchs, 20 Dec 2005
2006-01-18 20:03:15 +01:00
Kumar Gala
62ec6418d4
Add helper function for generic flat device tree fixups for mpc83xx
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Patch by Kumar Gala 11 Jan 2006
2006-01-11 16:48:10 -06:00
Kumar Gala
ec00c33578
Only disable the MPC83xx watchdog if its enabled out of reset.
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If its disabled out of reset SW can later enable it if so desired
Patch by Kumar Gala, 11 Jan 2006
2006-01-11 11:23:01 -06:00
Kumar Gala
a15b44dbfa
Allow config of GPIO direction & data registers at boot on 83xx
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Patch by Kumar Gala, 11 Jan 2006
2006-01-11 11:21:14 -06:00
Kumar Gala
ce574ff506
Enable time handling on 83xx
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Patch by Kumar Gala, 11 Jan 2006
2006-01-11 11:19:12 -06:00
Kumar Gala
9260a56151
Make System IO Config Registers board configurable on MPC83xx
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Patch by Kumar Gala, 11 Jan 2006
2006-01-11 11:12:57 -06:00
Wolfgang Denk
a9e642e2f8
MPC5200: Set PCI retry counter to 0 = infinite retry;
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The default of 255 is too short for slow devices.
Patch by Martin Nykodym, 12 Dec 2005
2005-12-16 15:14:18 +01:00