Commit Graph

70337 Commits

Author SHA1 Message Date
Marek Szyprowski
86eede9fce clk: meson: add minimal driver for g12a-ao clocks
Add minimal driver AO clocks on meson G12A family. Only ADC related clocks
are supported.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Christian Hewitt
d412a6015e boards: amlogic: update documentation for WeTek Core2
Update the device matrix and add build instructions.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: added wetek-core2.rst to q200 MAINTAINERS and added blank lines to fix build]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Christian Hewitt
ed430519cf boards: amlogic: add WeTek Core2 support
Add a config for the WeTek Core2, largely based on the VIM2 config.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: added wetek-core2_defconfig to q200 MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Christian Hewitt
d45dba838a ARM: dts: import WeTek Core2 DTs from Linux 5.10
Import the WeTek Core2 and supporting meson-gx-p23x-q20x.dtsi files
from Linux 5.10.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Pascal Vizeli
d42e7964d9 meson: Add soc_rev to environment
Add SoC revision to environment. This can be useful to select the
correct device tree at runtime (N2/N2+).

Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Stefan Agner
cf47c0e23a ARM: meson: isolate loading of socinfo
Move loading of socinfo into a separate function so the value can be
reused later.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Jerome Brunet
ade0100a91 arm64: meson: add support for libretech-cc v2
Add support for the Amlogic based libretech cc version 2.
As version 1, it is based on the s905x SoC.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: Fixed libretech-cc.rst bullet points]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Jerome Brunet
4ac6946bac arm64: dts: import libretech-cc-v2 from linux v5.10-rc1
Sync the libretech cc v2 device tree from Linux v5.10-rc1
commit 3650b228f83a ("Linux 5.10-rc1")

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
c823f2438c video: add TDO tl070wsh30 panel driver
This adds support for the TDO TL070WSH30 TFT-LCD panel module.
The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
807b0f0851 configs: use the new MESON_EE_POWER_DOMAIN driver for Amlogic GXBB/GXL/GXM boards
Linux 5.10-rc1 uses the new generic driver, so switch to it since GXBB and
later is now supported.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
e0d0f7e422 power: domain: meson-ee-pwrc: add support for the Meson AXG SoCs
This syncs with the linux meson-ee-pwrc driver from Linux 5.10-rc1.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
ed47278e0b power: domain: meson-ee-pwrc: add support for the Meson GX SoCs
This syncs with the linux meson-ee-pwrc driver from Linux 5.10-rc1.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
ee73135365 ARM: dts: sync Amlogic GX & AXG from Linux 5.10-rc1
Synced from Linux commit 3650b228f83a ("Linux 5.10-rc1")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Lukasz Majewski
c8f2a060a1 xea: config: Disable CONFIG_SPL_OF_PLATDATA_PARENT on XEA (imx28)
On the XEA board (imx28) one needs in the SPL support for GPIO, MMC and
SPI. Two last ones are necessary for booting the device. The GPIO support
allows deciding which medium will be used. For example the GPIO DTS node
(gpio@0 at imx28.dtsi) has pinctrl parent (pinctrl@80018000) for which we
don't need driver asigned for correct operation.
In the spl/dts/dt-platdata.c the gpio@0 has index 4 and its parent -
pinctrl@80018000 has index 5.

In the bind_drivers_pass() function (at drivers/core/lists.c) call to
device_bind_by_name() for `fsl_imx23_pinctrl` returns -2, which is
expected.

With current setup - when the SPL_OF_PLATDATA_PARENT=y
The gpio@0 node with index 4 is skipped as its parent with 5 is not yet
bound. It cannot be as we don't need and provide the driver for it.
As a result the gpio@0 is never bound and we end up with bricked board in
the SPL stage.

When CONFIG_SPL_OF_PLATDATA_PARENT is NOT set, all entries from
spl/dts/dt-platdata.c are scanned in ascending index order, so gpio@0 is
properly initialized. For `fsl_imx_pinctrl` we simply check 10 times if
the driver for is available (which is not) and exit.

As a result the GPIOs are initialized and can be used in early SPL stage.
This commit fixes XEA regression introduced with e41651fffd.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-08 08:42:08 -05:00
Lukasz Majewski
ee66df1425 xea: config: Use CONFIG_PREBOOT from Kconfig
The usage of the preboot feature is now controlled via a separate Kconfig
option - namely CONFIG_USE_PREBOOT.
It must be enabled for preboot code executing commands now defined in
CONFIG_PREBOOT (also moved to the Kconfig).

After defining both CONFIG_USE_PREBOOT and CONFIG_PREBOOT in
imx28_xea_defconfig the define of CONFIG_PREBOOT shall be removed from
xea.h as it is redundant.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-01-08 08:41:55 -05:00
Lukasz Majewski
a062d8e610 xea: spl: Disable pull UP for GPIO0_2{35}
On the imx287 pin GPMI_WRN (GPIO0_25) no PullUP is available that can be
enabled.

To get the same behavior for both boot select pins (i.e. GPIO0_2{35})
disable pull UPs on both.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-01-08 08:41:50 -05:00
Hugh Cole-Baker
92cb207af1 rockchip: pinebook-pro: default to SPI bus 1 for SPI-flash
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
2021-01-08 08:40:43 -05:00
Nicolas Ferre
aeaef07c51 ARM: dts: sama7g5ek: fix TXC pin configuration
TXC line is directly connected from the SoC to the KSZ9131 PHY. There
is a transient state on this signal, before configuring it to RGMII,
which leads to packet transmit being blocked.
Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes
the issue.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
05176cd08f configs: sama7g5ek: add i2c and eeprom
Add drivers for flexcom, i2c and eeproms

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
a07d2a1121 board: atmel: sama7g5ek: add support for MAC address retreival
Obtain two MAC addresses from the two EEPROMs and configure the two
available Ethernet interfaces accordingly.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
9b614c87bb ARM: dts: sama7g5ek: add i2c1 bus and eeproms
Add node for flx1 i2c1 subnode (and alias to bus 0)
This bus has two eeprom devices connected.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
1c629fd033 ARM: dts: at91: sama7g5: add flexcom1 and i2c subnode
Add flexcom1 and i2c subnode.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
0f8904b82d configs: sama7g5: add mmc config for sdmmc0
Add new config for storing environment from sdmmc0.
Also clean-up sama7g5ek_emmc1 to point to the proper mmc device.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
d05223eb5a board: atmel: sama7g5ek: clean-up header bootcommand
Clean-up boot command to use the predefined device and part for FAT
environment.
According to this device and partition, select the proper boot media.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
7f4c89cc5c ARM: dts: at91: sama7g5ek: enable sdmmc0 with pinctrl
Enable sdmmc0 on this board. A non-removable eMMC is connected on this
block.
Configure pincontrol accordingly.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
523c10c1fd ARM: dts: at91: sama7g5: add node for sdmmc0
Add node for sdmmc0 block.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
9b6f157e19 ARM: dts: at91: sama7g5: add assigned clocks for sdmmc1
SDMMC1 requires clock specification with assigned-clocks, such that
the PMC will know which parent to assign and the initial start-up frequency.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Claudiu Beznea
b17a268a8c configs: sama7g5ek: enable CCF
Enable CCF for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:16 +02:00
Claudiu Beznea
a5077825c3 configs: sama7g5ek: enable support for KSZ9131
Enable support for KSZ9131.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
6b2bcfcad3 board: atmel: sama7g5ek: increase arp timeout and retry count
Increase ARP timeout and retry count as this will increase
the speed of communication.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
3e5853e6a1 ARM: dts: sama7g5: add GMAC1
Add GMAC1.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
e95af87e9b ARM: dts: sama7g5: add GMAC0
Add GMAC0.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
02dae80ee4 configs: sama7g5ek: enable mii command
Enable mii command as ethernet's PHY specific programming is
based on it.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
7d41a8da84 ARM: dts: at91: sama7g5ek: add pinctrl for sdmmc1 and flx3
Add pinctrl for sdmmc1 and flx3.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
47a13af586 ARM: dts: at91: sama7g5: add pinctrl node
Add pioA pinctrl node.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
b032230f87 ARM: dts: sama7g5: add pit64b support
Add DT bindings for PIT64B driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
2efb34314d ARM: dts: sama7g5: enable autoboot
Enable autoboot.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
dd2cf752d1 configs: sama7g5: use PIT64B
Use PIT64B driver. ATMEL_PIT is not available for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
13f986b748 ARM: dts: sama7g5: add CPU bindings
Add CPU DT bindings.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
2942a2f9d5 configs: sama7g5: enable CONFIG_CPU
Enable CONFIG_CPU.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
394f520709 ARM: dts: sama7g5: switch to PMC bindings
Get rid of software defined MCK and switch to PMC bindings
for IPs currently present in device tree.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
33fa0b6cef ARM: dts: sama7g5: add PMC bindings
Add DT bindings for PMC driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
09f19f7770 ARM: dts: sama7g5: add slow clock bindings
Add DT bindings for slow clock driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
072c975940 ARM: dts: sama7g5: add u-boot,dm-pre-reloc bindings for xtals
Add dm-pre-reloc DT binding property for cristals.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
5e19ade9e5 ARM: dts: sama7g5: add slow rc and main rc oscillators
Add slow rc and main rc oscillators to dtsi.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
3b86096a59 ARM: dts: sama7g5: move clock frequencies for xtals in board file
Move clock frequencies for crystals on board specific files.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
3a2be103b0 configs: sama7g5ek: enable pll driver
Enable PLL driver for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
86eeab7d89 configs: sama7g5ek: set malloc pool to 68K
Set malloc pool to 68K for sama7g5ek.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
ac3740c9f2 board: atmel: sama7g5ek: add SYS_MALLOC_F_LEN to SYS_INIT_SP_ADDR
Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
1d463d6735 board: atmel: sama7g5ek: add initial support for sama7g5ek
Add initial support for sama7g5 evaluation kit board.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00