The current method assumes that clocks are numbered from 0 and we can
determine a clock by its number. It is safer to use an ID in the clock's
platform data to avoid the situation where another clock is bound before
the one we expect.
Move the existing code into rk3036 since it still works there. Add a new
implementation for rk3288.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current approach of using uclass_get_device() is error-prone. Another
clock (for example a fixed-clock) may cause it to break. Add a function that
does a proper search.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is defined in the device tree in Linux. Copy over the settings so that
this can be used instead of hard-coding the reset line.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is easier to deal with when using generic code since it allows us to
use a register index instead of naming each register.
Adjust it, adding an enum to improve readability.
Signed-off-by: Simon Glass <sjg@chromium.org>
After boot_ramdisk_high(), ramdisk would be relocated to
initrd_start & initrd_end, so use them instead of rd_start & rd_end.
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
[hdegoede@redhat.com: Minor cleanups]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
applied with fixing 2 checkpatch warnings:
WARNING: please, no space before tabs
Signed-off-by: Heiko Schocher <hs@denx.de>
Add tests that check that the video console is working correcty. Also check
that text output produces the expected result. Test coverage includes
character output, wrapping and scrolling.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Now that driver model support is available, convert sandbox over to use it.
We can remove a few of the special hooks that sandbox currently has.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Convert ls1021atwr_nor_lpuart to driver model support. As a start,
enable lpuart serial port driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Tested-by: Alison Wang <alison.wang@nxp.com>
Acked-by: Simon Glass <sjg@chromium.org>
Convert ls1021atwr_nor to driver model support. As a start, enable
ns16550 serial port driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Specify which timer to be used as tick-timer in chosen node.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Specify which timer to be used as tick-timer in chosen node.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Specify which timer to be used as tick-timer in chosen node.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
To prepare timer driver to DM/DT conversion do not build the
exiting timer driver when CONFIG_TIMER is defined. But since
omap's SPL doesn't support DM yet so built timer driver only for
SPL build when CONFIG_TIMER is defined.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The board/freescale/m54418twr/config.mk defined TEXT_BASE, which has
the same value as CONFIG_SYS_TEXT_BASE. The TEXT_BASE is referenced
by two files:
- arch/m68k/cpu/mcf5445x/start.S and include/
- include/configs/M54418TWR.h
Replace the references with CONFIG_SYS_TEXT_BASE and delete
board/freescale/m54418twr/config.mk.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Angelo Dureghello <angelo at sysam.it>
compiling U-Boot for openrd_base_defconfig with
gcc 5.x shows the following warning:
CC fs/ubifs/super.o
In file included from fs/ubifs/ubifs.h:35:0,
from fs/ubifs/super.c:37:
fs/ubifs/super.c: In function 'atomic_inc':
./arch/arm/include/asm/atomic.h:55:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized]
local_irq_save(flags);
^
fs/ubifs/super.c: In function 'atomic_dec':
./arch/arm/include/asm/atomic.h:64:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized]
local_irq_save(flags);
^
CC fs/ubifs/sb.o
[...]
CC fs/ubifs/lpt.o
In file included from include/linux/bitops.h:123:0,
from include/common.h:20,
from include/ubi_uboot.h:17,
from fs/ubifs/ubifs.h:37,
from fs/ubifs/lpt.c:35:
fs/ubifs/lpt.c: In function 'test_and_set_bit':
./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized]
local_irq_save(flags);
^
CC fs/ubifs/lpt_commit.o
In file included from include/linux/bitops.h:123:0,
from include/common.h:20,
from include/ubi_uboot.h:17,
from fs/ubifs/ubifs.h:37,
from fs/ubifs/lpt_commit.c:26:
fs/ubifs/lpt_commit.c: In function 'test_and_set_bit':
./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized]
local_irq_save(flags);
^
CC fs/ubifs/scan.o
CC fs/ubifs/lprops.o
CC fs/ubifs/tnc.o
In file included from include/linux/bitops.h:123:0,
from include/common.h:20,
from include/ubi_uboot.h:17,
from fs/ubifs/ubifs.h:37,
from fs/ubifs/tnc.c:30:
fs/ubifs/tnc.c: In function 'test_and_set_bit':
./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized]
local_irq_save(flags);
^
CC fs/ubifs/tnc_misc.o
Fix it.
Signed-off-by: Heiko Schocher <hs@denx.de>
The if block does the same as the else block does. The conditional
is not necessary at all.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
If invalidate operation is invoked against a cache-unaliged region,
the both ends of the region should be flushed, not invalidated.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit adds the FDT for the ThunderX family of SoCs
Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds functions issuing calls to secure monitor or
hypervisore. This allows using services such as Power State
Coordination Interface (PSCI) provided by firmware, e.g. ARM
Trusted Firmware (ATF)
The SMC call can destroy all registers declared temporary by the
calling conventions. The clobber list is "x0..x17" because of
this
Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
This patch adds code which sets up 2-level page tables on ARM64 thus
extending available VA space. CPUs implementing 64k translation
granule are able to use direct PA-VA mapping of the whole 48 bit
address space.
It also adds the ability to reset the SCTRL register at the very beginning
of execution to avoid interference from stale mappings set up by early
firmware/loaders/etc.
Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
This patch adds the read_mpidr() function which returns the
MPIDR_EL1 register value
Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With driver model timer conversion, quark based board does not boot
any more as mdelay() is called during quark_pcie_early_init() which
is before driver model gets initialized. Fix this breakage.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In a number of places we had wordings of the GPL (or LGPL in a few
cases) license text that were split in such a way that it wasn't caught
previously. Convert all of these to the correct SPDX-License-Identifier
tag.
Signed-off-by: Tom Rini <trini@konsulko.com>
Mainly sync asm/io.h to get a working ioremap() implementation
as well as the full set of I/O accessors. Pull in additional
header files to make this work.
Furthermore port over the directory 'arch/mips/include/asm/mach-generic/'
with contains default definitions for I/O and memory spaces and default
implementations for mapping those spaces. All files in that directory
can be overwritten by a SoC/machine.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Add Kconfig symbol for L1 cache shift like the kernel does.
The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source
for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS.
If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the
cache sizes are automatically detected and ARCH_DMA_MINALIGN
would be set to 128 Bytes.
The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which
corresponds to 32 Bytes. All current MIPS boards already used
that value. While on it, fix the Malta board to use a value of 6
like the kernel port does.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Move setup of -march to arch/mips/Makefile and follow the design on ARM.
Also add a possibility to chose specific CPU tune options.
Signed-off-by: Wills Wang <wills.wang@live.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
