Commit Graph

12836 Commits

Author SHA1 Message Date
Michal Simek
72c37d1221 timer: Add Cadence TTC timer counter support
This driver was tested on Xilinx ZynqMP SoC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
c3898a8891 scsi: ceva: Convert driver to use UCLASS_AHCI instead of SCSI
In v2018 the patch
"dm: ahci: Correct uclass private data"
(sha1: bfc1c6b483)
was causing an issue for ceva_sata.
But this issue is not in v2018.05-rc1 but still converting to
UCLASS_AHCI would make more sense.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Tom Rini
f739fcd831 SPDX: Convert a few files that were missed before
As part of the main conversion a few files were missed.  These files had
additional whitespace after the '*' and before the SPDX tag and my
previous regex was too strict.  This time I did a grep for all SPDX tags
and then filtered out anything that matched the correct styles.

Fixes: 83d290c56f ("SPDX: Convert all of our single license tags to Linux Kernel style")
Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-10 20:38:35 -04:00
Lukasz Majewski
afa9609eca bootcount: spl: Enable bootcount support in SPL
New, SPL related config option - CONFIG_SPL_BOOTCOUNT_LIMIT has been
added to allow drivers/bootcount code re-usage in SPL.

This code is necessary to use and setup bootcount in SPL in the case of
falcon boot mode.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-10 20:37:05 -04:00
Marcel Ziswiler
355560d588 pci: tegra: introduce weak tegra_pcie_board_port_reset() function
Introduce a weak tegra_pcie_board_port_reset() function by default
calling the existing tegra_pcie_port_reset() function. Additionally add
a tegra_pcie_port_index_of_port() function to retrieve the specific PCIe
port index if required. This allows overriding the PCIe port reset
functionality from board specific code as e.g. required for Apalis T30
and Apalis TK1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:21 -07:00
Marcel Ziswiler
4616e33b6a power: as3722: fix ldo_get/set_enable for ldo index bigger than 7
Fix ldo_get_enable() and ldo_set_enable() functions for LDOs with an
index > 7. Turns out there are actually two separate AS3722_LDO_CONTROL
registers AS3722_LDO_CONTROL0 and AS3722_LDO_CONTROL1. Actually make use
of both. While at it also actually use the enable parameter of the
ldo_set_enable() function which now truly allows disabling as opposed to
only enabling LDOs.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:20 -07:00
Marcel Ziswiler
4b11a6296a mtd: nand: tegra: convert to driver model and live tree
The Tegra NAND driver recently got broken by ongoing driver model resp.
live tree migration work:

NAND:  Could not decode nand-flash in device tree
Tegra NAND init failed
0 MiB

A patch for NAND uclass support was proposed about a year ago:
https://patchwork.ozlabs.org/patch/722282/

It was not merged and I do not see on-going work for this.

This commit just provides a driver model probe hook to retrieve further
configuration from the live device tree. As there is no NAND ulass as of
yet (ab)using UCLASS_MTD. Once UCLASS_NAND is supported, it would be
possible to migrate to it.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:10 -07:00
Yogesh Gaur
a6f2a6eafe driver: net: fsl-mc: updated copyright info
Updated copyright info for the issues reported after running
check-legal test.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Jagdish Gediya
e8c669a3e6 mtd: nand: fsl_ifc: Fix nand waitfunc return value
As per the IFC hardware manual, Most significant byte in nand_fsr
register is the outcome of NAND READ STATUS command.

So status value need to be shifted as per the nand framework
requirement.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Jagdish Gediya
f195fad178 mtd: nand: fsl_ifc: Fix eccstat array overflow for IFC ver >= 2.0.0
Number of ECC status registers i.e. (ECCSTATx) has been increased in
IFC version 2.0.0 due to increase in SRAM size. This is causing
eccstat array to over flow.

So, replace eccstat array with u32 variable to make it fail-safe and
independent of number of ECC status registers or SRAM size.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Rajat Srivastava
1f55356411 spi: fsl_qspi: Introduce is_controller_busy function
Some SoCs have different endianness of QSPI IP if compared
to endianness of core. The function is_controller_busy()
checks if the QSPI controller is busy or not, considering
the endianness of the QSPI IP.

Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Mario Six
e097ce4304 pci: Don't use pci_indirect when DM is active
Declaration of indirect PCI bridges is not compatible with DM: Both
define PCI operations, but in different ways. Hence, don't use indirect
bridges if DM is active.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 18:50:23 -04:00
Mario Six
86da8c12ef gdsys: drivers: Add gdsys_rxaui_ctrl driver
Add a driver for RXAUI control on IHS FPGAs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 18:50:23 -04:00
Mario Six
f0bcbe6c18 clk: Add ICS8N3QV01 driver
Add a driver for the ICS8N3QV01 Quad-Frequency Programmable VCXO.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08 18:50:23 -04:00
Tom Rini
14249635b6 Merge git://git.denx.de/u-boot-mmc 2018-05-08 13:47:39 -04:00
Tom Rini
1ccd3f14ca Merge git://git.denx.de/u-boot-uniphier 2018-05-08 13:47:26 -04:00
Neil Armstrong
59beb238d5 adc: add Amlogic Meson SAR ADC driver
This patch adds the driver for the Amlogic Meson Successive Approximation
Register (SAR) A/D Converter based on the Linux IIO driver thanks to the
great work of Martin Blumenstingl.
The driver has been adapted to U-Boot and the ADC UClass.

This patch depends on the regmap "regmap: add regmap_update_bits() helper"
patch and has been tested using the newly introducted "adc" CLI command
in the "cmd: add ADC cli commands" patch.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:40 -04:00
Neil Armstrong
285cbcf97f regmap: add regmap_update_bits() helper
Add the regmap_update_bits() to simply the read/modify/write of registers
in a single command. The function is taken from Linux regmap
implementation.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 09:07:40 -04:00
Fabrice Gasnier
f198bbac66 clk: stm32mp1: Add VREF clock gating
Add VREF clock gating, that may be used by STM32 VREFBUF regulator.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:39 -04:00
Fabrice Gasnier
93cf0ae775 power: regulator: Add support for stm32-vrefbuf
Add regulator driver for STM32 voltage reference buffer which can be
used as voltage reference for ADCs, DACs and external components through
dedicated VREF+ pin.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:39 -04:00
Patrice Chotard
1f0dfa1fa0 power: pmic: stpmu1: Add regulator bindings
Add regulator bindings to get access to regulator managed
by drivers/power/regulator/stpmu1.c regulator driver.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:38 -04:00
Christophe Kerello
069f0b6354 power: regulator: stpmu1: Introduce stpmu1 driver
Enable support for the regulator functions of the STPMU1X PMIC. The
driver implements get/set api for the various BUCKS and LDOs supported
by the PMIC device. This driver is controlled by a device tree node
which includes voltage limits.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:38 -04:00
Ludovic Desroches
8ee54672df gpio: atmel_pio4: give a full configuration when muxing pins
When a pin is muxed to a peripheral or as a GPIO, the only
configuration that can be set is the pullup. It is too restrictive
so this patch allows to give a full configuration.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:36 -04:00
Ley Foon Tan
7c45862f22 pci: intel: Add Intel FPGA PCIe controller driver
Add PCIe driver for Intel FPGA PCIe IP. This driver operates the PCIe IP in
rootport mode only, the EP mode is not supported. The driver is tested
with the Intel e1000e NIC driver.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-08 09:07:35 -04:00
Neil Armstrong
42de652272 pinctrl: meson: Update pinmux with new Linux bindings
The pinctrl bindings has changed for Amlogic Meson SoCs since Linux 4.13,
update the pinctrl driver to take this in account.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Patrice Chotard
8b41464547 clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock
On all STM32F4 and F7 SoCs  family (except STM32F429), PLLSAI
output P can be used as 48MHz clock source for USB and SDMMC.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tested By: Bruno Herrera <bruherrera@gmail.com>
2018-05-08 09:07:34 -04:00
Patrick Bruenn
bc882f5d5c dm: led: auto probe() LEDs with "default-state"
To avoid board specificy LED activation code, automatically
activate gpio-leds with "default-state" property during bind().

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08 09:07:33 -04:00
Patrick Bruenn
d90f0d4cae dm: led: Support "default-state" property
Add support for the device tree property "default-state". This feature
might be useful for LEDs indicating "power on" or similar states.

Note: Even with this commit gpio-leds remain in reset state. That's
because the led_gpio is not probed until DM_FLAG_ACTIVATED is set.

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08 09:07:33 -04:00
Andy Yan
e1fd9e6bb8 power: pwm regulator: support live tree
Use live tree compatible api for pwm regulator.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2018-05-08 13:12:33 +09:00
Patrick Bruenn
55118ec90c dm: mmc: socfpga: call dwmci_probe()
On a socfpga_cyclone5 based board the SD card, was never powered up. For
other dw_mmc based SoCs dwmci_probe() is called in the platform specific
probe(). It seems this call is missing for socfpga_dw_mmc.

With this change DWMCI_PWREN is set by dmwci_init().

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
72b5a0371d mmc: Kconfig: add the MMC_TRACE config in Kconfig
Add the MMC_TRACE config in Kconfig.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
d2faadb59c mmc: add the debug message in mmc_set_clock
Add the debug message for checking the mmc clock status.
It's helpful to debug the controlling clock.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
6511718254 mmc: add the MMC_CLK_ENABLE/DISABLE macro in mmc.h
mmc_set_clock() function has the disable argument as bool type.
When mmc_set_clock is called, it might be passed to "true" or "false".
But it's too confusion whether clock is enabled or disabled with only
"true" and "false".
To prevent the confusion, replace to MMC_CLK_ENABLE/DISABLE macro from
true/false.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
9c67c4491e power: pmic_max77686: remove the old pmic_max77686 file
max77686 pmic is supporting with max77686.c under pmic/ and regulator/
direnctroy. Remove pmic_max77686.c what didn't use anywhere.
Instead, enable CONFIG_DM_REGULATOR_MAX77686 and
CONFIG_DM_PMIC_MAX77686.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Masahiro Yamada
57a6c1bf87 pinctrl: uniphier: add ethernet TX pin data for LD20
These are necessary to optimize the drive-strength of the pins.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:15 +09:00
Masahiro Yamada
150997a44b pinctrl: uniphier: support drive-strength configuration
This allows our DT to specify drive-strength property.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:15 +09:00
Masahiro Yamada
603fd9ead6 pinctrl: uniphier: support per-pin configuration via DT
Currently, the UniPhier pinctrl drivers expose only the pin-group
interface to device tree.

Provide .get_pins_count, .get_pin_name, .pinconf_set hooks to support
pin configuration via 'pins' DT property.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:15 +09:00
Masahiro Yamada
03cfc80134 pinctrl: uniphier: include <linux/build_bug.h> instead of <linux/bug.h>
The #include <linux/bug.h> is here to use BUILD_BUG_ON_ZERO().

By replacing it with <linux/build_bug.h>, we can reduce the number of
headers pulled in.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:14 +09:00
Masahiro Yamada
7629d0b9bc pinctrl: uniphier: replace printf() with dev_err()
dev_err() is more suitable for printing error messages.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:14 +09:00
Masahiro Yamada
d5c0d9a12a pinctrl: uniphier: remove unneeded pin data of LD6b SoC
Since commit f73cfb4d0d ("pinctrl: uniphier: simplify input enable
and delete pin arrays"), these data are no longer used in any useful
way.  Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:11 +09:00
Lokesh Vutla
acf1500138 arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under
armv7 folder. This led to a misconception of creating separate folders
for armv7m and armv7r. There is no reason to create separate folder for
other armv7 based architectures when it can co-exist with few Kconfig
symbols.

As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later
separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and
can co exist in the same folder.

Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:24 -04:00
Masahiro Yamada
e151a1c288 syscon: add Linux-compatible syscon API
The syscon implementation in U-Boot is different from that in Linux.
Thus, DT files imported from Linux do not work for U-Boot.

In U-Boot driver model, each node is bound to a dedicated driver
that is the most compatible to it.  This design gets along with the
concept of DT, and the syscon in Linux originally worked like that.

However, Linux commit bdb0066df96e ("mfd: syscon: Decouple syscon
interface from platform devices") changed the behavior because it is
useful to let a device bind to another driver, but still work as a
syscon provider.

That change had happened before U-Boot initially supported the syscon
driver by commit 6f98b7504f ("dm: Add support for generic system
controllers (syscon)").  So, the U-Boot's syscon works differently
from the beginning.  I'd say this is mis-implementation given that
DT is not oriented to a particular project, but Linux is the canon
of DT in practice.

The problem typically arises in the combination of "syscon" and
"simple-mfd" compatibles.

In Linux, they are orthogonal, i.e., the order between "syscon" and
"simple-mfd" does not matter at all.

Assume the following compatible.

   compatible = "foo,bar-syscon", "syscon", "simple-mfd";

In U-Boot, this device node is bound to the syscon driver
(driver/core/syscon-uclass.c) since the "syscon" is found to be the
most compatible.  Then, syscon_get_regmap() succeeds.

However,

   compatible = "foo,bar-syscon", "simple-mfd", "syscon";

does not work because this node is bound to the simple-bus driver
(drivers/core/simple-bus.c) in favor of "simple-mfd" compatible.
The compatible string "syscon" is just dismissed.

Moreover,

   compatible = "foo,bar-syscon", "syscon";

works like the first case because the syscon driver populates the
child devices.  This is wrong because populating children is the job
of "simple-mfd" (or "simple-bus").

This commit ports syscon_node_to_regmap() from Linux.  This API
does not require the given node to be bound to a driver in any way.

Reported-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
d35812368a regmap: change regmap_init_mem() to take ofnode instead udevice
Currently, regmap_init_mem() takes a udevice. This requires the node
has already been associated with a device. It prevents syscon/regmap
from behaving like those in Linux.

Change the first argumenet to take a device node.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:51 -04:00
Masahiro Yamada
5ccc2c2130 dm: ofnode: add ofnode_device_is_compatible() helper
device_is_compatible() takes udevice, but there is no such a helper
that takes ofnode.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:51 -04:00
Masahiro Yamada
8c1de5e08b regmap: clean up regmap allocation
Putting zero length array at the end of struct is a common technique
to embed arbitrary length of members.  There is no good reason to let
regmap_alloc_count() branch by "if (count <= 1)".

As far as I understood the code, regmap->base is an alias of
regmap->ranges[0].start, but it is not helpful but make the code
just ugly.

Rename regmap_alloc_count() to regmap_alloc() because the _count
suffix seems pointless.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: fixup cpu_info-rcar.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:15:27 -04:00
Tom Rini
4549e789c1 SPDX: Convert all of our multiple license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have multiple licenses (in
these cases, dual license) declared in the SPDX-License-Identifier tag.
In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A
or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B"
as per the Linux Kernel style document.  Note that parenthesis are
allowed so when they were used before we continue to use them.

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 10:24:31 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
db13e05dda Merge git://git.denx.de/u-boot-usb 2018-05-03 09:20:13 -04:00
Tom Rini
9f881a590f Merge git://git.denx.de/u-boot-sh 2018-05-03 09:20:02 -04:00
Marek Vasut
424060dae4 clk: renesas: Drop USB extal from the R8A7792 clock driver
The R8A7792 does not have the USB extal, so drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 10:49:58 +02:00
Heinrich Schuchardt
4bf225aa87 drivers:power:max77693: remove redundant logical constraint
As ret is not set when calling max77693_get_vcell() there is no
need to check ret again.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-02 10:57:43 +09:00
Hannes Schmelzer
4781921630 mmc: zynq_sdhci: use correct quirk if CONFIG_ZYNQ_HISPD_BROKEN is defined
The 'SDHCI_QUIRK_NO_HISPD_BIT' is used wrong here. The purpose of this
quirk is to tell the sdhci-driver that the IP-core doesn't have a "high-
speed-enable" bit in its registers.

With this commit we change this to the correct quirk:
SDHCI_QUIRK_BROKEN_HISPD_MODE

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-02 10:57:43 +09:00
Hannes Schmelzer
88a57125fa mmc: sdhci: add SDHCI_QUIRK_BROKEN_HISPD_MODE
Some IP-core implementations of the SDHCI have different troubles on the
silicon where they are placed.

On ZYNQ platform for example Xilinx doesn't accept the hold timing of an
eMMC chip which operates in High-Speed mode and must be forced to
operate in non high-speed mode. To get rid of this
"SDHCI_QUIRK_BROKEN_HISPD_MODE" is introduced.

For more details about this refer to the Xilinx answer-recor #59999
https://www.xilinx.com/support/answers/59999.html

This commit:
- doesn't set HISPD bit on the host-conroller
- reflects this fact within the host-controller capabilities

Upon this the layer above (mmc-driver) can setup the card correctly.

Otherwise the MMC card will be switched into high-speed mode and causes
possible timing violation on the host-controller side.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-02 10:57:43 +09:00
Peng Fan
0a4c2b099e mmc: fix return value check condition
sd_read_ssr returns 0, means no error.
Fixes: 5b2e72f32721484("mmc: read ssr only if MMC write support is enabled")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-05-02 10:57:43 +09:00
Heinrich Schuchardt
48cdfa2f81 usb: f_mass_storage: simplify logical expression
An unsigned int is always >= 0.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-30 19:38:09 +02:00
Heinrich Schuchardt
fa9da8ee60 usb: gadget: remove duplicate assignment.
We should not make the same assignement twice.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-30 19:38:09 +02:00
Tom Rini
b25f8e2112 Merge git://git.denx.de/u-boot-imx 2018-04-30 07:14:05 -04:00
Tom Rini
abeb9d7897 Merge git://git.denx.de/u-boot-sunxi 2018-04-30 06:52:32 -04:00
Patrice Chotard
8dc4e1fbf4 serial: serial_stm32: Rename status register flags
Uart status register is named USART_ISR on STM32F7, STM32H7
and STM32MP1 SoCs family, but USART_SR only on STM32F4 SoCs.

Use USART_ISR_ prefix instead of USART_SR_ .

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-28 18:32:24 -04:00
Patrice Chotard
7b3b74d321 serial: serial_stm32: Enable overrun
Enable uart overrun feature which allows to benefits of uart
FIFO usage.

Previously overrun management was disabled, this has to effect
to bypassed the uart FIFO usage even if FIFO was enabled.
In particular configuration, for example when video console is
enabled, copy/pasting a long command line in console results in
corruption. This is due to the fact that a lot of time is consumed
in flushing the cache during frame buffer update, so uart chars are
not read fast enough.

By using uart FIFO and managing overrun, long command line can by
copy/paste in console without being corrupted.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-28 18:32:24 -04:00
Alex Kiernan
ab9e12f651 spl: disk: usb: Add dependencies to sprintf/strto*
If SPL serial support is disabled nothing brings in sprintf, snprintf
or simple_strtoul:

  env/built-in.o: In function `regex_callback':
  env/attr.c:128: undefined reference to `sprintf'
  disk/built-in.o: In function `blk_get_device_by_str':
  disk/part.c:386: undefined reference to `simple_strtoul'
  disk/part.c:395: undefined reference to `simple_strtoul'
  disk/built-in.o: In function `blk_get_device_part_str':
  disk/part.c:522: undefined reference to `simple_strtoul'
  disk/built-in.o: In function `part_set_generic_name':
  disk/part.c:704: undefined reference to `sprintf'
  drivers/built-in.o: In function `init_peripheral_ep':
  drivers/usb/musb-new/musb_gadget.c:1826: undefined reference to `sprintf'
  drivers/built-in.o: In function `musb_core_init':
  drivers/usb/musb-new/musb_core.c:1451: undefined reference to `snprintf'

Add those dependencies here.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:24 -04:00
Tuomas Tynkkynen
fac379e1ea serial: Migrate CONFIG_FSL_LINFLEXUART to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-04-28 10:42:35 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Adam Ford
f1b1f77060 Convert CONFIG_SPI to Kconfig
This converts the following to Kconfig:
   CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver.  For now, just update
the CONFIG tests.  This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:11 -04:00
Tom Rini
ec37f05ec0 Merge git://git.denx.de/u-boot-usb 2018-04-26 22:09:11 -04:00
Tien Fong Chee
4ae87a83a6 arm: socfpga: Fix with the correct polling on bit is set
Commit 2baa997240 ("arm: socfpga: Add FPGA driver support for Arria 10")
Polling on wrong cleared bit. Fix with correct polling on bit is set.

Fixes: 2baa997240 ("arm: socfpga: Add FPGA driver support for Arria 10")

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-04-27 01:04:08 +02:00
Christophe Kerello
d57ed4d9f2 usb: gadget: composite: fix NULL pointer when a non standard request is received
In case usb configuration is unknown (cdev->config == NULL), non standard
request should not be processed.
Remove also the cdev->config check below which will never happen.

This issue was seen using ums feature.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-26 15:15:07 +02:00
Neil Armstrong
003659bda9 usb: host: dwc3: fix phys init
When no PHYs are declared in the dwc3 node, the phy init fails.
This patch checks if the "phys" property is presend and reports
the error returned by dev_count_phandle_with_args().

This patchs also fixes the styles issues added in last commit.

This patch should fix the DWC3 support on the UniPhier SoC family.

Fixes: 7c839ea70c ("usb: host: dwc3: Add support for multiple PHYs")
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-26 14:03:13 +02:00
Tom Rini
d2a1f120cf Merge git://git.denx.de/u-boot-rockchip 2018-04-26 07:21:41 -04:00
Lukasz Majewski
948239ea16 dts: dm: fec: imx53: Provide proper compatible string for imx53 fec driver
After this change the DM FEC ETH driver can be also reused on some imx53
devices.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-04-26 09:28:49 +02:00
Lukasz Majewski
178d4f0099 eth: dm: fec: Change FEC PHY mask setting from CONFIG_PHYLIB to CONFIG_FEC_MXC_PHYADDR
Without this commit we do have an explicit dependency on CONFIG_PHYLIB
when one wants to set PHY ADDR on a iMX board (FEC + driver model).

This shall be changed to CONFIG_FEC_MXC_PHYADDR, as only when we do have
it set, we shall mask out other devices.

As a side effect, when CONFIG_FEC_MXC_PHYADDR is not set, we scan PHY bus
for connected PHY devices.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-04-26 09:27:22 +02:00
Tom Rini
a61f9d1fbb Merge git://git.denx.de/u-boot-spi 2018-04-25 20:50:28 -04:00
Kever Yang
c877ef3ac1 rockchip: rv1108: add ofdata_to_platdata() method for driver
Parse of data in dedicated api instead of in probe().

The clk_set_rate() may be called before the clk driver is probed,
after core support set default clock.
This patch fix system abort issue since:
f4fcba5 clk: implement clk_set_defaults()

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com>
2018-04-25 22:20:07 +02:00
Kever Yang
d2e938d993 rockchip: rk3128: add ofdata_to_platdata() method for driver
Parse of data in dedicated api instead of in probe().

The clk_set_rate() may be called before the clk driver is probed,
after core support set default clock.
This patch fix system abort issue since:
f4fcba5 clk: implement clk_set_defaults()

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com>
2018-04-25 22:20:06 +02:00
Kever Yang
accaaea5cc rockchip: rk3036: add ofdata_to_platdata() method for driver
Parse of data in dedicated api instead of in probe().

The clk_set_rate() may be called before the clk driver is probed,
after core support set default clock.
This patch fix system abort issue since:
f4fcba5 clk: implement clk_set_defaults()

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:06 +02:00
Philipp Tomsich
e0e1d3f98c rockchip: timer: add compatible strings for rk3188 and rk3288
The DM driver for ockchip timer blocks is also applicable to the
RK3188 and RK3288 timer blocks: add 'rockchip,rk3188-timer' and
'rockchip,rk3288-timer' to its compatible list to support devices
claiming compatibility with these.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 22:20:05 +02:00
Wadim Egorov
b0ba1e7e9d rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC
The generic ehci-driver (ehci-generic.c) will try to enable the clocks
listed in the DTSI. If this fails (e.g. due to clk_enable not being
implemented in a driver and -ENOSYS being returned by the clk-uclass),
the driver will bail our and print an error message.

This implements a minimal clk_enable for the RK3288 and supports the
clocks mandatory for the EHCI controllers; as these are enabled by
default we simply return success.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25 14:05:09 +02:00
Philipp Tomsich
5ff8e54888 sunxi: improve throughput in the sunxi_mmc driver
Throughput tests have shown the sunxi_mmc driver to take over 10s to
read 10MB from a fast eMMC device due to excessive delays in polling
loops.

This commit restructures the main polling loops to use get_timer(...)
to determine whether a (millisecond) timeout has expired.  We choose
not to use the wait_bit function, as we don't need interruptability
with ctrl-c and have at least one case where two bits (one for an
error condition and another one for completion) need to be read and
using wait_bit would have not added to the clarity.

The observed speedup in testing on a A31 is greater than 10x (e.g. a
10MB write decreases from 9.302s to 0.884s).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-25 10:29:38 +05:30
Tom Rini
5512f5ccf1 Merge git://git.denx.de/u-boot-video 2018-04-24 20:27:43 -04:00
Tom Rini
751641814c video-uclass: Fix logical-not-parentheses warning
With clang-4.0 and later we see:
warning: logical not is only applied to the left hand side of this bitwise
operator [-Wlogical-not-parentheses]
        if ((!gd->flags & GD_FLG_RELOC))
             ^          ~

And while the compiler suggests adding parenthesis around gd->flags, a
reading of the code says that we want to know when GD_FLG_RELOC is not
set and then return.

Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-24 20:57:14 +02:00
Marek Vasut
ec360e6486 mmc: Staticize sd_select_bus_width
Staticize the function since it's only used in mmc.c .

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
2018-04-23 16:07:46 -04:00
Tom Rini
3853c650e4 Merge git://git.denx.de/u-boot-uniphier 2018-04-23 12:21:20 -04:00
Masahiro Yamada
045e4fcb44 clk: uniphier: disable SPL_CLK
The last clock consumer in SPL, SD/eMMC driver, gave up using the
clock driver.  The clock driver is only used in U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:35 +09:00
Masahiro Yamada
fc2d0302b6 mmc: uniphier-sd: skip clock set-up for SPL
The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig.
When booting from SD/eMMC, obviously its clock has been properly set up
by the boot ROM.  Acutually, no need to re-initialize the clock in SPL.

Using a clock driver would generalize the SoC specific code, but
solving the memory footprint problem would win.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:34 +09:00
Masahiro Yamada
30b5d9aa9a mmc: tmio: move clk_enable() to each driver's probe function
I need to differentiate the clock handling for uniphier-sd.  Move it
to each driver's probe function from the tmio common code so that
renesas-sdhi will not be affected.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:34 +09:00
Tom Rini
ff719a73d9 Xilinx fixes for v2018.05-rc3
- Fix nand initialization
 - Runtime ddr detection for static DDR setting
 - Enable rewriting env locations
 - Sync defconfig for zc770 xm011
 - Remove useless ioremap in watchdog
 - Check return value from soc_clk_dump()
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEUEABECAAYFAlrd8XUACgkQykllyylKDCHUCgCYyclnOfsTDs6FpNOME22Jo1n0
 QwCghGpK0oey4YLXq8SzgFzM63hDRuA=
 =j/LP
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2018.05-rc3' of git://git.denx.de/u-boot-microblaze

Xilinx fixes for v2018.05-rc3

- Fix nand initialization
- Runtime ddr detection for static DDR setting
- Enable rewriting env locations
- Sync defconfig for zc770 xm011
- Remove useless ioremap in watchdog
- Check return value from soc_clk_dump()
2018-04-23 10:50:38 -04:00
Heinrich Schuchardt
f6549c8541 mmc: avoid division by zero in meson_mmc_config_clock
The Odroid C2 fails to read from mmc with U-Boot v2018.03.
The change avoids a division by zero.

The fix was suggested by Jaehoon in
https://lists.denx.de/pipermail/u-boot/2018-January/318577.html

Reported-by: Vagrant Cascadian <vagrant@debian.org>
Suggested-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2018-04-23 10:49:58 -04:00
Michal Simek
811c7bdebe watchdog: cadence: Remove useless ioremap
There is no need to call ioremap. Also reg pointer is completely unused
in the driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:32 +02:00
Ezequiel Garcia
41b7d7f241 nand: zynq: Cleanup initialization
CONFIG_NAND_ZYNQ selects CONFIG_SYS_NAND_SELF_INIT, so the
driver doesn't have to play any ifdef game.

Also, we can mark zynq_nand_init() as static and get rid
of the mach-specific nand.h header.

This is really a revert of:
"mtd: zynq: nand: Move board_nand_init() function to board.c"
(sha1: 310995d9f9)

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:30 +02:00
Ezequiel Garcia
07c5cbbd1e nand: zynq: Fix driver initialization
This driver is currently broken, refusing to initialize properly.

The reason is that get_nand_dev_by_index() was being called before
nand_register(), thus returning a pointer into uninitialized memory.
In other words, the struct mtd_info used by the driver is total junk.

Fix it by getting the correct struct mtd_info, via nand_to_mtd()
on the driver's struct nand_chip.

Tested on a custom board, where the CPU is halted without this patch.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:27 +02:00
Stefan Mavrodiev
4744d81cc0 sunxi: mmc: Fix phase delays
U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where
PLL5 is used, with clock rates respectively 600MHz and 768MHz.
Thus there are different phase degree steps - 24 for the kernel and
30 for u-boot.

In the kernel driver the phase is set 90 deg for output and 120 for
sample. Dividing by 30 will result values 3 and 4. Those are the
values set in the u-boot driver.

However, the condition defining delays is wrong. MMC core driver
requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but
phase is set 30 deg for output and 120 deg for sample.

Apparently this works for most cards.
On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains
about it. Maybe there is other boards with similar problem?
So the fix is to match delays for both u-boot and kernel.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-23 12:12:56 +05:30
Eugeniy Paltsev
9b14ac5cc2 spi: dw: invert wait condition in dw_spi_xfer
While switching to readl_poll_timeout macros from custom code
the waiting condition was accidently inverted, so it was pure
luck that this code works at least in some conditions.

Fix that by inverting exit condition for readl_poll_timeout.

Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush")

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-23 11:16:41 +05:30
Tom Rini
275d80a4c2 Merge git://git.denx.de/u-boot-usb 2018-04-22 09:30:36 -04:00
Neil Armstrong
38276090ee usb: dwc3-of-simple: fix error check of clk_get_bulk when disabled
The disabled clk API returns -ENOSYS unlike the reset API returning -ENOTSUPP.

Fixes: ca7fdc8b12 ("usb: host: Add simple of glue driver for DWC3 USB Controllers integration")
Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-21 18:38:56 +02:00
Jean-Jacques Hiblot
cc73ba97c0 usb: dwc3-of-simple: Add support for DRA7/AM57 platforms.
Add the compatibility with "ti,dwc3" and enable it by default if DM_USB
is enabled.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-04-21 18:38:56 +02:00
Jean-Jacques Hiblot
103774b71c usb: dwc3-of-simple: Fix dependencies
This simple glue layer does not require CONFIG_MISC, but it does require
CONFIG_DM_USB.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-04-21 18:38:56 +02:00
Marek Vasut
f3dca4aac6 mmc: sh_mmcif: Add Kconfig entry
Add Kconfig entry for SH MMCIF driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-04-21 18:33:30 +02:00
Marek Vasut
48f54a2d74 mmc: sh_mmcif: Add DM and DT probing support
Add MMC DM and DT probing support into the SH MMCIF driver.
This patch abstracts out the common bits of the send command
and set ios functions, so they can be used both by DM and non
DM setups and adds the DM probe support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-04-21 18:33:19 +02:00
Marek Vasut
010bbe7331 clk: renesas: Minor clean up of the R8A7794 clock driver
The initconst is not used in U-Boot, drop it. The r8a7794_crit_mod_clks
is also not used in U-Boot, so drop it too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-21 18:00:00 +02:00
Marek Vasut
841feae985 clk: renesas: Minor clean up of the R8A7792 clock driver
The initconst is not used in U-Boot, drop it. The r8a7792_crit_mod_clks
is also not used in U-Boot, so drop it too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-21 18:00:00 +02:00