Commit Graph

6009 Commits

Author SHA1 Message Date
Luka Perkov
62d1e990d9 ARM: kirkwood: fix cpu info for 6282 device id
Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Stefan Roese <sr@denx.de>
2015-01-25 23:56:15 +01:00
Masahiro Yamada
37b608a52d powerpc: remove icecube_5200, Lite5200, cpci5200, mecp5200, pf5200
These boards are still non-generic boards.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2015-01-23 16:56:09 -05:00
Masahiro Yamada
a258e732a7 powerpc: mpc5xxx: PM520 board support
This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Josef Wagner <Wagner@Microsys.de>
2015-01-23 16:55:57 -05:00
Masahiro Yamada
ad734f7dc2 powerpc: mpc5xxx: remove Total5200 board support
This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 16:53:52 -05:00
Masahiro Yamada
5344cc1a82 powerpc: ppc4xx: remove PPChameleonEVB, CATcenter boards
These boards are still non-generic boards.

It is a good thing that we can drop board-specific hack code
from drivers/mtd/nand/nand_base.c

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Andrea "llandre" Marson <andrea.marson@dave-tech.it>
2015-01-23 16:53:36 -05:00
Masahiro Yamada
168dcc6cef powerpc: mpc85xx: remove P2020DS board support
This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 16:53:17 -05:00
Masahiro Yamada
891235366d powerpc: mpc85xx: remove P2020COME board support
This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Ira W. Snyder <iws@ovro.caltech.edu>
2015-01-23 16:53:12 -05:00
Masahiro Yamada
743d48151d powerpc: mpc85xx: remove P1_P2_RDB boards
These boards are still non-generic boards:
P1011RDB, P1022RDB, P2010RDB, P2020RDB

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2015-01-23 16:53:06 -05:00
Masahiro Yamada
8d1e3cb140 powerpc: mpc83xx: remove MPC8360ERDK, EMPC8360EMDS support
These boards are still non-generic boards.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Dave Liu <daveliu@freescale.com>
Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
2015-01-23 16:53:00 -05:00
Tom Rini
3b95288a2a Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2015-01-23 10:22:29 -05:00
Tom Rini
ec0cc98f2c Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2015-01-22 20:04:17 -05:00
Tom Rini
032c6867a2 Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2015-01-22 20:04:06 -05:00
Tom Rini
1d6a95011f Merge branch 'master' of git://git.denx.de/u-boot-mips 2015-01-22 20:04:05 -05:00
Masahiro Yamada
0ba924a4ec ARM: UniPhier: add SG_MEMCONF macros for DDR channel 2
PH1-sLD3, PH1-LD6b have DDR channel 2.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:52:16 +09:00
Masahiro Yamada
367a0d51db ARM: UniPhier: rename SG_MEMCONF_* macros for readability
Match the suffixes of SG_MEMCONF_* macros with SZ_* macros defined
by <linux/sizes.h> for readability.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:52:14 +09:00
Masahiro Yamada
4a35d60718 ARM: UniPhier: use <linux/sizes.h> for readability
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:52:06 +09:00
Masahiro Yamada
ee94ee3464 ARM: UniPhier: remove non-sense inline directives
The inlining is done by GCC when needed, there is no need to do it
explicitly. Furthermore, the inline keyword does not force-inline
the code, but is only a hint for the compiler.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:51:44 +09:00
Masahiro Yamada
ec79c79824 ARM: UniPhier: add static to local functions
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:51:21 +09:00
Masahiro Yamada
448437496b ARM: UniPhier: fix IECTRL set code for PH1-Pro4
For PH1-Pro4, the bit 6 of the IECTRL must be set.  It is the only
available bit in this register.  There is no effect of the write
access to the other bits.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:50:57 +09:00
Masahiro Yamada
061ae4c0bb ARM: UniPhier: describe init_page_table shorter
The assembly directive ".rept ... .endr" allows us to write the
init_page_table much shorter.  To make things further simpler,
set the text and stack area as Normal Memory, and the other sections
as Device attribute.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:50:21 +09:00
Masahiro Yamada
89a7c773ea ARM: UniPhier: fix comments in SoC Glue init function
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:49:57 +09:00
Masahiro Yamada
d6bc30af52 ARM: UniPhier: remove __packed that causes a problem on GCC 4.9
The DDR PHY training function, ddrphy_prepare_training() would not
work if compiled with GCC 4.9.

The struct ddrphy (arch/arm/include/asm/arch-uniphier/ddrphy-regs.h)
is specified with __packed because it represents a hardware register
mapping, but it turned out to cause a problem on GCC 4.9.

If -mno-unaligned-access is specified (yes, it is in
arch/arm/cpu/armv7/config.mk), GCC 4.9 is aware of the
__attribute__((packed)) and generates extra instructions to perform
the memory access in a way that does not cause unaligned access.
(Actually it is not need here because the register base, the first
argument of the ddrphy_prepare_training(), is always given with a
4-byte aligned address.)

Anyway, as a result, readl() / writel() is divided into byte-wise
accesses.  The problem is that this hardware only accepts 4-byte
register access.  Byte-wise accesses lead to unexpected behavior.

There are some options to avoid this problem.

[1] Remove -mno-unaligned-access
[2] Add __aligned(4) along with __packed to struct ddrphy
[3] Remove __packed from struct ddrphy

[1] solves the problem for ARMv7, but it does not for pre-ARMv6 and
ARMv6-M architectures where -mno-unaligned-access is default.
So, [1] does not seem reasonable in terms of code portability.

Both [2] and [3] work well, but [2] seems too much.  All the members
of struct ddrphy have the u32 type.  No padding would be inserted
even if __packed is dropped.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Tom Rini <trini@ti.com>
2015-01-23 00:44:17 +09:00
Tom Rini
9d86c8dc96 Merge branch 'next' of git://www.denx.de/git/u-boot-microblaze 2015-01-22 09:51:50 -05:00
Tom Rini
65afbbde6b Merge branch 'phys_t' of git://www.denx.de/git/u-boot-microblaze 2015-01-22 09:51:18 -05:00
Hans de Goede
1a800f7af3 sunxi: Hookup OTG USB controller support
Hookup OTG USB controller support and enable the otg controller + USB-keyb
on various tablets.

This allows tablet owners to interact with u-boot without needing to solder
a serial console onto their tablet PCB.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:56 +01:00
Hans de Goede
7cd6f92d41 sunxi: video: Use frontend for dma on sun4i to fix memory bandwidth problems
Testing has shown that on sun4i the display backend engine does not have
deep enough fifo-s causing flickering / tearing in full-hd mode due to
fifo underruns. On sun4i use the display frontend engine to do the dma from
memory, as the frontend does have deep enough fifo-s.

As added advantage of this is that it results in much better memory bandwidth
as it reduces the amount of dram bank switches, for more details see:

http://ssvb.github.io/2014/11/11/revisiting-fullhd-x11-desktop-performance-of-the-allwinner-a10.html

Note that this changes the pipeline searched for in the simplefb node, we can
get away with doing this now, since no kernel has yet shipped with simplefb
dtb nodes, and I will make sure to get a simplefb node with the new pipeline
into 3.19 before it ships.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:56 +01:00
Hans de Goede
8ffc487c75 sunxi: Stop differentiating between 512M and 1G variants of the same board
While working on adding more boards I noticed that we lack a config for
the 512M cubieboard, and that some of the new boards which I want to add also
have 512M and 1G variants, rather then adding 2 defconfig's for all of these,
lets switch the exising boards which have both a 512M and 1024M variant over
to the sun4i dram autoconfig code.

This also drops the foo_RAMSIZE_defconfig variants of boards where we currently
have 2 separate configs already.

Note:
1) The newly introduced CONFIG_DRAM_EMR1 kconfig value is not used with
a value other then its default for now, but we need this to be configurable
to support some new boards with auto dram config.

2) We always set all CONFIG_DRAM_foo values in defconfigs, even if they match
the defaults, this is done to make it more clear what values are used for a
certain board.

This has been tested on a Mele A1000, Mini-X and a Cubieboard, all 1G
variants, the dram autoconfig code has also been tested on a 512M mk802
(a defconfig for the mk802 is added in a later patch).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:56 +01:00
Hans de Goede
daf22636c2 sunxi: mmc: Add support for sun9i (A80)
The clocks on the A80 are hooked up slightly different, add support for this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:55 +01:00
Hans de Goede
dacc0881ac sun9i: Add sun9i (A80) clock setup support
Add initial sun9i (A80) clock setup support, enough to get the uart + mmc
going.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:55 +01:00
Hans de Goede
e35377d726 sun9i: Add clock_sun9i.h with ccu register layout for sun9i
Add a headerfile with the sun9i ccu register layout.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:55 +01:00
Hans de Goede
ee74fec845 sun9i: Add cpu_sun9i.h with iomem defines
Add a headerfile with all the base addresses from the sun9i blocks.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:55 +01:00
Hans de Goede
9803e4e1db sunxi: Rename cpu.h to cpu_sun4i.h
sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite
different, so add a wrapper cpu.h which includes the right mach specific
cpu_sun#i.h based on mach, like we already do with clock.h and dram.h .

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:55 +01:00
Hans de Goede
cc67a0b6e5 sunxi: Move clock_get_pllX / clock_set_pllX protos to mach specific headers
Which pll-s are available depends on the machine type, move the
clock_get_pllX / clock_set_pllX prototypes to the clock_sun?i.h header files
so that we only declare what is actually available. e.g. clock_get_pll5p()
is not available on sun6i / sun8i, and with sun9i we get a completely
different set of plls.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:55 +01:00
Hans de Goede
22b618346a sunxi: Drop pll6 setting from clock_init_uart
As the comment says now that we have SPL support this is no longer necessary,
as PLL6 is already setup with the exact same parameters by the SPL.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:55 +01:00
Hans de Goede
6515032e3b sunxi: display: Make lcd display clk phase configurable
While running some tests with an Olinuxino-A13-Micro + a 7" Olimex LCD module
I noticed that the screen flickered. This is caused by the lcd display clk
phase reg value being set to 0, where it should be 1 in this setup.

This commit adds a Kconfig option for the lcd display clk phase, so that we
can set it per board. This defaults to 1, because looking at all the fex
files in sunxi-boards, that is by far the most used value.

This commit updated the Ippo and MSI Primo73 tablet defconfigs to override the
default of 1 with 0, as that is the correct value for those tablets, this
keeps the register settings the same as before this commit.

The Olinuxino-A13 defconfigs are not updated, changing the register setting
for these boards from 0 to 1, this is intentional.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:55 +01:00
Hans de Goede
b56f6e2b4e sunxi: Restore lowlevel_init usage
2 recent sunxi changes have removed the usage of lowlevel_init by moving some
code around and then setting CONFIG_SKIP_LOWLEVEL_INIT.
This is problematic for 2 reasons:

1) It does not just stop s_init from being called, it also stops
cpu_init_cp15 from getting called, which is undesirable.

2) We want u-boot.bin to be usable standalone, without SPL, some people e.g.
use an upstream u-boot.bin together with Allwinner's boot0 loader. So
u-boot.bin must (re)initialize the gpios, timer, etc.

This commit restores the lowlevel_init / s_init usage, while keeping the
changes to no longer use the global-data (gd) struct in the SPL.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-01-21 10:46:28 -05:00
Codrin Ciubotariu
7e40e4beb8 arch/powerpc: Initialize VSC9953 L2 Switch
This patch initializes VSC9953 L2 Switch for boards that have
CONFIG_VSC9953 defined in their config file.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
2015-01-21 09:23:35 -06:00
Daniel Schwierzeck
e520023882 MIPS: add support for pre-relocation malloc
Implement MIPS specific setup of the gd_t structure to support
pre-relocation malloc. If CONFIG_SYS_MALLOC_F_LEN is specified,
a memory area will be reserved after the initial stack area and
the gd->malloc_base pointer will be initialized.

After this patch the new driver model can be used on MIPS.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:07:23 +01:00
Daniel Schwierzeck
dd82128ef5 MIPS: add support for CONFIG_SYS_INIT_SP_ADDR
Support the existing config option CONFIG_SYS_INIT_SP_ADDR on
MIPS. This allows to move the initial stack to other places
than the beginning of RAM.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:07:16 +01:00
Daniel Schwierzeck
9d638eeab7 MIPS: add Kconfig option for CONFIG_SWAP_IO_SPACE
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:06:51 +01:00
Daniel Schwierzeck
c57dafb5b4 MIPS: replace $(CPU) with Kconfig symbols
Conditionally set head-y and lib-y with boolean Kconfig symbols
for selected CPU. This deprecates the usage of the $(CPU) variable.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:06:04 +01:00
Thomas Langer
a18a477147 MIPS: use common code from lib/time.c
The common code just needs the C0_COUNT as free running counter,
without the need of writing and checking C0_COMPARE.

The function get_tbclk() is still implemented here instead of changing
all places of CONFIG_SYS_MIPS_TIMER_FREQ to CONFIG_SYS_TIMER_RATE.

The change was tested on a MIPS32 system, but as the MIPS64 code
was/is the same, this should be no problem.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
2015-01-21 14:02:49 +01:00
Daniel Schwierzeck
e13a50b34b MIPS: bootm: add bootstage reporting
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:02:49 +01:00
Daniel Schwierzeck
5002d8cc54 MIPS: bootm: prepare a flattened device tree for the kernel
Add the initial code to prepare a flattened device tree for
the kernel like relocating the FDT blob and fixing up the
/chosen and /memory nodes.

The final hand over to the kernel is not yet implemented. After
the community agreed on the MIPS boot interface for device trees,
the corresponding code will be added.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:02:49 +01:00
Daniel Schwierzeck
8cec725ad5 MIPS: bootm: add mem, rd_start and rd_size to kernel command line
If the user wants to boot a kernel without legacy environment,
information like memory size, initrd address and size should be
handed over to the kernel in the command line.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:02:48 +01:00
Daniel Schwierzeck
ca65e5851f MIPS: bootm: refactor preparation of Linux kernel environment
Move preparation of Linux kernel environment in a separate
function and mark it as legacy. Add a Kconfig option to make
that legacy mode configurable.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:02:48 +01:00
Daniel Schwierzeck
25fc664f40 MIPS: bootm: refactor preparation of Linux kernel command line
Move preparation of Linux kernel command line in a separate
function and mark it as legacy. Add a Kconfig option to make
that legacy mode configurable.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:02:48 +01:00
Michal Simek
da931af1b5 microblaze: Support stack protection feature
Ensure that stack didn't rewrite important part
of u-boot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-21 10:33:07 +01:00
Michal Simek
38cd2d9c9b mmc: zynq: Use phys_addr_t for addresses
phys_addr_t is designed for physical addresses that's why
use it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-21 10:30:43 +01:00
Michal Simek
822d43a6d9 microblaze: Enable hardware exception by default
Enable hardware exception by default to be able to
handle it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-21 10:20:36 +01:00