The Programmable Multibit ECC (PMECC) controller is a programmable binary
BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
can be used to support both SLC and MLC NAND Flash devices. It supports to
generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data.
To use PMECC in this driver, the user needs to set the PMECC correction
capability, the sector size and ROM lookup table offsets in board config file.
This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference
is in this version it uses registers structure access hardware instead of using macros.
It is tested in 9x5 serial boards.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[rebase]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch
1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support.
2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail().
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix empty newline at EOF error and move return value check into ifdef]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Add at91sam9x5 series spi flash boot support
Using at91sam9x5ek_spiflash to configure, then it can boot from at25df321
serial flash
SPI mater work in 30Mhz speed, while not 1Mhz speed. This will base on
atmel_spi patch, or else, it will occur receive overrun
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Remove CONFIG_ARCH_CPU_INIT for at91sam9g10ek and at91sam9m10g45ek
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[rebase on TOT]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
A lot of at91 boards have the console_init_f in board_init. This is useless
cause it was called before by generic code in lib/board.c.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Jens Scharsig <esw@bus-elektronik.de>
cc: Stelian Pop <stelian@popies.net>
cc: Sedji Gaouaou<sedji.gaouaou@atmel.com>
cc: Albin Tonnerre <albin.tonnerre@free-electrons.com>
cc: Eric Benard <eric@eukrea.com>
Tested-by: voice.shen@atmel.com
Tested-by: voice.shen@atmel.com
Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
The atmel at91sam9x5 series spi has feature to avoid receive overren
Using the patch to enable it
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
As the maintainer for at91sam9g10ek and at91sam9m10g45ek can not reach
any more.
So I wish to take over the maintainer for sam9g10 and sam9m10g45
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
fix a bug:
when not boot from NAND, the NAND flash can not be detected.
Using this to fix it
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Before reset dbgu transmitter, we just wait TXEMPTY to drain the
transmitter register(Just in case). If not doing this, we may sometimes
see several weird characters from DBGU.
A short delay is also added to make sure the new serial settings are
settled.
Signed-off-by: Hong Xu <hong.xu@atmel.com>
[cherry-picked from u-boot-atmel/old-next]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The old update script uses 'load_addr' which is never set. Use 'fileaddr'
instead which is automagically set by e.g. dhcp.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Stelian Pop <stelian@popies.net>
Remove CONFIG_ARCH_CPU_INIT, no need it anymore
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Timeout variable is decremented once more when while condition is not met.
Following "if" does not detect correctly that timeout has occurred.
Because of this bug the "usb start" command on AM335X-EVM board did not detect correctly that USB device was not attached.
timeout = musb_cfg.timeout;
while (timeout--)
if (readb(&musbr->devctl) & MUSB_DEVCTL_HM)
break;
/* if musb core is not in host mode, then return */
if (!timeout)
return -1;
Signed-off-by: Matej Franceskin <Matej.Franceskin@comtrade.com>
CC: Marek Vasut <matex@denx.de>?
commit 5f6aa03fda
USB: Fix complaints about strict aliasing in OHCI-HCD
tried to fix this, but gcc4.4 still complains. So, this
patch basically reverts the above and does a simpler fix.
also, the above commit incorrectly changed
/* corresponds to data_buf[4-7] */
datab [1] = 0;
to
/* corresponds to databuf.u8[4-7] */
databuf.u8[1] = 0;
This patch also fixes that.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Relax the qTD transfer alignment constraints in order to need less qTDs for
buffers that are aligned to 512 bytes but not to pages.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
There is a 5-ms delay in usb_stor_BBB_transport, which occurs every 10 kiB of
data for fragmented fatload usb, i.e. roughly 500 ms of delay per MiB. This adds
up to quite a bit of delay if you're loading a large ramdisk.
The purpose of this delay should be to debounce the 5-V/100-mA USB power up.
This patch skips the delay if the device has already been queried as ready.
Signed-off-by: Jim Shimer <mgi2475@motorola.com>
Rework following the review:
- Rebase against the latest u-boot-usb master.
- Replace typedef with #define.
- Use the existing flags struct field instead of adding a new field.
- Remove the setter function.
- Remove the typecasts.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Cc: Jim Shimer <mgi2475@motorola.com>
Now that the EHCI driver allocates its qTDs from the heap, the MSC driver is
only limited by the SCSI commands it uses.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
The commit 5dd95cf made the MSC driver EHCI-specific. This patch restores a
basic support of non-EHCI HCDs, like before that commit.
The fallback transfer size is certainly not optimal, but at least it should work
like before.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
This patch takes advantage of the hardware EHCI qTD queuing mechanism to avoid
software and transfer splitting overhead so as to make transfers as fast as
possible.
The only drawback is a call to memalign. However, this is fast compared to the
transfer timings, and the heap size to allocate is small, e.g. 128 kiB in the
worst case for a transfer length of 65535 packets of 512 bytes.
Tested on i.MX25, i.MX35 and i.MX51. In my test conditions, the speed gain was
very significant (several times faster), which is really appreciable when
accessing large files.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Make some light cosmetic code cleanup by the way.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Interrupt transfers requiring several transactions are not supported by
submit_int_msg() because bInterval is ignored. This patch returns a failure code
and prints an error message in this case.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Enable the g_dnl composite USB gadget driver with embedded DFU function on it.
It now uses the composite gadget framework to support download specific
USB functions (like enabled DFU or USB Mass Storage).
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Support for USB UDC driver at trats board.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Support for u-boot's command line command "dfu <interface> <dev> [list]".
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Support for MMC storage devices to work with DFU framework.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
New, separate driver at ./drivers/dfu has been added. It allows platform
and storage independent operation of DFU.
It has been extended to use new MMC level of command abstraction.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Support for f_dfu USB function.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Composite USB download gadget support (g_dnl) for download functions.
This code works on top of composite gadget.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().
Since no_snoop was only used on i.MX, get rid of it BTW.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Define ARCH_MXC for i.MX devices. This is useful to identify features or
behaviors common to all i.MX SoCs.
The i.MX28 is omitted because its architecture is a bit different (like imx/mxc
vs. mxs in Linux).
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kim Phillips <kim.phillips@freescale.com>
The macro to get the gpio number id was renamed to
IMX_GPIO_NR as in kernel. Fix the wrong name in efika.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matt Sealey <matt@genesi-usa.com>
Acked-by: Matt Sealey <matt@genesi-usa.com>
We have no idea where the DCD was derived from for Smartbook support, but they
differ from the Smarttop settings, MX51EVK settings and certainly don't
correspond to any shipped or development version of U-Boot that Genesi has ever
had on any Smartbook.
So, copy the calibrated, verified settings from the U-Boot as shipped with every
Smartbook since retail production. Remove those few settings that just set the
POR defaults which have already been confirmed for the previous Smarttop DCD
change.
One of the lines is specific to i.MX51 TO3 designs and therefore TO2 Smartbooks
will possibly not work so reliably with this new DCD; that said, TO2 Smartbooks
basically don't exist at retail and the number of units in the world is less
than 5 (3 of which are at the Genesi office or owned by Genesi employees).
Many hours of memory testing confirms the new settings are stable.
Patch v2:
* picked the correct commit from our development tree, correcting tuned DDR ODF setting
(which was correct anyway)
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
This is a rework of a previously submitted patchset and bundles the
main board support and USB support into a single commit.
It requires the patch "mx5: add iomux-mx51.h include"
* Use iomux-mx51.h include to simplify board configuration.
* Simplify LED support (remove efikamx_toggle_led, change lit LEDs).
* Simplify MMC support for CD and WP pin differences.
* Fix broken CPU voltage setting - comment said 1.1V but the code set to
1.2V. It should never have been set to 1.2V even on i.MX51 TO2 and
all available Linux kernels would drop the voltage to 1.1V anyway and
work reliably. This should lower power consumption during the boot
process.
* Function renames for readability.
* Some board identification string changes to match actual product names.
* Passes checkpatch (v2)
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Cc: Stefano Babic <sbabic@denx.de>
For representing a timeout value, it makes more sense to pass it as
'unsigned int'.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Update maintainer for "efikamx" and "efikasb" to myself.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
PCBID pads seem to need time to settle due to external pulldowns, otherwise
we are reading floating GPIO pins with implicit pad pullups and get the wrong
data. However we can't "wait" at the time we need them before relocation,
since timers are not available. The time taken to get from DCD to the code
requiring the pads set seems to be more than long enough (even with caches
enabled).
We have space in the DCD due to the DDR settings changes to configure all
the pad settings we need for this, plus the LED pad settings too which
reduces the amount of code required later on.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Efika MX boards configure their DDR pad settings twice, one in the DCD generated
from imximage_*.cfg and again in init_drive_strength called before relocation.
Rather than doing this, roll the changes it makes into the DCD so DDR is set up
before a single line of code in U-Boot is run.
The settings are identical with this DCD block which is shorter (by 7 entries)
than the old one, and after the output of init_drive_strength since a lot of the
functionality in the existing DCD and init_drive_strength function was just
setting the POR defaults. This goes to explain some now-missing entries.
Several hundred rounds of mtest have been run to test the settings before and
after to confirm DDR is stable and no ill-effects have been found.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
* Move Efika MX Smarttop and Smartbook boards into a "genesi" vendor directory
* Rename efikamx -> mx51_efikamx since there is an mx53_efikamx and mx6_efikamx to come
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Align the SSP clock speed with oscilator to achieve
higher transfer stability.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
This change implements DMA chaining into SPI driver. This allows
the transfers to go much faster, while also fixing SF issues.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Load from SPI flash can create a long DMA chain, which can take long
time to transfer. Change the DMA timeout to roughly 10s to prevent
such long chains misreporting errors.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
