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3 Commits

Author SHA1 Message Date
Lukas Auer
862e2e75e8 riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I 
RISC-V defines the base integer instruction sets as RV32I and RV64I.
Rename CPU_RISCV_32 and CPU_RISCV_64 to ARCH_RV32I and ARCH_RV64I to
match this convention.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
 2018-11-26 13:57:29 +08:00
Rick Chen
7215787c4e SPDX: Convert single license tags to Linux Kernel style 
Fix license tags problem after apply patchs about
riscv: Enable efi_loader support.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
 2018-05-29 14:44:21 +08:00
Alexander Graf
a7f99e5dd7 riscv: Add setjmp/longjmp code 
To support efi_loader we need to have platform support for setjmp/longjmp.
Add it here.

Signed-off-by: Alexander Graf <agraf@suse.de>
 2018-05-29 14:43:12 +08:00