By allocating the e1000 device structures much earlier, we can easily
generate better error messages and siginficantly clean things up.
The only user-visable change (aside from reworded error messages) is
that a detected e1000 device which fails to initialize due to software
or hardware error will still be allocated a device number.
As one example, consider a system with 2 e1000 PCI devices where the
first controller has a corrupted EEPROM. Using the old code the
second controller would be "e1000#0", while with this change it would be
"e1000#1".
This change should hopefully make such EEPROM errors much more
straightforward to handle correctly in boot scripts and the like.
It is also necessary for a followup patch which allows SPI programming
of an e1000 controller's EEPROM even if the checksum is invalid.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Consolidate the test for a dual-port NIC to one location for easy
modification, then fix support for the dual-port 82571.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
* 'master' of git://git.denx.de/u-boot-arm:
ARM: Add Calxeda Highbank platform
dkb: make mmc command as default enabled
Marvell: dkb: add mmc support
ARM: pantheon: add mmc definition
davinci: remove config.mk file from the sources
ARM:AM33XX: Add support for TI AM335X EVM
ARM:AM33XX: Added timer support
ARM:AM33XX: Add emif/ddr support
ARM:AM33XX: Add clock definitions
ARM:AM33XX: Added support for AM33xx
omap3/emif4: fix registers definition
davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM
davinci: emac: add support for more than 1 PHYs
davinci: emac: add new features to autonegotiate for EMAC
da850evm: Move LPSC configuration to board_early_init_f()
omap4_panda: Build in cmd_gpio support on panda
omap: Don't use gpio_free to change direction to input
mmc: omap: Allow OMAP_HSMMC[23]_BASE to be unset
OMAP3: overo : Add environment variable optargs to bootargs
OMAP3: overo: Move ethernet CS4 configuration to execute based on board id
OMAP3: overo : Use ttyO2 instead of ttyS2.
da830: add support for NAND boot mode
dm36x: revert cache disable patch
dm644X: revert cache disable patch
devkit8000: Add malloc space
omap: spl: fix build break due to changes in FAT
OMAP3 SPL: Provide weak omap_rev_string
omap: beagle: Use ubifs instead of jffs2 for nand boot
omap: overo: Disable pull-ups on camera PCLK, HS and VS signals
omap: overo: Configure mux for gpio10
SPL: Add DMA library
omap3: Add interface for omap3 DMA
omap3: Add DMA register accessors
omap3: Add Base register for DMA
arm, davinci: add missing LSPC define for MMC/SD1
U-Boot/SPL: omap4: Make ddr pre-calculated timings as default.
DaVinci: correct MDSTAT.STATE mask
omap4: splitting padconfs into common, 4430 and 4460
omap4: adding revision detection for 4460 ES1.1
omap4: replacing OMAP4_CONTROL with OMAP4430_CONTROL
gplug: fixed build error as a result of code cleanup patch
kirkwood_spi: add dummy spi_init()
gpio: mvmfp: reduce include platform file
ARM: orion5x: reduce dependence of including platform file
serial: reduce include platform file for marvell chip
ARM: kirkwood: reduce dependence of including platform file
ARM: armada100: reduce dependence of including platform file
ARM: pantheon: reduce dependence of including platform file
Armada100: Add env storage support for Marvell gplugD
Armada100: Add SPI flash support for Marvell gplugD
Armada100: Add SPI support for Marvell gplugD
SPI: Add SPI driver support for Marvell Armada100
dreamplug: initial board support.
imx: fix coding style
misc: pmic: drop old Freescale's pmic driver
MX31: mx31pdk: use new pmic driver
MX31: mx31ads: use new pmic driver
MX31: mx31_litekit: use new pmic driver
MX5: mx53evk: use new pmic driver
MX5: mx51evk: use new pmic driver
MX35: mx35pdk: use new pmic driver
misc: pmic: addI2C support to pmic_fsl driver
misc: pmic: use I2C_SET_BUS in pmic I2C
MX5: efikamx/efikasb: use new pmic driver
MX3: qong: use new pmic driver
RTC: Switch mc13783 to generic pmic code
MX5: vision2: use new pmic driver
misc: pmic: Freescale PMIC switches to generic PMIC driver
misc:pmic:samsung Enable PMIC driver at GONI target
misc:pmic:max8998 MAX8998 support at a new PMIC driver.
misc:pmic:core New generic PMIC driver
mx31pdk: Remove unneeded config
mx31: provide readable WEIM CS accessor
MX51: vision2: Set global macros
I2C: Add i2c_get/set_speed() to mxc_i2c.c
ARM: Update mach-types
devkit8000: Add config to enable SPL MMC boot
devkit8000: protect board_mmc_init
arm, post: add missing post_time_ms for arm
cosmetic, post: Codingstyle cleanup
arm, logbuffer: make it compileclean
tegra2: Enable MMC for Seaboard
tegra2: Add more pinmux functions
tegra2: Rename PIN_ to PINGRP_
tegra2: Add more clock functions
tegra2: Clean up board code a little
tegra2: Rename CLOCK_PLL_ID to CLOCK_ID
fec_mxc.c: In function 'fec_mii_setspeed':
fec_mxc.c:112:2: warning: format '%#lx' expects type 'long unsigned int', but
argument 2 has type 'u32'
fec_mxc.c: In function 'fec_recv':
fec_mxc.c:632:2: warning: format '%x' expects type 'unsigned int', but argument
2 has type 'long unsigned int'
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
ks8695eth.c:199:2: warning: format '%x' expects type 'unsigned int', but
argument 4 has type 'volatile void *'
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
4xx_enet.c: In function 'ppc_4xx_eth_init':
4xx_enet.c:1352: warning: format '%08x' expects type 'unsigned int', but
argument 2 has type 'volatile struct mal_desc_t *'
4xx_enet.c:1352: warning: format '%08x' expects type 'unsigned int', but
argument 3 has type 'volatile struct mal_desc_t *'
4xx_enet.c:1365: warning: format '%08lx' expects type 'long unsigned int', but
argument 3 has type 'unsigned int'
4xx_enet.c:1376: warning: format '%08lx' expects type 'long unsigned int', but
argument 3 has type 'unsigned int'
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
remove macro CONFIG_EMAC_MDIO_PHY_NUM and depending macro EMAC_MDIO_PHY_NUM
as they are no longer needed with the support for more than 1 PHYs in davinci
emac driver.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
add support for more than 1 PHYs. Many of the davinci platforms have more
than 1 PHYs on thier board. This patch extends support in davinci emac
driver for upto 3 PHYs.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
add more features like DUPLEX, 100MB link speed etc to auto negotiate
in EMAC driver. EMAC controller autonegotiates for these features with
PHYs which are on the board.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
For files like the drivers/serial/serial.c, it must include the
platform file, as the CONFIG_SYS_NS16550_COM1 must reference to the
definition in the platform definition files.
Include the platform definition file in the config file, so that it
would decouple the dependence for the driver files.
Signed-off-by: Lei Wen <leiwen@marvell.com>
It seems to be good practice to return the number of received bytes in the
eth_device's recv() callback, here: tse_eth_rx().
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
Note: This is kind of guess work. The current code is preserved for
all RGMII related modes. It is different for flags=0 (GMII) and flags=5
(SGMII). The last case, SGMII, is successfully tested on
Altera's Terasic DE4.
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
Only one board uses this driver (ns9750dev), but the board doesn't seem
to have an entry to actually build it in the Makefile/boards.cfg, so just
delete net support from its board config.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Everyone seems to have converted to the new enc28j60 driver, so drop
this older one which isn't used and doesn't support NET_MULTI.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
There are several mdelay() definitions in the driver and
board code. Remove them all and provide a common mdelay()
in lib/time.c.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
The code had two paths depending on whether the card was to be
accessed from plain memory or the IO region. However the error
path checks whether IO region was obtained - twice. Fix up the
error path according to the probable intention.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch move the reset function from initialization to
driver register procedure.
Some embedded system supports wake on lan nowadays. On this kind of system,
the ftgmac100 will be still supplied power after the system has been
shut-down by Linux. Hence the register used by linux won't be clear
when the system has been powered-off.
The origin ftgmac100 driver in u-boot will only register
driver and functions to network stack and won't reset the ftgmac100
hardware if the network won't be used during boot-up.
This will lead ftgmac100 continue receiving packets and then might corrupt
linux kernel when booting up.
So we reorder the hardware reset function earlier to force the hardware
to be reset whether it will be used or not.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
The work-around for P4080 erratum SERDES9 says that the SERDES receiver
lanes should be reset after the XAUI starts tranmitting alignment signals.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The MDIO controller to talk to external PHYs is on FM1-DTSEC1 so don't
allow disabling. If we disable it we end up powering the block down in
the SoC and thus can't communicate to any external PHYs.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
FM1-DTSEC1's MAC was being marked as disabled if the port was not
configured based on the SoC configuration. However we utilize the MAC
interface for MDIO and thus should NOT mark it disabled.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
commit a45dde2293 changed the dm9000
direct register access to standard IO. This should work
on the ColdFire platform as there are corresponding macros for
the LE devices. But the hardware settings on some ColdFire boards had
swapped the byte order which make the original macros such as out_le16
cannot work. To avoid changing the common io access code on ColdFire
platform, the DM9000_BYTE_SWAPPED define was added to make the dm9000 use
__raw* IO access on some ColdFire boards.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Add axi_ethernet driver for little-endian Microblaze.
RX/TX BDs and rxframe buffer are shared among all axi_ethernet MACs.
Only one MAC can work in one time.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Setup RX/TX ping-pong buffer for every emaclite IP separately.
The next patch move initialization directly to board code.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Before the Teranetics TN2020 PHY can be used, the SERDES lanes need to be
aligned, so wait for lane alignment before completing the startup sequence.
Note that this process can take up to three seconds.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The EC1_EXT, EC2_EXT, and EC3 bits in the RCW don't officially exist on the
P3060 and should always be set to zero.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Function dtsec_configure_serdes() needs to know where the TBI PHY registers
are in order to configure SGMII for proper SerDes operation.
During SGMII initialzation, fm_eth_init_mac() passing NULL for 'phyregs'
when it called init_dtsec(), because it was believed that phyregs was not
used. In fact, it is used by dtsec_configure_serdes() to configure the TBI
PHY registers.
We also need to define the PHY registers in struct fm_mdio.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The Teranetics PHY does not properly report the link state
for fiber connections. The new PHY code actually checked the link,
and so the FM driver would refuse to talk over a linkless PHY.
But the link may actually be up, so now we always report it as up
for fiber connections on the tn2020.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Fix:
smc91111.c: In function 'smc_phy_configure':
smc91111.c:1194:6: warning: variable 'failed' set but not used [-Wunused-but-set-variable]
smc91111.c:1190:7: warning: variable 'phyaddr' set but not used [-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Esp. while printing the environment the output is usually longer than 512
bytes. Instead of cutting the message, send multiple 512 bytes packets.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Mike Frysinger <vapier@gentoo.org>
This is long over due. All but two net drivers have been converted, but
those have now been dropped.
The only thing left to do is actually delete all references to NET_MULTI
and code that is compiled when that is not defined. So here we scrub the
core code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These drivers have never been converted to NET_MULTI, and they are only
used by one board (BMW). So drop the drivers until someone feels like
rewriting them for NET_MULTI support.
Rather than punting the BMW board completely, just disable net support
in its board config. Seems to build fine without it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/p3060: Add SoC related support for P3060 platform
powerpc/85xx: Add support for setting up RAID engine liodns on P5020
powerpc/85xx: Refactor some defines out of corenet_ds.h
fm-eth: Add ability for board code to disable a port
powerpc/mpc8548: Add workaround for erratum NMG_LBC103
powerpc/mpc8548: Add workaround for erratum NMG_DDR120
powerpc/mpc85xxcds: Fix PCI speed
powerpc/mpc8548cds: Fix booting message
powerpc/p4080: Add support for secure boot flow
powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
powerpc/p2041rdb: remove watch dog related codes
powerpc/p2041rdb: updated description of cpld command
powerpc/p2041rdb: add more ddr frequencies support
powerpc/p2041rdb: set sysclk according to status of physical switch SW1
powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
powerpc/mpc8xxx: Add DDR2 to unified DDR driver
powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
powerpc/85xx: Refactor P2041RDB to use common p_corenet files
powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
powerpc/85xx: Enable CMD_REGINFO on corenet boards
powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
powerpc/85xx: Fix USB protocol definitions for P1020RDB
powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
powerpc/mpc8xxx: Move DDR RCW overriding to common code
powerpc/mpc8xxx: Extend CWL table
powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
powerpc/85xx: Cleanup extern in corenet_ds board code
powerpc/p2041rdb: Add ethernet support on P2041RDB board
powerpc/85xx: Add networking support to P1023RDS
powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
powerpc/85xx: Add FMan ethernet support to P4080DS
powerpc/85xx: Add support for FMan ethernet in Independent mode
powerpc/mpc8548cds: Cleanup mpc8548cds.c
powerpc/mp: add support for discontiguous cores
powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
fdt: Add new fdt_create_phandle helper
fdt: Rename fdt_create_phandle to fdt_set_phandle
powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
nand: Freescale Integrated Flash Controller NAND support
powerpc/85xx: Add basic support for P1010RDB
powerpc/85xx: Add support for new P102x/P2020 RDB style boards
powerpc/85xx: relocate CCSR before creating the initial RAM area
powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
Add P3060 SoC specific information:cores setup, LIODN setup, etc
The P3060 SoC combines six e500mc Power Architecture processor cores with
high-performance datapath acceleration architecture(DPAA), CoreNet fabric
infrastructure, as well as network and peripheral interfaces.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The SoC configuration may have more ports enabled than a given board
actually can utilize. Add a routinue that allows the board code to
disable a port that it knows isn't being used.
fm_disable_port() needs to be called before cpu_eth_init().
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Current xilinx emaclite use net multi registration
but doesn't support several emaclites interfaces.
Changing driver name with adding address to name
is the first step how to distiguish several drivers.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
This patch allows user to register multiple FEC controllers. To preserve
compatibility with older boards, the mxcfec_register() call is still in place.
To use multiple controllers, new macro is in place, the mxcfec_register_multi(),
which takes more arguments. The syntax is:
mxcfec_register_multi(bd, FEC ID, FEC PHY ID on the MII bus, base address);
To disable the fecmxc_register() compatibility stuff, define the macro
CONFIG_FEC_MXC_MULTI. This will remove the requirement for defining IMX_FEC_BASE
and CONFIG_FEC_MXC_PHYADDR.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
The default is MII100, which was hardcoded previously in the driver.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Once the MDIO state machine has been initialized and enabled, it
starts polling all 32 PHY addresses on the MDIO bus, looking for
an active PHY. Add a 5 ms delay, so all PHYs are for sure detected.
This problem was detected on the cmc board with a KSZ8864 switch.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The PHY driver was too verbose and corrupted the boot message display
like this:
...
Net: Ethernet PHY: KSZ8873 @ 0x02
DaVinci-EMAC
...
Turn printf() into debug() so we get the expected output again:
...
Net: DaVinci-EMAC
...
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Paulraj Sandeep <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for Fast Ethernet Controller driver for
Armada100 series.
Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration
architecture) is the ethernet contoller block. Normally it is utilized
via Queue Manager (Qman) and Buffer Manager (Bman). However for boot
usage the FMan supports a mode similar to QE or CPM ethernet collers
called Independent mode.
Additionally the FMan block supports multiple 1g and 10g interfaces as a
single entity in the system rather than each controller being managed
uniquely. This means we have to initialize all of Fman regardless of
the number of interfaces we utilize.
Different SoCs support different combinations of the number of FMan as
well as the number of 1g & 10g interfaces support per Fman.
We add support for the following SoCs:
* P1023 - 1 Fman, 2x1g
* P4080 - 2 Fman, each Fman has 4x1g and 1x10g
* P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Dai Haruki <dai.haruki@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This reverts commit 041c542219.
The lines removed by this commit weren't redundant. The logic is (and
probably should be better commented):
Find the intersection of the advertised capabilities of both sides of
the link (lpa).
From that intersection, find the highest capability we can run at
(that will be the negotiated link).
Now imagine that the intersection (lpa) is (LPA_100HALF | LPA_10FULL).
The code will now set phydev->speed to 100, and phydev->duplex to 1,
but this link does not support 100FULL.
Kudos to Andy Fleming <afleming@gmail.com> for binging this to
attention and for the explanation.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This change slightly improves readability of the phydev speed/duplex
assignment logic.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Detlev Zundel <dzu@denx.de>
This change allows to cope with a mii bus device registered using
miiphy_register(), which doesn't assign a default reset handler.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Commit 6af1d41 "smc911x MII made available" was missing a few "const"
qualifiers. Fix the resulting in build warnings:
smc911x.c: In function 'smc911x_initialize':
smc911x.c:297: warning: passing argument 2 of 'miiphy_register' from incompatible pointer type
smc911x.c:297: warning: passing argument 3 of 'miiphy_register' from incompatible pointer type
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Helmut Raiger <helmut.raiger@hale.at>
The driver already had the MII functions, but they have not been
registered using miiphy_register().
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
TX and RX channel numbers programmed as '1' during EMAC
teardown initialization is wrong. This patch fixes the
same by setting channel number to '0' which is used by U-boot.
Signed-off-by: Sugumar Natarajan <sugumar@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The PHY driver was too verbose and corrupted the boot message display
like this:
...
Net: TSEC0 connected to Marvell 88E1111S
TSEC1 connected to Marvell 88E1111S
TSEC0, TSEC1
...
Turn printf() into debug() so we het the expected output again:
...
Net: TSEC0, TSEC1
...
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kumar Gala <galak@kernel.crashing.org>
Built-in Ethernet adapters support setting the mac address by means of a
ethaddr environment variable for each interface (ethaddr, eth1addr, eth2addr).
This adds similar support to the USB network side, using the names
usbethaddr, usbeth1addr, etc. They are kept separate since we don't want
a USB device taking the MAC address of a built-in device or vice versa.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Eric Bénard <eric@eukrea.com>
Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address
Signed-off-by: Mike Williams <mike@mikebwilliams.com>
Only install der 4xx-EMAC interrupt handlers *after* the core
network driver is registered.
This problem was noticed on the APM Taishan 440GX board, where
the board hung upon bootup after displaying "Net:".
Signed-off-by: Stefan Roese <sr@denx.de>
gen10g_startup() had 2 bugs:
1) It had a boolean logic error in checking the MMD mask, and
always checked all of them.
2) It checked devices which don't actually report link state, which
meant that it would never believe the link was fully up.
Fix the boolean logic, and then mask the MMD mask so only link-reporting
devices are checked.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Reported-by: Ed Swarthout <Ed.Swarthout@freescale.com>
When CONFIG_DW_SEARCH_PHY is disabled, the local phy_addr variable
never gets initialized which causes random behavior at runtime and a
gcc warning. So set it by default to the stored phy address.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Fix commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The ctrl variable is only used when autoneg support is disabled, so only
declare it under those conditions to avoid an unused variable warning.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
This patch fixes following compile warning:
---8<---
macb.c: In function 'macb_write_hwaddr':
macb.c:525:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
--->8---
Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
This patch removes the warning
---8<---
at91_emac.c: In function 'at91emac_write_hwaddr':
at91_emac.c:487:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
--->8---
Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
* convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme
* Fix: timer.c compile error io.h not found with arm/at91rm9200
* update arm920t/at91 to ATMEL_xxx name scheme
* update arm920t/at91 soc lib
* update at91_emac driver
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
This allows this configuration to be defined differently for some
boards that request it.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
This is needed for the upcoming TFTP server implementation.
This also simplifies PingHandler() and fixes rxhand_f documentation.
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
This converts tsec to use the new PHY Lib. All of the old PHY support
is ripped out. The old MDIO driver is split off, and placed in
fsl_mdio.c. The initialization is modified to initialize the MDIO
driver as well. The powerpc config file is modified to configure PHYLIB
if TSEC_ENET is configured.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
The tsec driver had a bunch of PHY drivers already written. This
converts them all into PHY Lib drivers, and serves as the first
set of PHY drivers for PHY Lib.
While doing that, cleaned up a number of magic numbers (though
not all of them, as PHY vendors like to keep their numbers as
magical as possible). Also, noticed that almost all of the
vitesse/cicada PHYs had the same config/parse/startup functions,
so those have been collapsed into one.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
Extends the mii_dev structure to participate in a full-blown MDIO and
PHY driver scheme. The mii_dev structure and miiphy calls are modified
in such a way to allow the original mii command and miiphy
infrastructure to work as before, but also to support a new set of APIs
which allow (among other things) sharing of PHY driver code and 10G support
The mii command will continue to support normal PHY management functions
(Clause 22 of 802.3), but will not be changed to support 10G
(Clause 45).
The basic design is similar to PHY Lib from Linux, but simplified for
U-Boot's network and driver infrastructure.
We now have MDIO drivers and PHY drivers
An MDIO driver provides:
read
write
reset
A PHY driver provides:
(optionally): probe
config - initial setup, starting of auto-negotiation
startup - waiting for AN, and reading link state
shutdown - any cleanup needed
The ethernet drivers interact with the PHY Lib using these functions:
phy_connect()
phy_config()
phy_startup()
phy_shutdown()
Each PHY driver can be configured separately, or all at once using
config_phylib_all_drivers.h (added in the patch which adds the drivers)
We also provide generic drivers for Clause 22 (10/100/1000), and
Clause 45 (10G) PHYs.
We also implement phy_reset(), and call it in phy_connect(). Because
phy_reset() is essentially the same as miiphy_reset, but:
a) must support 10G PHYs, and
b) should use the phylib primitives,
we implement miiphy_reset, using phy_reset(), but only when
CONFIG_PHYLIB is set. Otherwise, we just use the old version. In this
way, we save on compile size, even if we don't manage to save code size.
Pulled ethtool.h and mdio.h from:
git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6
782d640afd15af7a1faf01cfe566ca4ac511319d
With many, many deletions so as to enable compilation under u-boot
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
There were a few files which were already using phy_read and phy_write
for their PHY function names. It's only a few places, and the name
seems most appropriate for the high-level abstraction, so let's
rename the other versions to something more specific.
Also, uec_phy.c had a marvell_init function which I renamed to not
conflict with the one in marvell.c
Lastly, uec_phy.c was putting a space between the phy writing
function names, and the open paren, so I fixed that
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
This is merely a rearrangement. No changes to the code, except
to remove now-useless declarations.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
and MPC8572 board.
Add the missing contact information for future support.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
This patch fixes ea20 after 8ef583a035 where
the u-boot custom PHY_ macros were replaced with those of linux/mii.h MII_
definitions except in the RMII support for davinci_emac. Probably also due to
the merge path of changes in 2010.12.
Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca>
CC: Mike Frysinger <vapier@gentoo.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Use get_timer() the same way as drivers/net/ftgmac100.c
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Reviewed-by: Macpaul Lin <macpaul@gmail.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
Some CPU needs cache handling. So this patch add the config of
CONFIG_SH_ETHER_CACHE_WRITEBACK, and it calls wback function.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Added arch/arm/cpu/arm926ejs/davinci/et1011c.c for handling
ET1011C gigabit phy. which overrides get_link_speed function
from default implementation. This enables output of 125 MHz
reference clock on SYS_CLK pin.
Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Adds "DaVinci-EMAC" as the name of the device so that
it gets printed as "Using DaVinci-EMAC device"
during network access (dhcp, tftp) instead of empty name
in "Using" statement.This name also gets
reflected in 'ethact' env variable.
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Enabling the gigabit was overwriting the
previous configuration by setting up only GIGAFORCE and
GIG bits of MAC control register.
Modified to retain previous configuration while
gigabit enabling.
Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The eth_device.name field length is limited by NAMESIZE,
which is 16 defined in include/net.h. Unfortunately, two
of the names in lan91c96.c are beyond that.
Signed-off-by: YanJun Yang <yangyj.ee@gmail.com>
The include/miiphy.h header duplicates a lot of things from linux/mii.h.
So punt all the things that overlap to keep the API simple and to make
merging between U-Boot and Linux simpler.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The following commit:
commit 46e91674fb
Author: Peter Tyser <ptyser@xes-inc.com>
Date: Tue Nov 3 17:52:07 2009 -0600
tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode
Removed setting Auto-Neg by default, however this is believed to be
proper default configuration for initialization of the TBI interface.
Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the
XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require
Auto-Neg to be disabled to function properly.
This addresses a breakage on the P2020 DS & MPC8572 DS boards when used
with an SGMII riser card. We also remove setting
CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the
default setting is sufficient for them.
Additionally, we clean up the code a bit to remove an unnecessary second
define.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
This patch is a port of the work by Sudhakar Rajeshekhara in commit
ab3effbcad8851cc65dc5241a01c064d2030a3b2 of
git://arago-project.org/git/people/sandeep/u-boot-davinci.git.
The da850 UI board has on it an RMII PHY which can be used if the MDC line
to the MII PHY on the baseboard is disabled and the RMII PHY is enabled by
configuring the values of some GPIO pins on the IO expander of the UI board.
This patch implements disabling that line via GPIO2[6], configuring the UI
board's IO expander and setting only the pinmux settings that are needed for
RMII operation.
Tested on da850evm by adding a define for CONFIG_DRIVER_TI_EMAC_USE_RMII.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Get rid of compiler warning:
e1000.c: In function 'e1000_transmit':
e1000.c:5028: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
The patch is to support getting FEC MAC address from fuse bank.
Signed-off-by: Jason Liu <r64343@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils. As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".
This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.
The name of each former library archive is preserved except for
extensions which change from ".a" to ".o". This commit updates
references accordingly where needed, in particular in some linker
scripts.
This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols. Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.
Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
nic and hw structures are allocated via malloc i.e. return memory
is not zero initialized. Because of this few structure member like
"function pointers" are initialized with garbage values.
It may cause problem. for eg. during eth_initialize, dev->write_hwaddr
is used.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fixed typo.
Signed-off-by: Wolfgang Denk <wd@denx.de>
uli526x driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
tsi108_eth driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
pcnet driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
ns8382x driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
natsemi driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
This prevents access to the member of eth_device which is not initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
eepro100 driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
dc2114x driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
rtl8139 driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
rtl8169 does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
By now, the majority of architectures have working relocation
support, so the few remaining architectures have become exceptions.
To make this more obvious, we make working relocation now the default
case, and flag the remaining cases with CONFIG_NEEDS_MANUAL_RELOC.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Call fec_set_hwaddr in init routine to setup MAC address so when ethaddr is set
late via setenv the change will propagate to the hw.
Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Add smc_write_hwaddr() to set mac address.
Clear dev before use.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch proposes to migrate the davinci_emac driver to using the
eth_device->write_hwaddr function pointer as suggested by Ben Warren.
All the davinci boards had the behaviour, prior to this patch, of
sync'ing the environment variable enetaddr with the MAC address read
from non-volatile storage on boot -- when the two locations disagreed,
the environment variable value took precendence. This patch keeps the
same behaviour but lets eth_initialize take care of it.
This patch refactors davinci_emac setup in the boards so that the MAC
address is read from non-volatile storage into the environment variable
and then the environment variable value is use in eth_intialize. The
only exception is the direct call to davinci_eth_set_mac_addr made by
the da830evm board init which was changed into an assignment of the
enetaddr field.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Tested-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Emaclite was using old net api that's why
this patch move emaclite to NET_MULTI api.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some boards need their board-specific PHY quirks to be called
to PHY to work normally. As mpc5xxx_fec driver uses on demand
PHY initialization and can even reinit PHY during normal operation
we can't count on reset_phy() call from arch/<arch>/lib/board.c
(it is most likely called _before_ we init the PHY from the
driver) so we need to add call to reset_phy() directly in the
driver.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some return values pretended correct pass. This patch changes them according
to README.drivers.net. This patch changes e.g. command 'dhcp' to stop after
errorneous autonegotiation.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch increases timeout for autonegotiation from 1 second to 3 seconds.
Some boards (e.g. at91rm9200ek) did not negotiate within 1 second.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
V3: further refinements:
- use priv member instead of container method
- allow setting of MAC address by write_hwaddr method
- avoid shutting down link between commands
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch is required before the upcoming new enc28j60 driver
using SPI framework patch can be applied:
- Move legacy enc28j60.c to enc28j60_lpc2292.c.
- Change Makefile and the two affected boards' definition files.
Tested with ./MAKEALL ARM7 that both boards still compile.
Signed-off-by: Reinhard Meyer<info@emk-elektronik.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch replaces the unnecessary waiting in at91emac_read() and
at91emac_write() by checking the IDLE flag.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch also removes conditional nameing of at91_emac driver whether it's
connection to PHY is RMII or MII.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch starts a bit PPC4xx header cleanup. First patch mostly
touches PPC440 files. A later patch will touch the PPC405 files as well.
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.
Signed-off-by: Stefan Roese <sr@denx.de>
Commit 6e37b1a3a25004d3df5867de49fff6b3fc9c4f04 modifies several net calls
to take a (const char *) parameter instead of (char *), but in some cases
the modified functions call other functions taking (char *). The end result
is warnings about discarding the const qualifier.
This patch fixes these other function signatures.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The driver name does not need to be writable, so constify it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
since commit 1384f3bb8a ethernet names
with spaces drop a
Warning: eth device name has a space!
message. This patch fix it for:
- "FEC ETHERNET" devices found on
mpc512x, mpc5xxx, mpc8xx and mpc8220 boards.
renamed to "FEC".
- "SCC ETHERNET" devices found on
mpc8xx, mpc82xx based boards. Renamed to "SCC".
- "HDLC ETHERNET" devices found on mpc8xx boards
Renamed to "HDLC"
- "FCC ETHERNET" devices found on mpc8260 and mpc85xx based
boards. Renamed to "FCC"
Tested on the kup4k board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
After discussion on the ML it is suggested to drop unrequired
and not useful characters from the device name.
This patch changes the name for the fec_mxc driver from
"FEC_MXC" to "FEC".
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some commands (like 'mii') use this name to select devices, but they
break when those names contain spaces. So drop the space from
Ethernet driver names (cf. commit 1384f3bb).
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
Some commands (like 'mii') use this name to select devices, but they break
when those names contain spaces. So drop the space from the Blackfin EMAC
driver.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than bang MMRs directly, use the new portmux framework to handle
the details. While we're doing this, let boards declare the exact list
of pins they need in case there is one or two they don't actually have
hooked up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Add definitions and initialization in orion5x for mvgbe.
Add orion5x in mvgbe SoC includes.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Rename all references to kirkwood in mvgbe symbols
throughout the whole codebase.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Rename kirkwood_egiga.* to mvgbe.* and adjust makefile
and #include accordingly.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This configuration option allows SoCs without random
generation capability to fill in local MACs with a fixed
rather than random value
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* the following problems are met :
config was set to use the new driver as a default but
- RMII was not enabled for the new driver
- the new driver didn't compile with RMII enabled
- the new driver initialize a PHY at address O when the PHY of
this board is at 1 thus we get "AT91 EMAC RMII: No PHY present"
* to fix these problems, this patch :
- enable RMII for the new driver
- fix the wrong define used in the at91_emac.c
- allow the config file to set a default phy address (and use
0 as a default as in the actual at91_emac.c driver)
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The current dm9000x driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
Blackfin systems as the accesses can get out of order. So convert the
direct volatile dereferences to use the normal in/out macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The current OUTW function is always defined as a 16bit function, but this
doesn't work correctly when using the 32bit access mode. So define it as
a 32bit function when in 32bit mode so things work correctly on Blackfin
32bit LE systems.
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some places in the current code equate the Marvell 88E1111 PHY as the family
when in reality it's a subpart of the Alaska family. So once we generalize
that, add support for the 88E1118 PHY.
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The Ethernet initialization functions are supposed to return the number of
devices initialized, so fix tsec_eth_init() so that they returns the number of
TSECs initialized, instead of just zero. This is safe because the return value
is currently ignored by all callers, but now they don't have to ignore it.
In general, if an function initializes only one device, then it should return
a negative number if there's an error. If it initializes more than one device,
then it should never return a negative number.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Device names should not contain non-printable characters like newlines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
No compiled code change here, just drop the local PHY defines in favor of
the common standard ones.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Rather than hardcode specific phy addresses, search the possible phy
address space to find the first available phy. Also respect the normal
CONFIG_PHY_ADDR option for board porters to pick a specific address.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
DRAM window mapping uses kirkwood-provided functions instead
of global gd as do other drivers--fix this.
Also, fix a typo in a comment
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Designware network driver support added.
This is a Synopsys ethernet controller
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Insert isb() sequence points to ensure DMA descriptors
are filled in and set up before actual DMA occurs.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
By defining CONFIG_M88E1111_DISABLE_FIBER boards can configure the
M88E1111 PYH to disable fiber. This is needed for an upcoming PPC460GT
based board, which has fiber/copper auto-selection enabled by default.
This doesn't seem to work. So we disable fiber in the PHY register.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The DM9000 in/out helper functions were casting the register address when
it was accessing things directly (pre commit a45dde2293). But
when it was changed to using the in/out helpers, those casts were dropped
because those functions don't take pointers. Even more recently, those
functions were then changed to use the read/write helpers, but the casts
were not re-added. This is necessary because the read/write helpers do
take pointers. Otherwise we get a lot of warnings like:
dm9000x.c: In function 'dm9000_inblk_8bit':
dm9000x.c:172: warning: passing argument 1 of 'readb'
makes pointer from integer without a cast
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII.
Current TBI PHY settings for SGMII mode cause link problems on
this platform, link never comes up.
Fix this by making TBI PHY settings configurable and add a working
configuration for P2020RDB.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Added a new function kwgbe_write_hwaddr for programming egiga
controller's hardware address.
This function will be called for each egiga port being used
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This driver supports the Altera triple speeds 10/100/1000 ethernet
mac.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch ports the opencore 10/100 ethernet mac driver ethoc.c
from linux kernel to u-boot.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
SMSC911x chips have alignment function to allow frame payload data
(which comes after 14-bytes ethernet header) to be aligned at some
boundary when reading it from fifo (usually - 4 bytes boundary).
This is done by inserting fake zeros bytes BEFORE actual frame data when
reading from SMSC's fifo.
This function controlled by RX_CFG register. There are bits that
represents amount of fake bytes to be inserted.
Linux uses alignment of 4 bytes. Ethernet frame header is 14 bytes long,
so we need to add 2 fake bytes to get payload data aligned at 4-bytes
boundary.
Linux driver does this by adding IP_ALIGNMENT constant (defined at
skb.h) when calculating fifo data length. All network subsystem of Linux
uses this constant too when calculating different offsets.
But u-boot does not use any packet data alignment, so we don't need to
add anything when calculating fifo data length.
Moreover, driver zeros the RX_CFG register just one line up, so chip
does not insert any fake data at the beginig. So calculated data length
is always bigger by 1 word.
It seems that at almost every packet read we get an underflow condition
at fifo and possible corruption of data. Especially at continuous
transfers, such as tftp.
Just after removing this magic addition, I've got tftp transfer speed as
it aught to be at 100Mbps. It was really slow before.
It seems that fifo underflow occurs only when using byte packing on
32-bit blackfin bus (may be because of very small delay between reads).
Signed-off-by: Valentin Yakovenkov <yakovenkov@niistt.ru>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Cosmetic changes: Few comments updated
Functionality: Rx packet frame size is programming should
be done when port is in disabled state. this is corrected
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Fix MX27 FEC logic to check validity of the MAC address in fuse.
Only null (empty fuse) or invalid MAC address was retrieved from mx27 fuses before this change.
Signed-off-by: Eric Jarrige <jorasse@armadeus.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
