Commit Graph

1 Commits

Author SHA1 Message Date
Bin Meng
60262cd041 timer: Add generic driver for RISC-V privileged architecture defined timer
RISC-V privileged architecture v1.10 defines a real-time counter,
exposed as a memory-mapped machine-mode register - mtime. mtime must
run at constant frequency, and the platform must provide a mechanism
for determining the timebase of mtime. The mtime register has a
64-bit precision on all RV32, RV64, and RV128 systems.

Different platform may have different implementation of the mtime
block hence an API riscv_get_time() is required by this driver for
platform codes to hide such implementation details. For example,
on some platforms mtime is provided by the CLINT module, while on
some other platforms a simple 'rdtime' can be used to get the timer
counter.

With this timer driver the U-Boot timer functionalities like delay
works correctly now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:26 +08:00