Commit Graph

7492 Commits

Author SHA1 Message Date
Stephen Warren
3f83c87ee5 fs: fix number base behaviour change in fatload/ext*load
Commit 045fa1e "fs: add filesystem switch libary, implement ls and
fsload commands" unified the implementation of fatload and ext*load
with the new command fsload. However, this altered the interpretation
of command-line numbers from always being base-16, to requiring a "0x"
prefix for base-16 numbers. Enhance do_fsload() to allow commands to
specify which base to use.

Use base 0, thus requiring a "0x" prefix for the new fsload command.
This feels much cleaner than assuming base 16.

Use base 16 for the pre-existing fatload and ext*load to prevent a
change in behaviour.

Use base 16 exclusively for the loadaddr environment variable, since
that variable is interpreted in multiple places, so we don't want the
behaviour to change.

Update command help text to make it clear where numbers are assumed to
be hex, and where an explicit "0x" prefix is required.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2012-11-04 11:00:31 -07:00
Simon Glass
51bdad67cb x86: config: Enable AHCI support for coreboot
Enable AHCI driver for Intel SATA devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:43 -07:00
Marc Jones
766b16fe18 ahci: Perform SATA flush after disk write.
Writes in u-boot are so rare, and the logic to know when is
the last write and do a flush only there is sufficiently
difficult. Just do a flush after every write. This incurs,
usually, one extra flush when the rare writes do happen.

Signed-off-by: Marc Jones <marc.jones@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:43 -07:00
Gabe Black
19d1d41e84 ahci: Make the AHCI code find the capacity of disks > 128 GB properly
In the structure returned by the ATA identify device command, there are two
fields which describe the device capacity. One is a 32 bit data type which
reports the number of sectors as a 28 bit LBA, and the other is a 64 bit data
type which is for a 48 bit LBA. If the device doesn't support 48 bit LBAs,
the small value is the only value with the correct size. If it supports more,
if the number of sectors is small enough to fit into 28 bits, both fields
reflect the correct value. If it's too large, the smaller field has 28 bits of
1s, 0xfffffff, and the other field has the correct value.

The AHCI driver is implemented by attaching to the generic SCSI code and
translating on the fly between SCSI binary data structures and AHCI data
structures. It responds to requests to execute specific SCSI commands by
executing the equivalent AHCI commands and then crafting a response which
matches what a SCSI disk would send.

The AHCI driver now considers both fields and chooses the correct one when
implementing both the SCSI READ CAPACITY (10) and READ CAPACITY (16) commands.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Stefan Reinauer
4e422bce8a ahci: cosmetics and cleanup
- print the correct speed
- print all the AHCI capability flags
(information taken from Linux kernel driver)
- clean up some comments

For example, this might show the following string:
AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x3 impl SATA mode

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>

Commit-Ready: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
2012-11-02 15:20:41 -07:00
Stefan Reinauer
447c031ba4 scsi: Add function and env var to report number of scsi drives
Add a new function to find out the number of available SCSI disks. Also
set the 'scsidevs' environment variable after each scan.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:40 -07:00
Simon Glass
c4fa493d3a Support setenv_ulong() and setenv_addr() for powerpc
This includes were outside an #ifdef CONFIG_PPC, but there is not reason
to exclude powerpc from using them.

Move the declaration outside the #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:40 -07:00
Tom Rini
044fc14bcb am335x_evm: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support
We add CONFIG_ENV_VARS_UBOOT_CONFIG,
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and CONFIG_BOARD_LATE_INIT to set
the variables and then fdtfile and findfdt to make us of this.  It is
now possible to do 'run findfdt' to have fdtfile be set to the value of
the dtb file to load for the board we are running on.

Signed-off-by: Tom Rini <trini@ti.com>
2012-11-02 15:14:28 -07:00
Stephen Warren
418b7f3aff Add board_name to CONFIG_ENV_VARS_UBOOT_CONFIG
CONFIG_ENV_VARS_UBOOT_CONFIG creates environment variables indicating
which configuration U-Boot was built for. Some U-Boot binaries run on
multiple boards, and hence this information may not uniquley describe
the HW that U-Boot is actually running on. Another patch introduces
environment variable board_name to represent that. In order to avoid
scripts having to check $board_name, use it if set, and then fall back
to using $board, make CONFIG_ENV_VARS_UBOOT_CONFIG also set a default
value for board_name, so that variable is always available.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2012-11-02 15:13:30 -07:00
Stephen Warren
045fa1e114 fs: add filesystem switch libary, implement ls and fsload commands
Implement "ls" and "fsload" commands that act like {fat,ext2}{ls,load},
and transparently handle either file-system. This scheme could easily be
extended to other filesystem types; I only didn't do it for zfs because
I don't have any filesystems of that type to test with.

Replace the implementation of {fat,ext[24]}{ls,load} with this new code
too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-29 14:21:20 -07:00
Stephen Warren
03e2ecf6b8 fs: separate CONFIG_FS_{FAT, EXT4} from CONFIG_CMD_{FAT, EXT*}
This makes the FAT and ext4 filesystem implementations build if
CONFIG_FS_{FAT,EXT4} are defined, rather than basing the build on
whether CONFIG_CMD_{FAT,EXT*} are defined. This will allow the
filesystems to be built separately from the filesystem-specific commands
that use them. This paves the way for the creation of filesystem-generic
commands that used the filesystems, without requiring the filesystem-
specific commands.

Minor documentation changes are made for this change.

The new config options are automatically selected by the old config
options to retain backwards-compatibility.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2012-10-29 14:21:19 -07:00
Tom Rini
dac064f58e Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2012-10-29 08:02:11 -07:00
Jason Jin
b765fce95c ColdFire: Remove save env in NAND support for M54418TWR board.
This patch remove the env saving in NAND as so far the
NAND driver is not ported to the M54418TWR platform.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-29 22:08:32 +08:00
Wolfgang Denk
1b0757eced PPC: remove dead boards (AMX860, c2mon, ETX094, IAD210, LANTEC, SCM)
These boards have long reached EOL, and there has been no indication
of any active users of such hardware for years.  Get rid of the dead
weight.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Grandegger <wg@denx.de>
2012-10-28 20:17:25 +01:00
Tom Rini
5bb3505fa8 Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-10-26 15:44:31 -07:00
Albert ARIBAUD
53c41548a9 arm: arm925t: remove SX1 board
SX1 does not build properly by itself, is not built
as part of MAKEALL arm or MAKEALL -a arm, and is only
present in Makefile, not boards.cfg. As it also has no
entry in MAINTAINERS, it is orphan and non-functional.
Remove it.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2012-10-26 23:22:01 +02:00
Marek Vasut
f2e0801565 stdio: Remove the CLPS7111 serial driver
This driver is no longer used, remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-26 22:38:40 +02:00
Marek Vasut
6f62f42071 arm: Remove support for lpc2292
This stuff has been rotting in the tree for a year now. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-26 22:35:20 +02:00
Albert ARIBAUD
4c25761337 Merge remote-tracking branch 'u-boot-atmel/master' 2012-10-26 07:54:25 +02:00
Albert ARIBAUD
c68436fa42 Merge remote-tracking branch 'u-boot-ti/master' 2012-10-26 07:00:28 +02:00
Stephen Warren
5e8f98319d FAT: implement fat_set_blk_dev(), convert cmd_fat.c
This makes the FAT filesystem API more consistent with other block-based
filesystems. If in the future standard multi-filesystem commands such as
"ls" or "load" are implemented, having FAT work the same way as other
filesystems will be necessary.

Convert cmd_fat.c to the new API, so the code looks more like other files
implementing the same commands for other filesystems.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2012-10-25 12:07:47 -07:00
Tom Rini
69916bcf71 am33xx: Add SPI SPL as an option
Add the required config.mk logic for this SoC as well as the BOOT_DEVICE
define.  Finally, enable the options on the am335x_evm.

Signed-off-by: Tom Rini <trini@ti.com>
2012-10-25 11:30:50 -07:00
Stefano Babic
8f1fae26a7 OMAP3: add video support to the mcx board
Add video support to the board with the display
focaltech etm070003dh6.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-25 11:30:50 -07:00
Stefano Babic
8c735b9909 OMAP3: mcx: updated to new hardware revision
Some GPIOs differ in the new revision board.
Previous revision are considered obsolete and
they will not anymore supported.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-25 11:30:49 -07:00
Stefano Babic
e47c9e8608 OMAP3: updated pinmux and environment for new revision of mcx board
The mcx board was slightly modified and the pinmux must be updated.
There is no need to support the old board, that becomes obsolete.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-25 11:30:49 -07:00
Alison Wang
186fc4db26 ColdFire: Add Freescale MCF54418TWR ColdFire development board support
Add Freescale MCF54418TWR ColdFire development board support.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-24 22:27:46 +08:00
Gerlando Falauto
c4d22de817 km83xx: add kmvect1 board
Add support for the new kmvect1 board powered by the mpc8309 processor.
As this board is very similar to the existing suvd3, instead of adding a
new config header file, just add a new config option to suvd3.h

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:26 -05:00
Gerlando Falauto
6967840b83 km83xx: add common support for km8309 boards
Add support for Keymile boards based on mpc8309
(it would be only kmvect1 for now)

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
[#elseif -> #if to allow kmcoge5ne and kmeter1 to build successfully]
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:26 -05:00
Gerlando Falauto
a88731a6c2 mpc83xx: add support for mpc8309
This processor, though very similar to other members of the
PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides
yet another feature set than any supported sibling.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:26 -05:00
Gerlando Falauto
8afad91f15 cleanup: introduce CONFIG_MPC830x
Introduce a new configuration token CONFIG_MPC830x to be shared among
mpc8308 and mpc8309. Define it for existing 8308 boards, and refactor
existing common code so to make future introduction of 8309 simpler.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:25 -05:00
Gerlando Falauto
91eb52ade2 cosmetic: suvd3: align #defines
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-23 15:23:25 -05:00
Igor Grinberg
3530a35d74 cm-t35: clean unused defines from config
Neither cm-t35, nor cm-t3730 is using OneNAND or flash.
Remove the related defines from config file.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2012-10-23 08:33:17 -07:00
Andrew Bradford
669681104d configs: Fix usage of mmc rescan
Fix usage of 'mmc rescan' by many configs.  Proper use is
'mmc dev ${mmcdev}; mmc rescan' to set the mmc device and then rescan
the device.  'mmc rescan' itself does not take any arguments.

Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
2012-10-23 08:33:17 -07:00
Tom Rini
71724830b4 Merge branch 'master' of git://git.denx.de/u-boot-fdt 2012-10-22 19:54:48 -07:00
Gerald Van Baren
cae4a8a2a8 Merge branch 'next' 2012-10-22 20:42:09 -04:00
Tom Rini
c7656bab41 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2012-10-22 16:54:38 -07:00
Tom Rini
bdc3ff6e4f Merge branch 'master' of git://www.denx.de/git/u-boot-mmc 2012-10-22 16:53:19 -07:00
Mingkai Hu
d8812bdbba phylib: Enable SMSC LAN87xx PHY support
LAN8720 PHY is used on Freescale C2X0QDS board.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
Haiying Wang
990e1a8ce1 poweprc/85xx: add QMan frequency info and fdt fixup.
Starting from QMan3.0, the QMan clock cycle needs be exposed so that the kernel
driver can use it to calculate the shaper prescaler and rate.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
York Sun
ee52b188ca powerpc/t4qds: Add T4QDS board
The T4240QDS is a high-performance computing evaluation, development and
test platform supporting the T4240 QorIQ Power Architecture™ processor.

SERDES Connections
  32 lanes grouped into four 8-lane banks
  Two “front side” banks dedicated to Ethernet
  Two “back side” banks dedicated to other protocols
DDR Controllers
  Three independant 64-bit DDR3 controllers
  Supports rates up to 2133 MHz data-rate
  Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller
QIXIS System Logic FPGA

Each DDR controller has two DIMM slots. The first slot of each controller
has up to 4 chip selects to support single-, dual- and quad-rank DIMMs.
The second slot has only 2 chip selects to support single- and dual-rank
DIMMs. At any given time, up to total 4 chip selects can be used.

Detail information can be found in doc/README.t4qds

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
Roy Zang
111fd19e3b fm/mEMAC: add mEMAC frame work
The multirate ethernet media access controller (mEMAC) interfaces to
10Gbps and below Ethernet/IEEE 802.3 networks via either RGMII/RMII
interfaces or XAUI/XFI/SGMII/QSGMII using the high-speed SerDes interface.

Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:25 -05:00
York Sun
9e75875849 powerpc/mpc85xx: Add T4240 SoC
Add support for Freescale T4240 SoC. Feature of T4240 are
(incomplete list):

12 dual-threaded e6500 cores built on Power Architecture® technology
  Arranged as clusters of four cores sharing a 2 MB L2 cache.
  Up to 1.8 GHz at 1.0 V with 64-bit ISA support (Power Architecture
    v2.06-compliant)
  Three levels of instruction: user, supervisor, and hypervisor
1.5 MB CoreNet Platform Cache (CPC)
Hierarchical interconnect fabric
  CoreNet fabric supporting coherent and non-coherent transactions with
    prioritization and bandwidth allocation amongst CoreNet end-points
  1.6 Tbps coherent read bandwidth
  Queue Manager (QMan) fabric supporting packet-level queue management and
    quality of service scheduling
Three 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
    support
  Memory prefetch engine (PMan)
Data Path Acceleration Architecture (DPAA) incorporating acceleration for
    the following functions:
  Packet parsing, classification, and distribution (Frame Manager 1.1)
  Queue management for scheduling, packet sequencing, and congestion
    management (Queue Manager 1.1)
  Hardware buffer management for buffer allocation and de-allocation
    (BMan 1.1)
  Cryptography acceleration (SEC 5.0) at up to 40 Gbps
  RegEx Pattern Matching Acceleration (PME 2.1) at up to 10 Gbps
  Decompression/Compression Acceleration (DCE 1.0) at up to 20 Gbps
  DPAA chip-to-chip interconnect via RapidIO Message Manager (RMAN 1.0)
32 SerDes lanes at up to 10.3125 GHz
Ethernet interfaces
  Up to four 10 Gbps Ethernet MACs
  Up to sixteen 1 Gbps Ethernet MACs
  Maximum configuration of 4 x 10 GE + 8 x 1 GE
High-speed peripheral interfaces
  Four PCI Express 2.0/3.0 controllers
  Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz with
    Type 11 messaging and Type 9 data streaming support
  Interlaken look-aside interface for serial TCAM connection
Additional peripheral interfaces
  Two serial ATA (SATA 2.0) controllers
  Two high-speed USB 2.0 controllers with integrated PHY
  Enhanced secure digital host controller (SD/MMC/eMMC)
  Enhanced serial peripheral interface (eSPI)
  Four I2C controllers
  Four 2-pin or two 4-pin UARTs
  Integrated Flash controller supporting NAND and NOR flash
Two eight-channel DMA engines
Support for hardware virtualization and partitioning enforcement
QorIQ Platform's Trust Architecture 1.1

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:23 -05:00
Timur Tabi
11860d888c powerpc/85xx: move SRIO configuration out of corenet_ds.h
The P5040 does not have SRIO, so don't put the SRIO definitions in
corenet_ds.h.  They belong in the board-specific header files.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:13 -05:00
Simon Glass
af9f881a51 config: Enable CBFS, ext4 for coreboot
Enable Coreboot and EXT4 Filesystems on the coreboot board.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-22 08:29:55 -07:00
Gabe Black
84cd93272e fs: Add a Coreboot Filesystem (CBFS) driver and commands
This change adds CBFS support and some commands to use it to u-boot. These
commands are:

cbfsinit - Initialize CBFS support and pull all metadata into RAM. The end of
the ROM is an optional parameter which defaults to the standard 0xffffffff and
can be used to support multiple CBFSes in a system. The last one set up with
cbfsinit is the one that will be used.

cbfsinfo - Print information from the CBFS header.

cbfsls - Print out the size, type, and name of all the files in the current
CBFS. Recognized types are translated into symbolic names.

cbfsload - Load a file from CBFS into memory. Like the similar command for fat
filesystems, you can optionally provide a maximum size.

Support for CBFS is compiled in when the CONFIG_CMD_CBFS option is specified.

The CBFS driver can also be used programmatically from within u-boot.

If u-boot needs something out of CBFS very early before the heap is
configured, it won't be able to use the normal CBFS support which caches some
information in memory it allocates from the heap. The
cbfs_file_find_uncached function searches a CBFS instance without touching
the heap.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-22 08:29:55 -07:00
Gabe Black
24a3fdd64d ide: Add printf format string for CONFIG_SYS_64BIT_LBA option
The size of an LBA type changes depending on this option. We need to
use a different printf() string in each case, so create a define for
this.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-10-22 08:29:55 -07:00
Marek Vasut
8b493a5236 common: Discard the __u_boot_cmd section
The command declaration now uses the new LG-array method to generate
list of commands. Thus the __u_boot_cmd section is now superseded and
redundant and therefore can be removed. Also, remove externed symbols
associated with this section from include/command.h .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:42 -07:00
Marek Vasut
6c7c946cad common: Convert the U-Boot commands to LG-arrays
This patch converts the old method of creating a list of command
onto the new LG-arrays code. The old u_boot_cmd section is converted
to new u_boot_list_cmd subsection and LG-array macros used as needed.

Minor adjustments had to be made to the common code to work with the
LG-array macros, mostly the fixup_cmdtable() calls are now passed the
ll_entry_start and ll_entry_count instead of linker-generated symbols.

The command.c had to be adjusted as well so it would use the newly
introduced LG-array API instead of directly using linker-generated
symbols.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:42 -07:00
Marek Vasut
42ebaae3a3 common: Implement support for linker-generated arrays
This patch adds support for linker-generated array. These arrays
are a generalization of the U-Boot command declaration approach.

Basically, the idea is to generate an array, where elements of the
array are statically initialized at compile time and each element
is declared separatelly at different place. Such array is assembled
together into continuous piece of memory by linker and a pointer to
it's first entry can then be retrieved via accessor.

The actual implementation relies on placing any variable that is to
represent an element of LG-array into particular subsection of the
.u_boot_list linker section . The subsection is determined by user
options. Once compiled, it is possible to dump all symbols placed
in .u_boot_list section and the subsections in which they should be
and generate appropriate bounds for each requested subsection of the
.u_boot_list section. Each such subsection thus contains __start and
__end entries at the begining and end respecitively.

This allows for simple run-time traversing of the array, since the
symbols are properly defined.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:29 -07:00
Jaehoon Chung
757bff49ba mmc: dw-mmc: support DesignWare MMC Controller
Support the DesginWare MMC Controller.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:56:25 -05:00