Commit Graph

47167 Commits

Author SHA1 Message Date
Jagan Teki
409b16d3e0 i.MX6: engicam: Move set_fdt_file to common
setenv_fdt_file to common code and set dtb based on
CONFIG_DEFAULT_DEVICE_TREE and cpu_type.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27 10:36:40 +01:00
Fabio Estevam
f086812acd mx6sxsabresd: Use PARTUUID to specify the rootfs location
mx6sxsabresd can run different kernel versions, such as NXP 4.1 or mainline.

Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the SD
card changes depending on the kernel version.

In order to avoid such issue, use the UUID method to specify the
rootfs location.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2017-11-27 10:35:19 +01:00
Fabio Estevam
e2162d709f imx: Remove boolean parameter from wdog powerdown function
imx_set_wdog_powerdown() is always used to disable the power down
enable bit, so remove the boolean parameter of the function.

It is also a bit strange to write a boolean value into registers,
so this new version makes explicit that we are writing 0.

While at it, rename it to imx_wdog_disable_powerdown().

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-11-27 10:34:49 +01:00
Fabio Estevam
b42287f4c9 imx: Also clear powerdown enable bit for WDOG3 on i.MX6ULL
Clear powerdown enable bit for WDOG3 on i.MX6ULL to avoid unwanted
kernel reboots.

Suggested-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-11-27 10:34:40 +01:00
Fabio Estevam
23ecca2cd8 mx6ull: Fix WDOG3 base address
i.MX6ULL has the same WDOG3 base address as i.MX6UL, so take this
into account in the base address definition.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-11-27 10:34:31 +01:00
Tom Rini
0931b6f20e Merge git://git.denx.de/u-boot-rockchip 2017-11-26 18:10:21 -05:00
Philipp Tomsich
e5ee24dda2 rockchip: defconfig: puma-rk3399: bypass ADC-based boot_mode check
The boot (and fallback/emergency boot) concept for the RK3399-Q7
differs from Rockchip's reference platforms.

On the RK3399-Q7, some of this functionality is present in the
bootloader itself (and configurable); some is backed in hardware by
the Qseven BIOS_DISABLE signal to invoke the final stages of fallbacks
(i.e. either an external boot bypassing on-module memories or falling
back to the BROM for USB recovery).

In summary: the ADC-based boot_mode check does not apply for the
RK3399-Q7 and we therefore disable it (in this commit) by setting
CONFIG_BOOT_MODE_REG to 0.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26 14:59:38 +01:00
Philipp Tomsich
f07d76c00d rockchip: fix turning off boot-mode via Kconfig
The ROCKCHIP_BOOT_MODE_REG option defaults to a hex value, so 0 will
show as 0x0 if a default is provided and changed via Kconfig.
However, it still will show as 0, if no default is given.

Consequently, the "is set to something other than 0" test in a
Makefile is cumbersome.  Instead this check can easily be performed in
the C-code.

This removes the ifeq-check from mach-rockchip/Makefile, adds a
matching #if-check to boot_mode.c and fixes resulting link issues (if
boot_mode.o was not included due to the Makefile check) by defining a
stub function (in case the functionality is not built in) for
setup_boot_mode in boot_mode.c.

Fixes: e306779 (rockchip: make boot_mode related codes reused across all platforms)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26 14:57:11 +01:00
Tien Fong Chee
eb57c0be14 fdt: Add compatible strings for Arria 10
Add compatible strings for Intel Arria 10 SoCFPGA device.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2017-11-26 02:34:10 +01:00
Tien Fong Chee
bd08ce8f5e arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes
Existing FPGA program write is always assume RBF data >= 32 bytes, so
any rbf data less than 32 bytes writing to FPGA would be failed.
This patch enhances the FPGA program write to support rbf data with
size >= 4 bytes.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2017-11-26 02:34:10 +01:00
Tien Fong Chee
772f8765d7 ARM: socfpga: add bindings doc for arria10 fpga manager
This DT binding doc is porting from Linux DT binding doc.
commit 1adcbea4201a6852362aa5ece573f1f169b28113

Add a device tree bindings document for the SoCFPGA Arria10
FPGA Manager driver.

Signed-off-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-By: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2017-11-26 02:34:10 +01:00
Bin Meng
c0c5f910ad MAINTAINERS: Update maintainer for USB xHCI
As discussed with Marek, this adds myself as the maintainer to
offload the USB xHCI part.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-11-26 02:22:36 +01:00
Vincent Prince
8171dac00d Trigger watchdog before calling usb_gadget_handle_interrupts
This prevents board resets when calling sdp command on boards which have a watchdog.

Signed-off-by: Vincent Prince <vincent.prince.fr@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
2017-11-26 02:22:36 +01:00
Marek Vasut
a8c402f45c usb: gadget: storage: Increase FSG_BUFLEN
Increase the buffer length to be just above maximum permissible value
of 128 kiB . This increases the performance of the UMS and alike by a
factor of 2 - 2.5 as the buffers are less fragmented.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
2017-11-26 02:22:36 +01:00
Philipp Tomsich
883946e8e7 usb: hub: identify the hub-device to usb_hub_reset_devices
When usb_hub_reset_devices is called, it should be passed both an
indicator which hub it should operate on and what port number (local
to that hub) should be reset.

Previously, the usb_hub.c code did not include such context and
always started resets from port number 1, performing multiple
reset-requests for the same devices:

       /*
        * Reset any devices that may be in a bad state when applying
        * the power.  This is a __weak function.  Resetting of the devices
        * should occur in the board file of the device.
        */
       for (i = 0; i < dev->maxchild; i++)
              usb_hub_reset_devices(i + 1);

This adds an additional 'hub' parameter to usb_hub_reset_devices
that provides the context to fully qualify the port-number in.

Existing implementations are changed to accept and ignore the new
parameter.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
2017-11-26 02:22:36 +01:00
Dirk Behme
b3cbcd902d usb: ehci: do not invalidate a NULL buffer
Its a valid use case to call ehci_submit_async() with a NULL buffer
with length 0. E.g. from usb_set_configuration().

As invalidate_dcache_range() isn't able to judge if the address
NULL is valid or not (depending on the SoC hardware configuration it
might be valid) do the check in ehci_submit_async() as here we know
that we don't have to invalidate such a buffer.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
2017-11-26 02:22:36 +01:00
Heinrich Schuchardt
45157d2764 dm: usb: ehci: avoid possible NULL dereference
Currently we check in ehci_shutdown() if ctrl is NULL after
dereferencing it.

Before this we have already dereferenced ctrl, ctrl->hccr,
and ctrl->hcor in ehci_get_portsc_register(), ehci_submit_root(),
and hci_common_init().

A better approach is to already check ctrl, ctrl->hccr, and ctrl->hcor
during the initialization in ehci_register() and usb_lowlevel_init()
and signal an error here via the return code.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-26 02:22:36 +01:00
Marek Vasut
e1cc60c0d6 usb: xhci: Add Renesas R-Car xHCI driver
Add firmware V3, firmware loader and XHCI glue for the Renesas R-Car
Gen3 SoCs XHCI controller. Thus far only the R-Car Gen3 R8A7795 ES2.0+
and R8A7796 are supported.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2017-11-26 02:22:36 +01:00
Alexey Brodkin
9829ce2ff2 usb: ehci: Fix accessors for big-endian platforms and descriptors
Commit 9000eddbae ("drivers/usb/ehci: Use platform-specific accessors")
broke USB 2.0 on big-endian platforms because for them writel/readl()
does automatic conversion of BE data to LE.

Proper implementation requires to use "raw" variant of these accessors
which read/write data without messing with endianess.

While at it replace cpu_to_be32() to be32_to_cpu() in readl() to
keep sane semantics.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
Reported-by: Vladimir Boroda <boroda@yahoo.com>
2017-11-26 02:22:36 +01:00
Suneel Garapati
abd7cedb19 cmd: usb: ignore blk, emulation devices in usb tree/info display
Usb tree/info commands iterate over all usb uclass devices recursively.
Blk uclass devices based on struct blk_desc are created for mass storage
device, treating them as usb uclass devices based on struct usb_device
and referencing usb config interface descriptors cause crash.
To fix, ignore blk and usb_emul uclass devices in usb_show_info
and usb_tree_graph. Also avoid addition of preamble for blk uclass
child devices, otherwise tree dump gets messed up.

Signed-off-by: Suneel Garapati <suneelglinux@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 02:22:36 +01:00
Philipp Tomsich
8c2bb589e2 rockchip: pinctrl: rk3399: add support for I2C8
The RK3399 has a total of 9 I2C controllers.  To support these, the
enum in periph.h is extended and the mapping from the IRQ numbers to
the peripheral-ids is extended to ensure that pinctrl requests are
passed through to the function configuring the I2C pins.

For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using
communication with the FAN53555 connected on I2C8.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-11-26 00:39:08 +01:00
Philipp Tomsich
a8ee98df18 rockchip: clk: rk3399: change extract_bits to bitfield_extract
The RK3399 clk driver still has a left-over use of extract_bits, which
can be replaced by using bitfield_extract from include/bitfield.h.
This rewrites the invocation to use the shared function.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26 00:39:08 +01:00
Philipp Tomsich
337bbb6297 spl: fit: add SPL_FIT_IMAGE_TINY config to reduce code-size
A minor code-size increase from the changes for tracking the os-type
of FIT images and from infrastructure for recording the loadables into
the the loaded FDT, broke the builds for sun50i and some OMAP2+ devices.

This change adds a new config option (enabled by default for
MACH_SUN50I, MACH_SUN50I_H5 and ARCH_OMAP2PLUS) that does skips these
processing steps (bringing code size down to below the limit
again). The os-type is not evaluated, but assumed to be IH_OS_UBOOT
(i.e. taking the code-paths intended for backward-compatibility).

Note that enabling this config option precludes any useful downstream
processing, such as utilising a special calling convention for ATF or
OPTEE, based on the os-type of the loadables.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26 00:39:08 +01:00
Philipp Tomsich
ec4bf3d6bd rockchip: defconfig: lion-rk3368: sync up with SPL changes for ATF
This tracks the SPL changes for ATF for the RK3368-uQ7:
 * renames ATF_SUPPORT to ATF
 * drops CONFIG_SPL_ATF_TEXT_BASE (now dynamically retrieved from
   the .itb file)

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:08 +01:00
Philipp Tomsich
cba7b949b4 rockchip: defconfig: puma-rk3399: sync up with SPL changes for ATF
This defconfig update makes use of the new features:
 * CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is now set to 0, as there is no
   overlap between the M0 firmware and the ATF (we load this to DRAM
   and relocate it to its final location within the ATF)
 * tracks the ATF_SUPPORT -> ATF renaming

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:08 +01:00
Philipp Tomsich
b07856fe43 rockchip: board: lion-rk3368: update .its file
For the RK3368-uQ7, we can now update the .its file to mark the
Trusted Firmware as out 'firmware' bootable and annotate both ATF and
U-Boot with an OS-type.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:08 +01:00
Philipp Tomsich
fc76fa3cfa rockchip: board: puma-rk3399: update .its file to use new features
This commit updates the .its file for the RK3399-Q7 to use the new
features and demonstrates how to use those:
 * it marks the ATF as the 'firmware'
 * it tracks the OS-type for U-Boot and ATF
 * it loads the PMU (M0) firmware to DRAM and records the location
   to /fit-images (where our ATF reads it from)

With the handoff of the next-stage FDT to ATF in place, we can now use
this to pass information about the load addresses and names of each
loadables to ATF: now we can load the M0 firmware into DRAM and avoid
overwriting parts of the SPL stage.  This is achieved by changing our
.its-file to use an available area of DRAM as the load-address.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:08 +01:00
Philipp Tomsich
cd5eae5590 rockchip: defconfig: firefly-rk3399: sync up with SPL changes for ATF
This tracks the SPL changes for ATF for the Firefly:
 * renames ATF_SUPPORT to ATF
 * drops CONFIG_SPL_ATF_TEXT_BASE

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
506c428ec8 spl: atf: drop the SPL_ATF_TEXT_BASE configuration item
The SPL_ATF_TEXT_BASE configuration item has become obsolete.
Remove it from Kconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
aa122f6b3d spl: rename config item SPL_ATF_SUPPORT to SPL_ATF
Having CONFIG_SPL_ATF seems more natural.
Rename it, while it it is easy and there's few boards that use it
(only RK3399 and RK3368 boards).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
1d3790905d spl: atf: introduce spl_invoke_atf and make bl31_entry private
This adds a new interface spl_invoke_atf() that takes a spl_image_info
argument and then derives the necessary parameters for the ATF entry.
Based on the additional information recorded (into /fit-images) from
the FIT loadables, we can now easily locate the next boot stage.

We now pass a pointer to a FDT as the platform-specific parameter
pointer to ATF (so we don't run into the future headache of every
board/platform defining their own proprietary tag-structure), as
FDT access is already available in ATF.

With the necessary infrastructure in place, we can now update the
support for the ARM Trusted Firmware to dispatch into the
spl_invoke_atf function only if a IH_OS_ARM_TRUSTED_FIRMWARE image is
loaded.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
a616c783f2 spl: fit: implement recording of loadables into /fit-images
If a FDT was loaded (e.g. to append it to U-Boot image), we store it's
address and record information for all loadables into this FDT.  This
allows us to easily keep track of images for multiple privilege levels
(e.g. with ATF) or of firmware images preloaded into temporary
locations (e.g. PMU firmware that may overlap the SPL stage).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
9f45aeb937 spl: fit: implement fdt_record_loadable
During the loading of more complex FIT images (e.g. when the invoked
next stage needs to find additional firmware for a power-management
core... or if there are multiple images for different privilege levels
started in parallel), it is helpful to create a record of what images
are loaded where: if a FDT is loaded for one of the next stages, it
can be used to convey the status and location of loadables.

This adds a fdt_record_loadable() function that can be invoked to
record the status of each loadable below the /fit-images path.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
d879616e9e spl: fit: simplify logic for FDT loading for non-OS boots
To better support bootin through an ATF or OPTEE, we need to
streamline some of the logic for when the FDT is appended to an image:
depending on the image type, we'd like to append the FDT not at all
(the case for the OS boot), to the 'firmware' image (if it is a
U-Boot) or to one of the loadables (if the 'firmware' is an ATF, an
OPTEE, or some other image-type and U-Boot is listed in the
loadabled).

To achieve this goal, we drop the os_boot flag and track the type of
image loaded.  If it is of type IH_OS_U_BOOT, we append the FDT.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
f2efe6786e spl: change load_addr and entry_point to uintptr_t
Mainly a stylistic change: convert the load_addr and entry_point
fields of struct spl_image_info to uintptr_t (from ulong).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
75014470ae spl: add a fdt_addr field to spl_image_info
When loading a full U-Boot with detached device-tree using the SPL FIT
backend, we should store the address of the FDT loaded as part of the
SPL image info: this allows us to fixup the FDT with additional info
we may want to propagate onward.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:06 +01:00
Philipp Tomsich
4914af1286 image: add IH_OS_ARM_TRUSTED_FIRMWARE for ARM Trusted Firmware
To boot on ARMv8 systems with ARM Trusted Firmware, we need to
assemble an ATF-specific parameter structure and also provide the
address of the images started by ATF (e.g. BL3-3, which may be the
full U-Boot).

To allow us to identify an ARM Trusted Firmware contained in a FIT
image, this adds the necessary definitions.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:06 +01:00
Tom Rini
93a51d301a Merge git://git.denx.de/u-boot-arc 2017-11-24 11:45:15 -05:00
Alexey Brodkin
f2a226780f arc: cache: Add required NOPs after invalidation of instruction cache
As per ARC HS databook (see chapter 5.3.3.2) it is required to add
3 NOPs after each write to IC_IVIC which we do from now on.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
2017-11-24 19:38:23 +03:00
Alexey Brodkin
d764a20f2b arc: bootm: Move slave cores kick-starting under !fake
Currently slave cores will be kick-started even if we want
to dry run bootm which is not what we really want.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
2017-11-24 19:38:07 +03:00
Eugeniy Paltsev
3194c3cddf ARC: HSDK: introduce CREG GPIO driver
The HSDK can manage some pins via CREG registers block.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-11-24 19:37:56 +03:00
Tom Rini
bb7ab1ccfe Merge git://git.denx.de/u-boot-dm 2017-11-23 22:48:35 -05:00
Simon Glass
9677faa34e binman: Return non-zero exit code on test failure
Return exit code 1 when test fail so that callers can detect this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
ca4f4ff7cf binman: Add add test for using an Intel MRC binary
MRC (Memory Reference Code) is a binary blob used to set up the SDRAM
controller on some Intel boards. Add a test for this feature.

With this test coverage on binman is back up to 100%.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
6b187df787 binman: Add add test for SPL with a microcode pointer
Add a test for this feature. It allows SPL to hold a pointer to the
microcode block. This is used for 64-bit U-Boot on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
8772213ea6 binman: Add a test for x86-start16-spl
This allows us to put the 16-bit x86 start-up code in SPL. Add a test for
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
5650984300 binman: Add test for u-boot-spl-bss-pad
Add a test that we can pad the BSS with zero bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
a25ebed36f binman: Check for files missing from test coverage
Files that are never imported are not shown in the test-coverage report.
Detect these and show an error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
a9871c6e7e binman: Increase test coverage back to 100%
Make a minor tweak to fix test coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
9fc60b4975 binman: Add a main program to the tests
Add a main program so that the tests can be executed directly, without
going through the main binman program.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00