PMIC MAX8997 is now ready to work with single and multibus soft I2C
implementation.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Since the pmic_reg_read is the u32 value, the order in which bytes
are placed to form u32 value is important.
Support for big and little sensor endianess is added.
Moreover calls to [leXX|beXX]_to_cpu have been added to support
little and big endian SoCs.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
This patch adds support for proper handling of a PMIC I2C transmission
comprising of two bytes.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
implement the common api lcd_setcolreg in include/lcd.h
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[agust: fixed commit log and gcc 4.6 -Wparentheses warnings]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The cfb console driver is trying to prevent bitmaps to spill over the
screen, but the calculations assume that at least part of the bitmap
fits into the screen area. In reality there could be bitmap elements
which are completely out of the screen area, they just need to be
discarded.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Implement the new video API functions to provide access to screen size,
etc.
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This patch checks self-clear sw_ipu_rst bit in
SCR register of SRC controller to be cleared
after setting it to high to reset IPUv3. This
makes sure that IPUv3 finishes sofware reset.
A timeout mechanism is added to stop polling
on the bit status in case the bit could not be
cleared by the hardware automatically within
10 millisecond.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
The gadget ethernet driver needs to keep copies of the MAC address (at
both endpoints) as strings so it needs a custom function for validation
of the MAC. It was not however performing a totally correct check and
also was emitting a warning about a set but unused variable. The
solution to both is that after checking the string contents we use the
standard test for a valid MAC.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
nand_ecc.c:82:5: warning: symbol 'nand_calculate_ecc' was not declared. Should it be static?
nand_ecc.c:155:5: warning: symbol 'nand_correct_data' was not declared. Should it be static?
nand_base.c:2854:1: error: directive in argument list
nand_base.c:2856:1: error: directive in argument list
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
cfi_flash.c:756:43: warning: Using plain integer as NULL pointer
cfi_flash.c:1150:52: warning: cast to non-scalar
cfi_flash.c:1433:46: warning: cast truncates bits from constant value (890089 becomes 89)
cfi_flash.c:1490:61: warning: cast truncates bits from constant value (1f001f becomes 1f)
cfi_flash.c:1508:61: warning: cast truncates bits from constant value (10001 becomes 1)
cfi_flash.c:1738:63: warning: cast truncates bits from constant value (10001 becomes 1)
cfi_flash.c:1857:6: warning: symbol '__flash_cmd_reset' was not declared. Should it be static?
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
fsl_esdhc.c:71:6: warning: symbol 'esdhc_xfertyp' was not declared. Should it be static?
fsl_esdhc.c:413:6: warning: symbol 'set_sysctl' was not declared. Should it be st
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
mmc.c:137:5: warning: symbol 'mmc_send_cmd' was not declared. Should it be static?
mmc.c:203:5: warning: symbol 'mmc_send_status' was not declared. Should it be static?
mmc.c:247:5: warning: symbol 'mmc_set_blocklen' was not declared. Should it be static?
mmc.c:440:5: warning: symbol 'mmc_read_blocks' was not declared. Should it be static?
mmc.c:510:5: warning: symbol 'mmc_go_idle' was not declared. Should it be static?
mmc.c:532:1: warning: symbol 'sd_send_op_cond' was not declared. Should it be static?
mmc.c:597:5: warning: symbol 'mmc_send_op_cond' was not declared. Should it be static?
mmc.c:661:5: warning: symbol 'mmc_send_ext_csd' was not declared. Should it be static?
mmc.c:683:5: warning: symbol 'mmc_switch' was not declared. Should it be static?
mmc.c:705:5: warning: symbol 'mmc_change_freq' was not declared. Should it be static?
mmc.c:775:5: warning: symbol 'sd_switch' was not declared. Should it be static?
mmc.c:796:5: warning: symbol 'sd_change_freq' was not declared. Should it be static?
mmc.c:935:6: warning: symbol 'mmc_set_ios' was not declared. Should it be static?
mmc.c:953:6: warning: symbol 'mmc_set_bus_width' was not declared. Should it be static?
mmc.c:1108:26: warning: dubious: !x & y
mmc.c:960:5: warning: symbol 'mmc_startup' was not declared. Should it be static?
mmc.c:1243:5: warning: symbol 'mmc_send_if_cond' was not declared. Should it be s
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
input.c:97:5: warning: symbol 'input_queue_ascii' was not declared. Should it be
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
mpc83xx_gpio.c:166:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_f'
mpc83xx_gpio.c:190:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_r'
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
sata_sil.c:371:7: warning: symbol 'sil_sata_rw_lba28' was not declared. Should it be static?
sata_sil.c:399:7: warning: symbol 'sil_sata_rw_lba48' was not declared. Should it be static?
sata_sil.c:429:6: warning: symbol 'sil_sata_cmd_flush_cache' was not declared. Should it be static?
sata_sil.c:441:6: warning: symbol 'sil_sata_cmd_flush_cache_ext' was not declared. Should it be static?
sata_sil.c:489:7: warning: symbol 'sata_read' was not declared. Should it be static?
sata_sil.c:505:7: warning: symbol 'sata_write' was not declared. Should it be static?
sata_sil.c:526:5: warning: symbol 'init_sata' was not declared. Should it be static?
sata_sil.c:588:5: warning: symbol 'scan_sata' was not declared. Should it be static?
fsl_sata.c:59:6: warning: symbol 'dprint_buffer' was not declared. Should it be static?
fsl_sata.c:187:42: warning: incorrect type in assignment (different base types)
fsl_sata.c:187:42: expected unsigned int [unsigned] [usertype] cda
fsl_sata.c:187:42: got restricted __le32 [usertype] <noident>
fsl_sata.c:291:6: warning: symbol 'fsl_sata_hardware_reset' was not declared. Should it be static?
fsl_sata.c:418:27: warning: incorrect type in assignment (different base types)
fsl_sata.c:418:27: expected unsigned int [unsigned] [usertype] dba
fsl_sata.c:418:27: got restricted __le32 [usertype] <noident>
fsl_sata.c:424:41: warning: incorrect type in assignment (different base types)
fsl_sata.c:424:41: expected unsigned int [unsigned] [usertype] ext_c_ddc
fsl_sata.c:424:41: got restricted __le32 [usertype] <noident>
fsl_sata.c:431:41: warning: incorrect type in assignment (different base types)
fsl_sata.c:431:41: expected unsigned int [unsigned] [usertype] ext_c_ddc
fsl_sata.c:431:41: got restricted __le32 [usertype] <noident>
fsl_sata.c:442:22: warning: incorrect type in assignment (different base types)
fsl_sata.c:442:22: expected unsigned int [unsigned] [usertype] cda
fsl_sata.c:442:22: got restricted __le32 [usertype] <noident>
fsl_sata.c:446:31: warning: incorrect type in assignment (different base types)
fsl_sata.c:446:31: expected unsigned int [unsigned] [usertype] prde_fis_len
fsl_sata.c:446:31: got restricted __le32 [usertype] <noident>
fsl_sata.c:448:22: warning: incorrect type in assignment (different base types)
fsl_sata.c:448:22: expected unsigned int [unsigned] [usertype] ttl
fsl_sata.c:448:22: got restricted __le32 [usertype] <noident>
fsl_sata.c:460:28: warning: incorrect type in assignment (different base types)
fsl_sata.c:460:28: expected unsigned int [unsigned] [usertype] attribute
fsl_sata.c:460:28: got restricted __le32 [usertype] <noident>
fsl_sata.c:623:6: warning: symbol 'fsl_sata_flush_cache' was not declared. Should it be static?
fsl_sata.c:667:5: warning: symbol 'fsl_sata_rw_ncq_cmd' was not declared. Should it be static?
fsl_sata.c:710:6: warning: symbol 'fsl_sata_flush_cache_ext' was not declared. Should it be static?
fsl_sata.c:725:6: warning: symbol 'fsl_sata_software_reset' was not declared. Should it be static?
fsl_sata.c:760:5: warning: symbol 'ata_low_level_rw_lba48' was not declared. Should it be static?
fsl_sata.c:795:5: warning: symbol 'ata_low_level_rw_lba28' was not declared. Should it be static?
the following compiler warnings show up after fixing the above, so
remove those three functions:
fsl_sata.c:59:13: warning: 'dprint_buffer' defined but not used [-Wunused-function]
fsl_sata.c:291:13: warning: 'fsl_sata_hardware_reset' defined but not used [-Wunused-function]
fsl_sata.c:726:13: warning: 'fsl_sata_software_reset' defined but not used [-Wunused-function]
Other than that, the following are fixed by __iomem annotation:
fsl_sata.c:84:39: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:84:39: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:84:39: got unsigned int volatile *addr
fsl_sata.c:172:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:172:26: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:172:26: got unsigned int *<noident>
fsl_sata.c:175:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:175:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:175:19: got unsigned int *<noident>
fsl_sata.c:181:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:181:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:181:19: got unsigned int *<noident>
fsl_sata.c:184:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:184:26: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:184:26: got unsigned int *<noident>
fsl_sata.c:186:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:186:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:186:19: got unsigned int *<noident>
fsl_sata.c:189:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:189:26: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:189:26: got unsigned int *<noident>
fsl_sata.c:191:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:191:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:191:19: got unsigned int *<noident>
fsl_sata.c:194:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:194:26: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:194:26: got unsigned int *<noident>
fsl_sata.c:195:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:195:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:195:19: got unsigned int *<noident>
fsl_sata.c:198:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:198:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:198:19: got unsigned int *<noident>
fsl_sata.c:201:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:201:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:201:19: got unsigned int *<noident>
fsl_sata.c:204:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:204:26: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:204:26: got unsigned int *<noident>
fsl_sata.c:205:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:205:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:205:19: got unsigned int *<noident>
fsl_sata.c:208:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:208:26: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:208:26: got unsigned int *<noident>
fsl_sata.c:209:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:209:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:209:19: got unsigned int *<noident>
fsl_sata.c:212:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:212:26: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:212:26: got unsigned int *<noident>
fsl_sata.c:213:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:213:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:213:19: got unsigned int *<noident>
fsl_sata.c:216:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:216:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:216:19: got unsigned int *<noident>
fsl_sata.c:219:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:219:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:219:19: got unsigned int *<noident>
fsl_sata.c:222:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:222:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:222:19: got unsigned int *<noident>
fsl_sata.c:225:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:225:26: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:225:26: got unsigned int *<noident>
fsl_sata.c:227:19: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:227:19: expected unsigned int volatile [noderef] <asn:2>*addr
fsl_sata.c:227:19: got unsigned int *<noident>
fsl_sata.c:242:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:242:26: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:242:26: got unsigned int *<noident>
fsl_sata.c:256:32: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:256:32: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:256:32: got unsigned int *<noident>
fsl_sata.c:262:26: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:262:26: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:262:26: got unsigned int *<noident>
fsl_sata.c:274:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:274:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:274:53: got unsigned int *<noident>
fsl_sata.c:275:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:275:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:275:53: got unsigned int *<noident>
fsl_sata.c:276:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:276:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:276:53: got unsigned int *<noident>
fsl_sata.c:277:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:277:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:277:53: got unsigned int *<noident>
fsl_sata.c:278:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:278:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:278:53: got unsigned int *<noident>
fsl_sata.c:279:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:279:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:279:53: got unsigned int *<noident>
fsl_sata.c:280:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:280:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:280:53: got unsigned int *<noident>
fsl_sata.c:281:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:281:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:281:53: got unsigned int *<noident>
fsl_sata.c:282:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:282:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:282:53: got unsigned int *<noident>
fsl_sata.c:283:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:283:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:283:53: got unsigned int *<noident>
fsl_sata.c:284:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:284:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:284:53: got unsigned int *<noident>
fsl_sata.c:285:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:285:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:285:53: got unsigned int *<noident>
fsl_sata.c:286:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:286:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:286:53: got unsigned int *<noident>
fsl_sata.c:287:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:287:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:287:53: got unsigned int *<noident>
fsl_sata.c:288:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:288:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:288:53: got unsigned int *<noident>
fsl_sata.c:289:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:289:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:289:53: got unsigned int *<noident>
fsl_sata.c:290:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:290:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:290:53: got unsigned int *<noident>
fsl_sata.c:291:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:291:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:291:53: got unsigned int *<noident>
fsl_sata.c:292:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:292:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:292:53: got unsigned int *<noident>
fsl_sata.c:293:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:293:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:293:53: got unsigned int *<noident>
fsl_sata.c:294:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:294:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:294:53: got unsigned int *<noident>
fsl_sata.c:295:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:295:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:295:53: got unsigned int *<noident>
fsl_sata.c:296:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:296:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:296:53: got unsigned int *<noident>
fsl_sata.c:297:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:297:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:297:53: got unsigned int *<noident>
fsl_sata.c:298:53: warning: incorrect type in argument 1 (different address spaces)
fsl_sata.c:298:53: expected unsigned int const volatile [noderef] <asn:2>*addr
fsl_sata.c:298:53: got unsigned int *<noident>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
phy.c:46:5: warning: symbol 'genphy_config_advert' was not declared. Should it be static?
phy.c:121:5: warning: symbol 'genphy_setup_forced' was not declared. Should it be static?
phy.c:468:5: warning: symbol 'phy_probe' was not declared. Should it be static?
phy.c:491:19: warning: symbol 'get_phy_driver' was not declared. Should it be static?
phy.c:508:19: warning: symbol 'phy_device_create' was not declared. Should it be static?
phy.c:552:5: warning: symbol 'get_phy_id' was not declared. Should it be static?
phy.c:584:19: warning: symbol 'get_phy_device' was not declared. Should it be sta
vitesse.c:126:5: warning: symbol 'vsc8601_config' was not declared. Should it be static?
vsc7385.c:33:5: warning: symbol 'vsc7385_upload_firmware' was not declared. Should it be static?
tgec_phy.c:33:5: warning: symbol 'tgec_mdio_write' was not declared. Should it be static?
tgec_phy.c:75:5: warning: symbol 'tgec_mdio_read' was not declared. Should it be static?
tgec_phy.c:117:5: warning: symbol 'tgec_mdio_reset' was not declared. Should it be static?
eth.c:48:6: warning: symbol 'dtsec_configure_serdes' was not declared. Should it be static?
p4080.c:26:5: warning: symbol 'port_to_devdisr' was not declared. Should it be static?
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
bootp.c:44:14: warning: symbol 'dhcp_state' was not declared. Should it be static?
bootp.c:45:15: warning: symbol 'dhcp_leasetime' was not declared. Should it be static?
bootp.c:46:10: warning: symbol 'NetDHCPServerIP' was not declared. Should it be static?
arp.c:30:17: warning: symbol 'NetArpWaitReplyIP' was not declared. Should it be static?
arp.c:37:16: warning: symbol 'NetArpTxPacket' was not declared. Should it be static?
arp.c:38:17: warning: symbol 'NetArpPacketBuf' was not declared. Should it be static?
atheros.c:33:19: warning: symbol 'AR8021_driver' was not declared. Should it be static?
net.c:183:7: warning: symbol 'PktBuf' was not declared. Should it be static?
net.c:159:21: warning: symbol 'net_state' was not declared. Should it be static?
ping.c:73:6: warning: symbol 'ping_start' was not declared. Should it be static?
ping.c:82:13: warning: symbol 'ping_receive' was not declared. Should it be static?
tftp.c:53:7: warning: symbol 'TftpRRQTimeoutMSecs' was not declared. Should it be static?
tftp.c:54:5: warning: symbol 'TftpRRQTimeoutCountMax' was not declared. Should it be static?
eth.c:125:19: warning: symbol 'eth_current' was not declared. Should it be static?
Note: in the ping.c fix, commit a36b12f95a
"net: Move PING out of net.c" mistakenly carried the ifdef CMD_PING
clause from when it was necessary to avoid warnings when it was embedded
in net.c.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
u-boot's byteorder headers did not contain endianness attributions
for use with sparse, causing a lot of false positives. Import the
kernel's latest definitions, and enable them by including compiler.h
and types.h. They come with 'const' added for some swab functions, so
fix those up, too:
include/linux/byteorder/big_endian.h:46:2: warning: passing argument 1 of '__swab64p' discards 'const' qualifier from pointer target type [enabled by default]
Also, note: u-boot's historic __BYTE_ORDER definition has been
preserved (for the time being at least).
We also remove ad-hoc barrier() definitions, since we're including
compiler.h in files that hadn't in the past:
macb.c:54:0: warning: "barrier" redefined [enabled by default]
In addition, including compiler.h in byteorder changes the 'noinline'
definition to expand to __attribute__((noinline)). This fixes
arch/powerpc/lib/bootm.c:
bootm.c:329:16: error: attribute '__attribute__': unknown attribute
bootm.c:329:16: error: expected ')' before '__attribute__'
bootm.c:329:25: error: expected identifier or '(' before ')' token
powerpc sparse builds yield:
include/common.h:356:22: error: marked inline, but without a definition
the unknown-reason inlining without a definition is considered obsolete
given it was part of the 2002 initial commit, and no arm version was
'fixed.'
also fixed:
ydirectenv.h:60:0: warning: "inline" redefined [enabled by default]
and:
Configuring for devconcenter - Board: intip, Options: DEVCONCENTER
make[1]: *** [4xx_ibm_ddr2_autocalib.o] Error 1
make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2
powerpc-fsl-linux-size: './u-boot': No such file
4xx_ibm_ddr2_autocalib.c: In function 'DQS_autocalibration':
include/asm/ppc4xx-sdram.h:1407:13: sorry, unimplemented: inlining failed in call to 'ppc4xx_ibm_ddr2_register_dump': function body not available
4xx_ibm_ddr2_autocalib.c:1243:32: sorry, unimplemented: called from here
and:
In file included from crc32.c:50:0:
crc32table.h:4:1: warning: implicit declaration of function '___constant_swab32' [-Wimplicit-function-declaration]
crc32table.h:4:1: error: initializer element is not constant
crc32table.h:4:1: error: (near initialization for 'crc32table_le[0]')
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
[trini: Remove '#endif' in include/common.h around setenv portion]
Signed-off-by: Tom Rini <trini@ti.com>
Currently, this driver uses a 28bit interface to AHCI, this
limits the number of blocks addressable to 2^28, or the max
disk size to 512(2^28) or about 137GB. This change allows
supporting drives up to about 2TB.
Testing this is a bit difficult. There is test code that
can be inserted into U-Boot that will write test patterns
into certain unused blocks. These patterns can be manually
checked using 'dd' after boot. Another way is to confirm the
original error that exposed this bug is fixed. IOW: see if
AU (Auto Update) will now work on the drive. Also, check
that there are no warning messages from the 'cgpt' utility.
Signed-off-by: Walter Murphy <wmurphy@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Writes in u-boot are so rare, and the logic to know when is
the last write and do a flush only there is sufficiently
difficult. Just do a flush after every write. This incurs,
usually, one extra flush when the rare writes do happen.
Signed-off-by: Marc Jones <marc.jones@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add HDD handling to the SSD-only AHCI driver, by separately dealing with
spin-up and link-up.
Signed-off-by: Marc Jones <marc.jones@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Note: These are timeout values and not delay values, so the event being
timed out will complete whenever it is actually ready, with a
measurement granularity of 1 millisecond, up till the timeout value.
Therefore, there is no effect on SSD booting.
The values were determined by instrumenting the code and measuring the
actual time taken by several different models of HDD for each of the
parameters and then adding 50% more for the spinup value and just
doubling the command timeout value.
Signed-off-by: Walter Murphy <wmurphy@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Exynos5 automatically performs DMA when the SATA controller executes
commands. This adds the necessary dcache-to-memory flush &
invalidation calls to allow the DMA to properly function.
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the assignment of various physical memory buffers used by the
SATA controller to explicitly be denoted as physical addresses.
The memory is identity-mapped, so these function calls are a nop, but
they provide good semantic documentation for any maintainers.
The return value of virt_to_phys() is 'unsigned long'. On machines
where sizeof(unsigned long) != sizeof(pointer), a cast through
(uintptr_t) is needed to appease the compiler due to the potential of
losing the upper 32 bits of the address.
In compilation this scenario, a physical address could be 64-bits, yet
the C pointer environment only allows 32-bit addresses; the constraint
is that pointers cannot address more than 4Gb of memory and if
virt_to_phys() ever returns an out-of-range value for the physical
address, there are issues with emmory mapping which must be solved.
However, since the memory is identify mappeed, there is no problem
introducing the cast: the original pointer will reside in 32-bits, so
the physical address will also be within in 32-bits.
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This fixes a spelling error in a message which can be output to the
console.
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This cleanup replaces the hardcoded use of '20', which represents the
number of bytes in the FIS, with sizeof(fis).
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
In the structure returned by the ATA identify device command, there are two
fields which describe the device capacity. One is a 32 bit data type which
reports the number of sectors as a 28 bit LBA, and the other is a 64 bit data
type which is for a 48 bit LBA. If the device doesn't support 48 bit LBAs,
the small value is the only value with the correct size. If it supports more,
if the number of sectors is small enough to fit into 28 bits, both fields
reflect the correct value. If it's too large, the smaller field has 28 bits of
1s, 0xfffffff, and the other field has the correct value.
The AHCI driver is implemented by attaching to the generic SCSI code and
translating on the fly between SCSI binary data structures and AHCI data
structures. It responds to requests to execute specific SCSI commands by
executing the equivalent AHCI commands and then crafting a response which
matches what a SCSI disk would send.
The AHCI driver now considers both fields and chooses the correct one when
implementing both the SCSI READ CAPACITY (10) and READ CAPACITY (16) commands.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
The "scsi write" command requires support from underlying driver.
This CL enables SCSI_WRITE10 in AHCI driver.
Tested in U-Boot console, try to i/o with sector #64:
scsi read 1000 40 1
md.b 1000 200 # check if things are not 0xcc
mw.b 1000 cc 200 # try to fill with 0xcc
scsi write 1000 40 1
mw.b 1000 0 200 # fill with zero
md.b 1000 200 # should be all 0
scsi read 1000 40 1
md.b 1000 200 # should be all 0xcc
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This command doesn't really do anything when talking to a SATA device, and
sending it confuses some of them. This change makes sending the command
optional, and defaults to not. The situations where it should be sent are not
the common case.
With the standard SSD in the machine, here are some times with the option
turned off:
1. 8277
2. 8273
3. 8050
And turned on:
1. 8303
2. 8155
3. 8276
Sending that command seems to have no meaningful effect on performance.
This fixes problems with an SSD marked Toshiba NV6424, Taiwan 11159AE P
and TC58NVG5D2FTA10.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
- print the correct speed
- print all the AHCI capability flags
(information taken from Linux kernel driver)
- clean up some comments
For example, this might show the following string:
AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x3 impl SATA mode
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Commit-Ready: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
- remove unused ssleep macro
- add some useful debugging information
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
The existing code waits a whole second for the AHCI controller to reset.
Instead, let's poll the status register to see if the reset has
succeeded and return earlier if possible. This brings down the time for
AHCI probing from 1s to 20ms.
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
With an Intel AHCI controller, the driver does not operate properly
if the requested amount of blocks to read exceeds 255.
It is probably possible to specify 0 as the block count and the driver
will read 256 blocks, but it was decided to limit the number of blocks
read at once to 128 (it should be a power of 2 for the optimal
performance of solid state drives).
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add optional support for some ANSI escape sequences to the
cfb_console driver. Define CONFIG_CFB_CONSOLE_ANSI to enable
cursor moving, color reverting and clearing the cfb console
via ANSI escape codes.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Deassert the CONFIG pin before asserting it again. This assures that the
FPGA will be resetted and therefore configuration will be correctly
enabled.
This is also already done on other FPGA's, e.g. Stratix.
Signed-off-by: Stephan Gatzka <stephan.gatzka@hbm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add the missing bits to the Tegra NAND driver to make ONFI detection work
properly.
Also add it to the Tegra default config, as it seems to be a reasonable thing
to have it available on all boards that use any kind of NAND.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
serial_ns16550.c:222:1: warning: symbol 'eserial1_init' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_setbrg' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_getc' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_tstc' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_putc' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_puts' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_init' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_setbrg' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_getc' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_tstc' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_putc' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_puts' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_init' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_setbrg' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_getc' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_tstc' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_putc' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_puts' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_init' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_setbrg' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_getc' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_tstc' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_putc' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_puts' was not declared. Should it be static?
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
fsl_i2c.c:217:14: warning: symbol 'get_i2c_clock' was not declared. Should it be static?
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
D0/D1 Swapped or not is a board property, not anything specific to
the am33xx SoC, so add a custom define for it.
At the same time correct the bit handling for the swapped mode
(DPE0 should be cleared and SI/DPE1 set).
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
This processor, though very similar to other members of the
PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides
yet another feature set than any supported sibling.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The endpoint rx count register value will be zero if it is read before
receive packet ready bit (PERI_RXCSR:RXPKTRDY) is set.
Check for the receive packet ready bit (PERI_RXCSR:RXPKTRDY) before
reading endpoint rx count register. Proceed with rx count read and
FIFO read only if RXPKTRDY bit is set.
Signed-off-by: Pankaj Bharadiya <pankaj.bharadiya@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Currently, the SRIO and PCIE boot master module will be compiled into the
u-boot image if the macro "CONFIG_FSL_CORENET" has been defined. And this
macro has been included by all the corenet architecture platform boards.
But in fact, it's uncertain whether all corenet platform boards support
this feature.
So it may be better to get rid of the macro "CONFIG_FSL_CORENET", and add
a special macro for every board which can support the feature. This
special macro will be defined in the header file
"arch/powerpc/include/asm/config_mpc85xx.h". It will decide if the SRIO
and PCIE boot master module should be compiled into the board u-boot image.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Current espi controller driver assumes the command length of write command is
not equal to '1', it was made based on SPANSION SPI flash, but some SPI flash
driver such as SST does use write command length as '1', so write command on
SST SPI flash will not work. And the length check for write command is not
necessary for SPANSION, though it's harmless for SPANSION, it will stop write
operation on flashes like SST, so we remove the check.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
TBI PHY address (TBIPA) register is set in general frame manager
phy init funciton dtsec_init_phy() in drivers/net/fm/eth.c, and
it is supposed to set TBIPA on FM1@DTSEC1 in case of FM1@DTSEC1
isn't used directly, which provides MDIO for other ports. So
following code is wrong in case of FM2, which has a different
mac base.
struct dtsec *regs = (struct dtsec *)fm_eth->mac->base;
/* Assign a Physical address to the TBI */
out_be32(®s->tbipa, CONFIG_SYS_TBIPA_VALUE);
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The multirate ethernet media access controller (mEMAC) interfaces to
10Gbps and below Ethernet/IEEE 802.3 networks via either RGMII/RMII
interfaces or XAUI/XFI/SGMII/QSGMII using the high-speed SerDes interface.
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add support for Freescale B4860 and variant SoCs. Features of B4860 are
(incomplete list):
Six fully-programmable StarCore SC3900 FVP subsystems, divided into three
clusters-each core runs up to 1.2 GHz, with an architecture highly
optimized for wireless base station applications
Four dual-thread e6500 Power Architecture processors organized in one
cluster-each core runs up to 1.8 GHz
Two DDR3/3L controllers for high-speed, industry-standard memory interface
each runs at up to 1866.67 MHz
MAPLE-B3 hardware acceleration-for forward error correction schemes
including Turbo or Viterbi decoding, Turbo encoding and rate matching,
MIMO MMSE equalization scheme, matrix operations, CRC insertion and
check, DFT/iDFT and FFT/iFFT calculations, PUSCH/PDSCH acceleration,
and UMTS chip rate acceleration
CoreNet fabric that fully supports coherency using MESI protocol between
the e6500 cores, SC3900 FVP cores, memories and external interfaces.
CoreNet fabric interconnect runs at 667 MHz and supports coherent and
non-coherent out of order transactions with prioritization and
bandwidth allocation amongst CoreNet endpoints.
Data Path Acceleration Architecture, which includes the following:
Frame Manager (FMan), which supports in-line packet parsing and general
classification to enable policing and QoS-based packet distribution
Queue Manager (QMan) and Buffer Manager (BMan), which allow offloading
of queue management, task management, load distribution, flow ordering,
buffer management, and allocation tasks from the cores
Security engine (SEC 5.3)-crypto-acceleration for protocols such as
IPsec, SSL, and 802.16
RapidIO manager (RMAN) - Support SRIO types 8, 9, 10, and 11 (inbound and
outbound). Supports types 5, 6 (outbound only)
Large internal cache memory with snooping and stashing capabilities for
bandwidth saving and high utilization of processor elements. The
9856-Kbyte internal memory space includes the following:
32 Kbyte L1 ICache per e6500/SC3900 core
32 Kbyte L1 DCache per e6500/SC3900 core
2048 Kbyte unified L2 cache for each SC3900 FVP cluster
2048 Kbyte unified L2 cache for the e6500 cluster
Two 512 Kbyte shared L3 CoreNet platform caches (CPC)
Sixteen 10-GHz SerDes lanes serving:
Two Serial RapidIO interfaces. Each supports up to 4 lanes and a total
of up to 8 lanes
Up to 8-lanes Common Public Radio Interface (CPRI) controller for glue-
less antenna connection
Two 10-Gbit Ethernet controllers (10GEC)
Six 1G/2.5-Gbit Ethernet controllers for network communications
PCI Express controller
Debug (Aurora)
Two OCeaN DMAs
Various system peripherals
182 32-bit timers
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add support for Freescale T4240 SoC. Feature of T4240 are
(incomplete list):
12 dual-threaded e6500 cores built on Power Architecture® technology
Arranged as clusters of four cores sharing a 2 MB L2 cache.
Up to 1.8 GHz at 1.0 V with 64-bit ISA support (Power Architecture
v2.06-compliant)
Three levels of instruction: user, supervisor, and hypervisor
1.5 MB CoreNet Platform Cache (CPC)
Hierarchical interconnect fabric
CoreNet fabric supporting coherent and non-coherent transactions with
prioritization and bandwidth allocation amongst CoreNet end-points
1.6 Tbps coherent read bandwidth
Queue Manager (QMan) fabric supporting packet-level queue management and
quality of service scheduling
Three 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
support
Memory prefetch engine (PMan)
Data Path Acceleration Architecture (DPAA) incorporating acceleration for
the following functions:
Packet parsing, classification, and distribution (Frame Manager 1.1)
Queue management for scheduling, packet sequencing, and congestion
management (Queue Manager 1.1)
Hardware buffer management for buffer allocation and de-allocation
(BMan 1.1)
Cryptography acceleration (SEC 5.0) at up to 40 Gbps
RegEx Pattern Matching Acceleration (PME 2.1) at up to 10 Gbps
Decompression/Compression Acceleration (DCE 1.0) at up to 20 Gbps
DPAA chip-to-chip interconnect via RapidIO Message Manager (RMAN 1.0)
32 SerDes lanes at up to 10.3125 GHz
Ethernet interfaces
Up to four 10 Gbps Ethernet MACs
Up to sixteen 1 Gbps Ethernet MACs
Maximum configuration of 4 x 10 GE + 8 x 1 GE
High-speed peripheral interfaces
Four PCI Express 2.0/3.0 controllers
Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz with
Type 11 messaging and Type 9 data streaming support
Interlaken look-aside interface for serial TCAM connection
Additional peripheral interfaces
Two serial ATA (SATA 2.0) controllers
Two high-speed USB 2.0 controllers with integrated PHY
Enhanced secure digital host controller (SD/MMC/eMMC)
Enhanced serial peripheral interface (eSPI)
Four I2C controllers
Four 2-pin or two 4-pin UARTs
Integrated Flash controller supporting NAND and NOR flash
Two eight-channel DMA engines
Support for hardware virtualization and partitioning enforcement
QorIQ Platform's Trust Architecture 1.1
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Fix compiling error in case CONFIG_SYS_PCIE2_MEM_VIRT or CONFIG_SYS_PCIE3_MEM_VIRT
not defined.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The original code uses 'Programming Interface' field to judge if PCIE is
EP or RC mode, however, T4240 does not support this functionality.
According to PCIE specification, 'Header Type' offset 0x0e is used to
indicate header type, so for PCIE controller, the patch changes code to
use 'Header Type' field to identify if the PCIE is EP or RC mode.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This driver is no longer used and it's remaining users were converted
to the new generic PXA MMC driver. Thus, remove this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
MMC host controller requires a delay between every sdhci_send_cmd()
execution. In s5p_mmc driver (s5p_sdhci replaces this driver), a delay
of 1000us was provided after every mmc_send_cmd() call. Adding a quirk
in current sdhci driver to replicate the behaviour.
Without this delay, MMC initialization on Origen board fails with
following error messages.
Timeout for status update!
mmc fail to send stop cmd
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
In host-control register, DMA select bit field is present.
BUt in sdhci.c, didn't select for DMA.
if set CONFIG_MMC_SDMA, we need to set SDMA-select bit.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Timeout value is tunable.
When run read/write operation, sometime returned the timeout error.
Because the timeout value is too short.
So increased the enough timeout value.
(This timeout value is used to prevent the infinite loop.)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The recent removal of the cmd->flags field caused error in the
debuging code of mmc_spi. Fix this:
mmc_spi.c: In function 'mmc_spi_request':
mmc_spi.c:179:2: error: 'struct mmc_cmd' has no member named 'flags'
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Implement necessary code to use the generic bounce buffer routines
inside this driver. This replaces the MMC bounce buffer, which is
to be removed.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
when missing USB PHY clock, u-boot will hang during USB
initialization when issuing "usb start". We should check
USBGP[PHY_CLK_VALID] bit to avoid CPU hanging in this case.
Due to controller issue of PHY_CLK_VALID in ULPI mode, we set
USB_EN before checking PHY_CLK_VALID, otherwise PHY_CLK_VALID
doesn't work.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
To support Non-ASCII keys (ex, Fn, PgUp/Dn, arrow keys, ...), we need to
translate key code into escape sequence.
(Updated by sjg@chromium.org to move away from a function to store
keycodes, so we can easily record how many were sent. We now need to
return this from input_send_keycodes() so we know whether keys were
generated.)
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
The i8042 keyboard reset was not checking the results of the output
buffer after the reset command. This can jam up some KBC/keyboards.
Also, remove a write to the wrong register and the CONFIG setting
around the incorrect write.
Signed-off-by: Marc Jones <marc.jones@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
The BIOS leaves the keyboard enabled during boot time so that any
keystroke would interfere kernel driver initialization.
Add a way to disable the keyboard to make sure no scancode will be
generated during the boot time. Note that the keyboard will be
re-enabled again after the kernel driver is up.
This code can be called from the board functions.
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
This change adds a board overridable function which can be used to decide
whether or not to initialize the i8042 keyboard controller. On systems where
it isn't actually connected to anything, this can save a significant amount of
boot time.
On Stumpy, this saves about 200ms on boot.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
On x86, the i8042 keyboard controller driver frequently waits for the keyboard
input buffer to be empty to make sure the controller has had a chance to
process the data it was given. The way the delay loop was structured, if the
controller hadn't cleared the corresponding status bit immediately, it would
wait 1ms before checking again. If the keyboard responded quickly but not
instantly, the driver would still wait a full 1ms when perhaps 1us would have
been sufficient. Because udelay is a busy wait anyway, this change decreases
the delay between checks to 1us.
Also, this change gets rid of a hardcoded 250ms delay.
On Stumpy, this saves 100-150ms during boot.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
The following commit introduces some build failures for ColdFire
platform.
commit abaef69fbe
Author: Marek Vasut <marex@denx.de>
Date: Thu Sep 13 16:51:38 2012 +0200
Add the missed header files.
Sign-off-by: Alison Wang <b18965@freescale.com>
The following warning was produced, fix it:
mcfmii.c: In function 'mcffec_miiphy_write':
mcfmii.c:318:8: warning: variable 'rdreg' set but not used [-Wunused-but-set-variable]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: "Jin Zhengxiong-R64188" <R64188@freescale.com>
Cc: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David Müller <d.mueller@elsoft.ch>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Oliver Brown <obrown@adventnetworks.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Add kerneldoc annotations into serial core.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Reorder the get_current() function to make it a bit more readable.
The code does not grow and there is minor change in the code logic,
where dev != NULL is now checked in any case.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Reorder serial_assign() function to get rid of the extra level of
indentation. Also, adjust the return value to be -EINVAL instead of
positive one to be more consistent.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Replace the in-place ad-hoc implementation of serial_puts() within
the drivers with default_serial_puts() call. This cuts down on the
code duplication quite a bit.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
U-Boot contains a lot of duplicit implementations of serial_puts()
call which just pipes single characters into the port in loop. Implement
function that does this behavior into common code, so others can make
easy use of it.
This function is called default_serial_puts() and it's sole purpose
is to call putc() in loop on the whole string passed to it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Since commit 957731ed (ARM: remove broken "lpd7a40x" boards),
lh7a40x cpu and serial driver have become unused. Remove them.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
Before this patch, i2c_{read,write} always returned 0.
Check TACK in i2c_raw_{read,write} so that i2c_{read,write} return non-zero when error.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Before this patch i2c_probe() always returned 0 and "i2c probe" command did not work properly.
Modify i2c_set_addr() to check TACK when waiting DTE and make i2c_probe() call this function.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, "i2c md" and "i2c mw" command on U-Boot work properly on KZM-A9-GT board.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Correct BUSY bit define in ICSR from (1<<3) to (1<<4).
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and icch.
This patch add support for the extentin bits.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
