Add code and configuration options to support booting from QSPI NOR.
Enable support for booting from QSPI NOR.
Signed-off-by: Marek Vasut <marex@denx.de>
Add code and configuration options to support booting from RAW
SD/MMC card as well as for ext4/vfat filesystems. Enable support
for booting from SD/MMC card, but don't enable the filesystem
support just yet to retain compatibility with old SoCFPGA card
format.
Signed-off-by: Marek Vasut <marex@denx.de>
The code in spl_board_init() should have been in board_init_f()
from the beginning, since it is code which configures system and
then starts DRAM. Thus, it cannot be in spl_board_init(), which
is called from board_init_r() , which already expects a working
DRAM.
Signed-off-by: Marek Vasut <marex@denx.de>
Make sure that all the peripherals are correctly reset and then
brought out of reset in the SPL. Not going through proper reset
cycle might leave the IP blocks in inconsistent state.
Signed-off-by: Marek Vasut <marex@denx.de>
Configure the ARM SCU and NIC301 very early. The ARM SCU SNSAC register
must be configured, so we can access all peripherals. The NIC-301 must
be configured so that the BootROM is not mapped into the SDRAM address
space.
Signed-off-by: Marek Vasut <marex@denx.de>
Synchronise the SPL behavior with the original Altera code and
toggle the Warm Reset Config I/O bit accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
Rework sysmgr_enable_warmrstcfgio() into sysmgr_config_warmrstcfgio(),
which allows both enabling and disabling the warm reset config I/O
functionality.
Signed-off-by: Marek Vasut <marex@denx.de>
Extract the clock configuration horribleness caused by pll_config.h in
the following manner.
First of all, introduce a few new accessors which return values of
various clocks used in clock_manager.c and use them in clock_manager.c .
These accessors replace those few macros which came from pll_config.h
originally. Also introduce an accessor which returns the struct cm_config
default configuration for the clock manager used in SPL.
The accessors are implemented in a board-specific wrap_pll_config.c
file, whose sole purpose is to include the qts-generated pll_config.h
and provide only the necessary values to the clock manager.
The purpose of this design is to limit the scope of inclusion for the
pll_config.h , which thus far was included build-wide and poluted the
namespace. With this change, the inclusion is limited to just the new
wrap_pll_config.c file, which in turn provides three simple functions
for the clock_manager.c to use.
Signed-off-by: Marek Vasut <marex@denx.de>
Replace all those ad-hoc reset functions, which were all copies
of the same invocation of clrbits_le32() anyway, with one single
unified function, socfpga_per_reset(), with necessary parameters.
Signed-off-by: Marek Vasut <marex@denx.de>