Commit Graph

67 Commits

Author SHA1 Message Date
Zhi-zhou Zhang
32afad783e MIPS: add board qemu-mips64 support
Both big-endian and little-endian are tested with below commands:
Rom version: (Default, Now we config it as rom version)
qemu-system-mips64el -M mips -bios u-boot.bin -cpu MIPS64R2-generic -nographic
qemu-system-mips64 -M mips -bios u-boot.bin -cpu MIPS64R2-generic -nographic
Ram version:
qemu-system-mips64el -M mips -cpu MIPS64R2-generic -kernel u-boot -nographic
qemu-system-mips64 -M mips -cpu MIPS64R2-generic -kernel u-boot -nographic

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-16 15:02:08 +02:00
Zhi-zhou Zhang
090854c826 MIPS: add support for 64 bit addressing
Prepare for upcoming mips64 support. This patch add mips64 address
support.

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
[daniel.schwierzeck@gmail.com: prefer _MIPS_SZLONG in posix_types.h to fix some warnings]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-16 15:02:08 +02:00
Zhi-zhou Zhang
cb0a6a1ecc MIPS: don't use camel-case style
Replace camel-case style with upper-case style globally.

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
2012-10-16 15:02:08 +02:00
Lucas Stach
c7e3b2b586 usb: lowlevel interface change to support multiple controllers
Carry an index in the lowlevel usb functions to make specify the
respective usb controller.

Also pass through an controller struct from lowlevel_init to the
creation of the root usb device of this controller.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2012-10-15 11:54:00 -07:00
Marek Vasut
a382725060 serial: Remove CONFIG_SERIAL_MULTI from serial drivers
Remove the support for not-CONFIG_SERIAL_MULTI part from serial
port drivers and some board files. Since CONFIG_SERIAL_MULTI is
now enabled by default, that part is a dead code. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:58 -07:00
Marek Vasut
6cb3273d11 serial: mips: Implement CONFIG_SERIAL_MULTI into JZ serial driver
Implement support for CONFIG_SERIAL_MULTI into JZ serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the JZ driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-10-15 11:53:51 -07:00
Marek Vasut
0191142283 serial: mips: Implement CONFIG_SERIAL_MULTI into asc serial driver
Implement support for CONFIG_SERIAL_MULTI into asc serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the asc driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-10-15 11:53:51 -07:00
Marek Vasut
7b953c5165 serial: mips: Implement CONFIG_SERIAL_MULTI into au1x00 serial driver
Implement support for CONFIG_SERIAL_MULTI into au1x00 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the au1x00 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-10-15 11:53:51 -07:00
Daniel Schwierzeck
00d0d2ad4e malloc: remove extern declarations of malloc_bin_reloc() in board.c files
Declare malloc_bin_reloc() in malloc.h and remove all extern declarations
in various board.c files to get rid of one checkpatch.pl warning.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Andreas Bießmann <andreas.devel@gmail.com>
Cc: Jason Jin <Jason.jin@freescale.com>
Cc: Macpaul Lin <macpaul@andestech.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Acked-by: Andreas Bießmann <andreas.devel@gmail.com>
2012-09-26 11:08:32 -07:00
Daniel Schwierzeck
0efcdb15f9 MIPS: move CONFIG_STANDALONE_LOAD_ADDR to CPU config makefiles
Prepare for upcoming MIPS64 CPU support.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-08-24 00:34:47 +02:00
Daniel Schwierzeck
2c0e3de384 MIPS: factor out endianess flag handling to arch config.mk
This is CPU independent and should be configured architecture-wide.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-08-24 00:34:43 +02:00
Marek Vasut
d2aa5dca74 dm: mips: Import libgcc components from Linux
Import ashldr3, ashrdi3 and lshrdi3 to squash possible libgcc fp mismatch,
resulting in the following warning:

mips-linux-gnu-ld: Warning: /usr/lib/gcc/mips-linux-gnu/4.7/libgcc.a(_lshrdi3.o) uses hard float, u-boot uses soft float
mips-linux-gnu-ld: Warning: /usr/lib/gcc/mips-linux-gnu/4.7/libgcc.a(_ashldi3.o) uses hard float, u-boot uses soft float

Imported from Linux (linux-next 20120723) as of commit:

commit 72fbfb260197a52c2bc2583f3e8f15d261d0f924
Author: Ralf Baechle <ralf@linux-mips.org>
Date:   Wed Jun 7 13:25:37 2006 +0100

    [MIPS] Fix optimization for size build.

    It took a while longer than on other architectures but gcc has finally
    started to strike us as well ...

    This also fixes the damage by 6edfba1b33c701108717f4e036320fc39abe1912.

    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
[<daniel.schwierzeck@gmail.com>: removed USE_PRIVATE_LIBGCC = yes]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-08-17 20:13:48 +02:00
Marek Vasut
8b82cefbfc dm: mips: Fix lb60 timer code
The timer code contains more halfword writes which trigger gcc errors.
The registers are again 32bit, yet written by 16bit writes, fix this:

timer.c: In function ‘reset_timer_masked’:
timer.c:37:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
timer.c: In function ‘get_timer_masked’:
timer.c:43:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
timer.c: In function ‘timer_init’:
timer.c:86:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
timer.c:88:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
timer.c:89:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
timer.c:90:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel <zpxu@ingenic.cn>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2012-08-17 20:13:48 +02:00
Marek Vasut
36d0a42b68 dm: mips: Fix lb60 WDT control
Write the TSCR register via 32bit write instead of 16bit one.
The register is 32bit wide and bit 16 is being set, triggering
gcc overflow error and making the code broken.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel <zpxu@ingenic.cn>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2012-08-17 20:13:48 +02:00
Mike Frysinger
47fde91f0c global_data: unify global flag defines
All the global flag defines are the same across all arches.  So unify them
in one place, and add a simple way for arches to extend for their needs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-09 21:46:32 +02:00
Daniel Schwierzeck
e034ea3b77 MIPS: board.c: move extern declarations to u-boot-mips.h
This fixes some remaining checkpatch.pl warnings.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-06-03 23:46:04 +02:00
Daniel Schwierzeck
ed53010441 MIPS: bootm_qemu_mips.c: make checkpatch.pl clean
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-06-03 23:46:04 +02:00
Daniel Schwierzeck
e51a6b7a6c MIPS: bootm.c: make checkpatch.pl clean
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-06-03 23:46:04 +02:00
Joe Hershberger
10cbe3b6a4 net: Fix remaining API interface breakage
These are all the files which use the API incorrectly but did not get
built using MAKEALL -a powerpc|arm.  I have no compiler for them, but
the remaining issues should be far less than without this patch.

Any outstanding issues are left to the maintainers of boards that use
these drivers.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-05-23 14:19:21 -05:00
Mike Frysinger
de30122bb5 net: move bootfile init into eth_initialize
All arches init this the same way, so move the logic into the core
net code to avoid duplicating it everywhere else.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2012-05-15 17:32:33 -05:00
Mike Frysinger
50a47d0523 net: punt bd->bi_ip_addr
This field gets read in one place (by "bdinfo"), and we can replace
that with getenv("ipaddr").  After all, the bi_ip_addr field is kept
up-to-date implicitly with the value of the ipaddr env var.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2012-05-15 17:32:05 -05:00
Daniel Schwierzeck
6cb461b4f1 MIPS: fix endianess handling
Make endianess of target CPU configurable. Use the new config
option for dbau1550_el and pb1000 boards.

Adapt linking of standalone applications to pass through
endianess options to LD.

Build tested with:
 - ELDK 4 mips_4KC- and mips4KCle
 - Sourcery CodeBench Lite 2011.03-93

With this patch all 26 MIPS boards can be compiled now in one step by
running "MAKEALL -a mips".

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-04-02 15:54:53 +02:00
Daniel Schwierzeck
979cfeaf36 MIPS: fix inconsistency in config option for cache operation mode
Commit ab2a98b117 missed to
use the new config option in dcache_enable().

Fix this to avoid inconsistencies if someone wants to disable
and enable D-caches.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-04-02 15:54:53 +02:00
Daniel Schwierzeck
71919cf153 MIPS: board.c: fix init of flash data in bd_info
Boards with CONFIG_SYS_NO_FLASH should not forced to define
CONFIG_SYS_FLASH_BASE. In this case the flash data in bd_info
should be initialized with 0 like the other archs do.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-04-02 15:54:52 +02:00
Mike Frysinger
5b84dd67cf usb: replace wait_ms() with mdelay()
Common code has a mdelay() func, so use that instead of the usb-specific
wait_ms() func.  This also fixes the build errors:

ohci-hcd.c: In function 'submit_common_msg':
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1519:9: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1816:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1827:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1844:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1563:11: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1583:9: sorry, unimplemented: called from here
make[1]: *** [ohci-hcd.o] Error 1

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Marek Vasut <marex@denx.de>
2012-03-19 00:08:16 +01:00
Simon Glass
770605e4f9 bootstage: Replace show_boot_progress/error() with bootstage_...()
These calls should not be made directly any more, since bootstage
will call the show_boot_...() functions as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-03-18 21:41:39 +01:00
Simon Glass
578ac1e9ba bootstage: Make use of BOOTSTAGE_ID_RUN_OS in show_boot_progress()
This changes the number 15 as used in boot_stage_progress() to use the
new name provided for it. This is a separate patch because it touches
so many files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2012-03-18 20:45:57 +01:00
Wolfgang Denk
d3042862f6 arch/mips/lib/board.c: Fix GCC 4.6 build warning
Fix:
board.c: In function 'board_init_r':
board.c:262:8: warning: unused variable 's' [-Wunused-variable]

(raised for configurations without ethernet support like
vct_premium_small)

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2011-12-08 21:01:15 +01:00
Wolfgang Denk
cc257e42f3 arch/mips/lib/board.c: make (mostly) checkpatch clean
Fix all errors and all warnings except for "externs should be avoided"
which could require more extensive changes.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2011-12-08 21:01:11 +01:00
Simon Glass
98e4611f10 mips: Use getenv_ulong() in place of getenv(), strtoul
This changes the board code to use the new getenv_ulong() function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-10-23 23:33:19 +02:00
Anton Staaf
72d4dd4159 mips: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
2011-10-23 20:50:43 +02:00
Anatolij Gustschin
c4c9fbebae consolidate mdelay by providing a common function for all users
There are several mdelay() definitions in the driver and
board code. Remove them all and provide a common mdelay()
in lib/time.c.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-22 01:16:08 +02:00
Xiangfu Liu
80421fcc3e MIPS: Ingenic XBurst Jz4740 processor support
Jz4740 is a multimedia application processor targeting for mobile
devices like e-Dictionary, eBook, portable media player (PMP) and
GPS navigator.  Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
(JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
provides high integration, high performance and low power consumption.

JzRISC incorporated in Jz4740 is the advanced and power-efficient
32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
D-Cache, and can operate at speeds up to 400 MHz.

On-chip modules such as LCD controller, embedded audio codec, multi-
channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
suite of peripherals for multimedia application.  NAND controller
(SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
also available.

For more info about Ingenic XBurst Jz4740:
  http://en.ingenic.cn/eng/
  http://www.linux-mips.org/wiki/Ingenic

This patch introduces XBurst CPU support in U-Boot.  It's compatible
with MIPS32, but requires a bit different cache maintenance, timer
routines, and boot mechanism using USB boot tool, so XBurst support
can go into a separate new home, cpu/xburst/.

Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-10-10 22:06:12 +09:00
Mike Frysinger
e2a53458a7 net: drop !NET_MULTI code
This is long over due.  All but two net drivers have been converted, but
those have now been dropped.

The only thing left to do is actually delete all references to NET_MULTI
and code that is compiled when that is not defined.  So here we scrub the
core code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-05 22:22:16 +02:00
Mike Frysinger
476af299b0 image: push default arch values to arch headers
This pushes the ugly duplicated arch ifdef lists we maintain in various
image related files out to the arch headers themselves.

Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-05 22:22:15 +02:00
Graeme Russ
9558b48af0 console: Implement pre-console buffer
Allow redirection of console output prior to console initialisation to a
temporary buffer.

To enable this functionality, the board (or arch) must define:
 - CONFIG_PRE_CONSOLE_BUFFER - Enable pre-console buffer
 - CONFIG_PRE_CON_BUF_ADDR - Base address of pre-console buffer
 - CONFIG_PRE_CON_BUF_SZ - Size of pre-console buffer (in bytes)

The pre-console buffer will buffer the last CONFIG_PRE_CON_BUF_SZ bytes
Any earlier characters are silently dropped.
2011-10-05 22:03:09 +02:00
Yao Cheng
dc344589de MIPS: mips32: fix wrong loop bound in flush_cache()
The issue is found when calling flush_cache() with zero "size" argument.
The bound of loop is miscalculated in this case and flush_cache() enters
a wrong flushing loop.

Signed-off-by: Yao Cheng <saturdaycoder@gmail.com>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-09-03 10:43:45 +09:00
Daniel Schwierzeck
ab2a98b117 MIPS: make cache operation mode configurable
Currently the cache operation mode is hard-coded to
CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs
which operate at a different mode.

This patch makes the cache operation mode configurable via board config.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
Daniel Schwierzeck
7185adb48e MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG
This define is a board-specific config option and should be
renamed to follow the U-Boot naming convention. Additionally,
add an explaining comment for this option.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
Andreas Bießmann
09c2e90c11 unify version_string
This patch removes the architecture specific implementation of
version_string where possible. Some architectures use a special place
and therefore we provide U_BOOT_VERSION_STRING definition and a common
weak symbol version_string.

Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Peter Pan <pppeterpppan@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-07-28 17:22:53 +02:00
Graeme Russ
4769be21cc Timer: Remove reset_timer() for non-Nios2 arches 2011-07-26 14:53:30 +02:00
Graeme Russ
5c8404aff1 Timer: Remove set_timer completely 2011-07-26 14:52:17 +02:00
Shinya Kuribayashi
68cebb8027 MIPS: Move timer code to arch/mips/cpu/$(CPU)/
Current timer routines (arch/mips/lib/timer.c) are implemented assuming
that MIPS32 coprocessor (CP0) resources, Counter and Compare registers
in this case, are available.  But this doesn't always work.

We need to make sure that all MIPS-based systems don't necessarily use
CP0 counter/compare registers as time keeping resources.  And some MIPS
variant processors might come with different hardware specs with genuine
MIPS32 CP0 registers.

With this change, each $(CPU)/ directory can have its own timer code.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-10 00:12:31 +09:00
Daniel Schwierzeck
660da0947a MIPS: Introduce --gc-sections for MIPS
All architectures but MIPS are using --gc-sections on final linking.
This patch introduces that feature for MIPS to reduce the memory and
flash footprint.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Thomas Lange <thomas@corelatus.se>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-10 00:08:10 +09:00
Shinya Kuribayashi
7aa1f198c8 MIPS: Coding style cleanups on common assembly files
Fix style issues and alignments globally.  No logical changes.
- Replace C comments with AS line comments where possible
- Use ifndef where possible, rather than if !defined for simplicity
- An instruction executed in a delay slot is now indicated by a leading
  space, not by C comment

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-07 00:18:13 +09:00
Shinya Kuribayashi
522171a087 MIPS: Remove mips_cache_lock() feature
As requested in commit e1390801a3 ([MIPS]
Request for the 'mips_cache_lock()' removal), such feature is no longer
needed for current MIPS implementation of U-Boot, and no one in the tree
uses it for years.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-07 00:18:13 +09:00
Wolfgang Denk
8ae86b76c6 Make STANDALONE_LOAD_ADDR configurable per board
Rename STANDALONE_LOAD_ADDR into CONFIG_STANDALONE_LOAD_ADDR
and allow that the architecture-specific default value gets
overwritten by defining the value in the board header file.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Cc: Tsi Chung Liew <tsi-chung.liew@freescale.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-04-12 22:58:32 +02:00
Daniel Schwierzeck
ea2f0cb35c MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectory
Au1x00 is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Thomas Lange <thomas@corelatus.se>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Daniel Schwierzeck
6235df946e MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory
IncaIP is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Daniel Schwierzeck
04efda7afc MIPS: Optimize the setup of CPU optimization flags
The current MIPS CPU config.mk code always expects a MIPS 4kc
core. This is not appropiate for other CPUs and SoCs.

Replace the current MIPSFLAGS code by cc-option macro and use
-march=mips32r2 as default optimization level for all MIPS32 CPUs.

Note: Since commit f62fb99941 all
toolchains with binutils prior to v2.16 are not working anymore.
As agreed with Shinya Kuribayashi the support for those toolchains
will be dropped officially with this patch.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00