Commit Graph

65 Commits

Author SHA1 Message Date
Paul Burton
df8ec55d52 dm: ns16550: Don't map_physmem for I/O ports
If the UART is to be accessed using I/O port accessors (inb & outb) then
using map_physmem doesn't make sense, since it operates in a different
memory space. Remove the call to map_physmem when
CONFIG_SYS_NS16550_PORT_MAPPED is defined, allowing I/O port addresses
to not be mangled by the incorrect mapping.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-26 01:34:13 +02:00
Michal Simek
59b35ddd26 dm: ns16550: Add support for reg-offset property
reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Moved the new field to the end of the struct to avoid problems:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-03-17 21:27:39 -06:00
Tom Rini
e5e88c6596 Revert "dm: ns16550: Add support for reg-offset property"
This reverts commit d9a3bec682.

While this is a correct change to do long term it unfortunately breaks a
number of platforms that are using pdata and not named struct members so
they are getting all of their data after 'base' incorrect.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-02-29 10:26:20 -05:00
Michal Simek
d9a3bec682 dm: ns16550: Add support for reg-offset property
reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-22 16:21:10 +01:00
Thomas Chou
cc4228f9d6 ns16550: zap the rockchip serial compatible string
Zap the rockchip serial compatible string, because rockchip
serial has "snps,dw-apb-uart" compatible string in the dts.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
2016-01-25 10:40:04 -05:00
Simon Glass
b7e29834f1 dm: ns16550: Allow the driver to be omitted if requested
Allow the ns16550 debug UART to be used without the full driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
2016-01-12 10:19:09 -07:00
Simon Glass
fcc0a8774b dm: serial: Convert ns16550 driver to use driver model PCI API
Use the driver model version of the function to find the BAR. This updates
the fdtdec function, of which ns16550 is the only user.

The fdtdec_get_pci_bdf() function is dropped for several reasons:
- with driver model we should use 'struct udevice *' rather than passing the
   device tree offset explicitly
- there are no other users in the tree
- the function parses for information which is already available in the PCI
device structure (specifically struct pci_child_platdata which is available
at dev_get_parent_platdata(dev)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-12 10:19:09 -07:00
Simon Glass
b7e5a6439f dm: serial: ns16550: Add pre-reloc flag to the driver
For platforms that don't use device tree in SPL the only way to mark this
driver as 'required by relocation' is with the DM_FLAG_PRE_RELOC flag. Add
this to ensure that the driver is bound.

Fixes: fde7e18938 ("dm: tegra: pci: Move CONFIG_PCI_TEGRA to Kconfig")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
2015-12-05 18:22:38 -05:00
Thomas Chou
80e0614670 ns16550: change reg-shift property default to zero
Change reg-shift property default to zero. When the integer property
is missing, it should be taken as zero. This is consistent to Linux
drivers/tty/serial/of_serial.c.

The x86 and most powerpc use reg-shift of 0. Most others use reg-shift
of 2. While reg-shift of 1 is rarely used.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-05 18:22:29 -05:00
huang lin
a51dbebf30 rockchip: serial driver support rk3036
Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01 08:07:22 -07:00
Thomas Chou
4fb6055211 ns16550: zap CONFIG_NS16550_SERIAL
Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers
is completed.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-21 21:50:17 -05:00
Thomas Chou
8e62d32e5b ns16550: add generic binding to unify the drivers
Add generic binding to unify ns16550 drivers. There are
several drivers using almost the same code, such as serial_dw,
serial_keystone, serial_omap, serial_ppc, serial_rockchip,
serial_tegra.c, and serial_x86. But each is platform specific.

The key difference between these drivers is the way to get
input clock frequency. With this unified approach, fixed clock
frequency should be extracted from "clock-frequency" property of
device tree blob. If this property is not available, the macro
CONFIG_SYS_NS16550_CLK will be used. It can be a constant or a
function to get clock, eg, get_serial_clock().

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-20 20:41:29 -05:00
Thomas Chou
77d7b5cd40 ns16550: change map_sysmem to map_physmem
Change map_sysmem() to map_physmem(,,MAP_NOCACHE). Though map_sysmem()
can be used to map system memory, it might be wrong to use it for I/O
ports.  The map_physmem() serves the same purpose to translate physical
address to virtual address with the additional flag to take care of cache
property. Most drivers use map_physmem() since I/O ports access should be
uncached. As ns16550 is a driver, it should use map_physmem() rather
than map_sysmem().

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-20 20:41:29 -05:00
Simon Glass
97b0597302 debug_uart: Adjust the declaration of debug_uart_init()
We want to be able to add other common code to this function. So change the
driver's version to have an underscore before it, just like
_debug_uart_putc(). Define debug_uart_init() to call this version.

Update all drivers to this new method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-10-21 07:46:50 -06:00
Simon Glass
4e9838c102 dm: Use dev_get_addr() where possible
This is a convenient way for a driver to get the hardware address of a
device, when regmap or syscon are not being used. Change existing callers
to use it as an example to others.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2015-08-31 07:57:26 -06:00
Masahiro Yamada
0f9258228e of: clean up OF_CONTROL ifdef conditionals
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL.  We have cleansing
devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear
away the ugly logic in include/fdtdec.h:

 #ifdef CONFIG_OF_CONTROL
 # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL)
 #  define OF_CONTROL 0
 # else
 #  define OF_CONTROL 1
 # endif
 #else
 # define OF_CONTROL 0
 #endif

Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute.  It refers to
CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for
SPL.

Also, we no longer have to cancel CONFIG_OF_CONTROL in
include/config_uncmd_spl.h and scripts/Makefile.spl.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-18 13:46:05 -04:00
Simon Glass
6e780c7a7b ns16550: Improve debug UART so it can work with 32-bit access
Since Rockchip requires 32-bit serial access, add this to the driver.
Refactor a little to make this easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:28 -06:00
Simon Glass
9091400859 dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver model
This option is used by some boards, so support it with driver model. This
is really ugly - we should rewrite this driver once all users are moved to
driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Axel Lin
4f60166c90 serial: ns16550: Remove hard-coded baud_divisor setting
This was accidentally added by commit dd0b0122ba
"serial: ns16550: Add an option to specify the debug UART register shift".
Remove it.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-04-28 16:49:03 -06:00
Simon Glass
ab9fd2e83a serial: ns16550: Remove unnecessary init on UART setup
It is not necessary to write a zero baud rate to the device, and for some
chips this will cause problems. Drop this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-22 20:04:18 -06:00
Simon Glass
363e6da103 dm: ns16550: Support non-byte register spacing with driver model
Allow this driver to support boards where the register shift is not 0.
This fixes some compiler warnings which appear in that case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-22 20:03:48 -06:00
Simon Glass
dd0b0122ba serial: ns16550: Add an option to specify the debug UART register shift
This UART permits different register spacing. To support the debug UART on
devices which have a spacing other than 1 byte, allow the shift value to
be specified.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-22 20:03:41 -06:00
Joe Hershberger
0eb25b6196 common: Make sure arch-specific map_sysmem() is defined
In the case where the arch defines a custom map_sysmem(), make sure that
including just mapmem.h is sufficient to have these functions as they
are when the arch does not override it.

Also split the non-arch specific functions out of common.h

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-04-18 11:11:09 -06:00
Axel Lin
20379c115e serial: ns16550: Fix build error due to a typo
Fix trivial typo.

Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Axel Lin <axel.lin@ingics.com>
2015-03-02 08:48:00 -05:00
Simon Glass
21d004368f serial: ns16550: Support debug UART
Add debug UART functions to permit ns16550 to provide an early debug UART.
Try to avoid using the stack so that this can be called from assembler before
a stack is set up (at least on ARM and PowerPC).

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-19 06:20:28 -07:00
Simon Glass
765716744f serial: ns16550: Add access functions that don't need platdata
For the debug UART we need to be able to provide any parameters before
driver model is set up. Add parameters to the low-level access functions
to make this possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-19 06:20:28 -07:00
Bin Meng
3db886a5bf serial: ns16550: Support ns16550 compatible pci uart devices
There are many pci uart devices which are ns16550 compatible. We can
describe them in the board dts file and use it as the U-Boot serial
console as specified in the chosen node 'stdout-path' property.

Those pci uart devices can have their register be memory-mapped, or
i/o-mapped. The driver will try to use the memory-mapped register if
the reg property in the node has an entry to describe the memory-mapped
register, otherwise i/o-mapped register will be used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-01-13 07:24:57 -08:00
Gregoire Gentil
956a8bae53 ns16550.c: Fix for ns16550 driver hanging on OMAP4
The same problem that is seen on some OMAP3 is also seen on some OMAP4
so include them in the test in order to prevent some hangs during SPL.

[trini: Re-word commit message, make apply cleanly]
Signed-off-by: Tom Rini <trini@ti.com>
2014-12-04 21:28:32 -05:00
Simon Glass
1f77690e16 dm: serial: ns16550: Add a cast to the I/O operations
This generates a warning when driver model is enabled, so fix it by adding
a cast.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-23 19:45:28 -06:00
Simon Glass
11c1a87893 dm: ns16550: Correct the probe logic for platform data
The probe logic sets up the pointer to the platform data in the device
tree decode method. It should be done in the probe() method, and anyway
the device tree decode method can't be used when CONFIG_OF_CONTROL is
not enabled.

Fix these two problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
2014-10-23 19:29:07 -06:00
Simon Glass
167efe01bc dm: ns16550: Use an address instead of a pointer for the uart base
It is inconvenient to have to use casts when specifying platform data. Also
it is not strictly correct, since we should use map_sysmem() to convert an
address to a pointer.

Adjust the platform data to use an address.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
2014-10-23 19:29:07 -06:00
Simon Glass
aea2be2012 dm: serial: ns16550: Correct logic for checking for character
There is a bug in the logic which checks for an available character. This
can cause invalid characters to be received - this was noticed on
beaglebone. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
2014-10-23 19:29:07 -06:00
Simon Glass
12e431b277 dm: serial: Add driver model support for ns16550
Add driver model support so that ns16550 can support operation both with
and without driver model.

The driver needs a clock frequency so cannot stand alone unfortunately. The
clock frequency must be provided by a separate driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-10 13:00:01 -06:00
Simon Glass
8bbe33c829 dm: serial: Collect common baud rate code in ns16550
The same sequence is used in several places, so move it into a function.
Note that UART_LCR_BKSE is an alias for UART_LCR_DLAB.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-10 13:00:01 -06:00
Simon Glass
fa54eb1243 dm: serial: Move baud rate calculation to ns16550.c
Move the function that calculates the baud rate divisor into ns16550.c so
it can be used by that file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-10 13:00:01 -06:00
Masahiro Yamada
8ac22a60e2 omap: clean-up dead configs
The following configs are not defined at all.

 - CONFIG_OMAP1510
 - CONFIG_OMAP_1510P1
 - CONFIG_OMAP_SX1
 - CONFIG_OMAP3_DMA
 - CONFIG_OMAP3_ZOOM2
 - CONFIG_OMAP_INNOVATOR

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
2014-08-09 11:17:04 -04:00
Khoronzhuk, Ivan
7c38764606 keystone2: use CONFIG_SOC_KEYSTONE in common places
Use CONFIG_SOC_KEYSTONE in common places instead of defining
a lot of "if def .. || if def " for different Keystone2 SoC types.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-07-25 16:26:11 -04:00
Karicheri, Muralidharan
d57dee5787 serial: nsl16550: add hw flow control support
keystone serial hw support hw flow control. This patch
enables hw flow control for keystone EVMs as an optional
feature based on CONFIG_SERIAL_HW_FLOW_CONTROL.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
2014-05-12 15:19:45 -04:00
Vitaly Andrianov
ef509b9063 k2hk: add support for k2hk SOC and EVM
k2hk EVM is based on Texas Instruments Keystone2 Hawking/Kepler
SoC. Keystone2 SoC has ARM v7 Cortex-A15 MPCore processor. Please
refer the ti/k2hk_evm/README for details on the board, build and other
information.

This patch add support for keystone architecture and k2hk evm.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Sandeep Nair <sandeep_n@ti.com>
2014-04-17 17:24:38 -04:00
Tom Rini
456ccfdf0d TI:omap3: Drop omap3_zoom2
The omap3_zoom2 board has not been updated for a correct CONFIG_SYS_HZ
and Tom Rix's email has long been bouncing.

Signed-off-by: Tom Rini <trini@ti.com>
2014-01-07 16:41:12 -05:00
TENART Antoine
9ed6e41239 Prepare for TI816X : reuse existing code from TI814X
Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX

Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com>
[trini: Adapt for CONFIG_OMAP_COMMON changes, AM43XX]
Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15 18:38:37 -04:00
Lokesh Vutla
571804086f ARM: AM43xx: Add build support
Add AM43xx support in the required places

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15 08:51:10 -04:00
Tom Rini
7f5eef93af arm: Remove OMAP2420H4 and all omap24xx support
The omap2420H4 was the only mainline omap24xx board.  Prior to being
fixed by Jon Hunter in time for v2013.04 it had been functionally broken
for a very long time.  Remove this board as there's not been interest in
it in U-Boot for quite a long time.

Signed-off-by: Tom Rini <trini@ti.com>
2013-06-10 08:43:19 -04:00
Manfred Huber
fd2aeac560 omap3_beagle: Flush UART3 xmit on enable if TEMT is broken
Flush UART3 xmit on enable if TEMT is broken

On some OMAP3 devices when UART3 is configured for boot mode before SPL starts
only THRE bit is set. We have to empty the transmitter before initialization
starts. This patch avoids the use of CONFIG_SYS_NS16550_BROKEN_TEMT.

Signed-off-by: Manfred Huber <man.huber@arcor.de>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-04-08 11:29:05 -04:00
Matt Porter
6213a68fe8 ns16550: enable quirks for ti814x
TI814X requires the same quirks as AM33XX to be enabled.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-24 12:49:12 -04:00
Simon Glass
69e0683241 serial: ns16550: Remove unwanted cast
This cast does not seem correct, since we should be writing to a pointer,
not a ulong.

This fixes the following warning on nds32:

-ns16550.c:49: warning: passing argument 2 of 'writeb' makes pointer from integer without a cast

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-03-15 16:14:01 -04:00
Javier Martinez Canillas
7de0fe1ac3 serial/ns16550: add an option to avoid hanging on broken platforms
Some platforms (e.g. IGEPv2 board) has a broken ns16550 UART that
does not set the TEMT bit when the transmitter is empty in SPL.
This makes U-Boot to hang while waiting for TEMT to be set.

Add a new option to avoid this:

CONFIG_SYS_NS16550_BROKEN_TEMT

16550 UART set the Transmitter Empty (TEMT) Bit when all output
has finished and the transmitter is totally empty. U-Boot waits
for this bit to be set to initialize the serial console. On some
broken platforms this bit is not set in SPL making U-Boot to
hang while waiting for TEMT. Define this option to avoid it.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
2013-01-10 15:09:24 -07:00
Scott Wood
cb55b33200 serial/ns16550: wait for TEMT before initializing
TEMT is set when the transmitter is totally empty and all output has
finished.

This prevents output problems (including a loss of synchronization
observed on p2020 that persisted for quite a while) if SPL has output
still on its way out.

Signed-off-by: Scott Wood <scottwood@freescale.com>
--
v2: fixed typo in subject, and explained what the bit does in the changelog
2012-11-26 15:41:20 -06:00
Marek Vasut
f2041388bd serial: ns16550: Call usbtty_poll only in non-SPL build
Having both USBTTY and CONFIG_SERIAL_MULTI enabled in SPL, the
usbtty.c file is protected in Makefile to not be compiled into
the SPL. Yet, the ns16550 serial driver does not contain such
protection. Add it to avoid missing symbol error.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-15 11:53:58 -07:00
Mikhail Kshevetskiy
99b603e714 serial/ns16550: ns16550 has a different register layout on SOC_DA8XX
also fix NS16550_init() as we need 16x divider

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Acked-by: Sughosh Ganu <urwithsughosh@gmail.com>
Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
2012-09-01 14:58:10 +02:00