Commit Graph

8403 Commits

Author SHA1 Message Date
Simon Glass
2dcf143398 dm: video: Repurpose the 'displayport' uclass to 'display'
The current DisplayPort uclass is too specific. The operations it provides
are shared with other types of output devices, such as HDMI and LVDS LCD
displays.

Generalise the uclass so that it can be used with these devices as well.
Adjust the uclass to handle the EDID reading and conversion to
display_timing internally.

Also update nyan-big which is affected by this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
cd9c2070ea video: panel: Add a simple panel driver
Most panels are very simple - they just have a power supply and a backlight.
Add a driver which supports this and implements the enable_backlight()
method.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
f563dc1d19 dm: panel: Add a panel uclass
LCD panels can usefully be modelled as their own uclass. They can be probed
(which powers them up ready for use). If they have a backlight, this can be
enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
65fba5927c dm: backlight: Add a driver for a PWM backlight
Many backlights need to use a PWM to control the brightness. Add a driver
for this. It understands the standard device tree binding.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
363bf77acc dm: backlight: Add a backlight uclass
LCD panels normally have a backlight which can be controlled to illuminate
the LCD contents. Add a uclass to support this. Initially it only has a
method to enable the backlight.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
0e23fd81a5 pwm: rockchip: Add a PWM driver for Rockchip SoCs
Add a simple driver which implements the standard PWM uclass interface.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
fc760cb8c4 dm: pwm: Add a PWM uclass
Add a uclass that supports Pulse Width Modulation (PWM) devices. It
provides methods to enable/disable and configure the device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
d4bf91ada1 video: bridge: Allow GPIOs to be optional
Some video bridges will not have GPIOs to control reset, etc. Allow these
to be optional.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
68dcdc99c5 video: Add a function to control cache flushing
Allow the cache-flushing function of a video device to be controlled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
f1a1247d89 video: Name consoles by their number
We must use the console name in the 'stdout' variable to select the one
we want. At present the name is formed from the driver name with a suffix
indicating the rotation value.

It seems better to name them sequentially since this can be controlled by
driver order. So adjust the code to use 'vidconsole' for the first,
'vidconsole1' for the second, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
90a28470fc rockchip: spi: Remove the explicit pinctrl setting
The correct pinctrl is handled automatically so we don't need to do it in
the driver. The exception is when we want to use a different chip select
(other than 0). But this isn't used at present.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
e15af8e2cd rockchip: spi: Correct chip-enable code
At present there is an incorrect call to rkspi_enable_chip(). It should
be disabling the chip, not enabling it. Correct this and ensure that the
chip is disabled when releasing the bus.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
183a3a0f67 rockchip: spi: Implement the delays
Some devices need delays before and after activiation. Implement these
features in the SPI driver so that we will be able to enable the Chrome
OS EC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
486478282e rockchip: gpio: Implement the get_function() method
Provide this method so that 'gpio status' works fully. It now shows
whether a pin is used for input, output or some other function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
7d0c2c3feb rockchip: gpio: Read the GPIO value correctly
This function should return 0 or 1, not a mask. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
78a10b6656 rockchip: pinctrl: Implement the get_gpio_mux() method
Implement this so that the GPIO command will be able to report whether a
GPIO is used for input or output.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
63c52648e4 rockchip: pinctrl: Reduce the size for SPL
This file has many features that are not needed by SPL. Use #ifdef to
remove the unused features and reduce the code size.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
5ddf5d7705 rockchip: clk: Make rkclk_get_clk() SoC-specific
The current method assumes that clocks are numbered from 0 and we can
determine a clock by its number. It is safer to use an ID in the clock's
platform data to avoid the situation where another clock is bound before
the one we expect.

Move the existing code into rk3036 since it still works there. Add a new
implementation for rk3288.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
2b9fe111ec rockchip: spi: Correct the bus init code
Two of the init values are created locally so cannot be out of range.
The masking is unnecessary and in one case is incorrect. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
28a943c110 rockchip: spi: Remember the last speed to avoid re-setting it
Rather than changing the clock to the same value on every transaction,
remember the last value and don't adjust the clock unless it is necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
a4b10c088c dm: clk: Add a simple version of clk_get_by_index()
This function adds quite a bit of code to SPL and we probably don't need
all the features in SPL. Add a simple version (for SPL only) to save space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
364809de31 dm: power: Allow regulators to not implement all operations
Some regulators will not implement any operations (e.g. fixed regulators).
This is not an error, so allow the autoset process to continue when one
of these regulators is found.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
7d5779993d dm: power: Tidy up debugging output and return values
The currect PMIC debugging is a little confusing. Adjust it so that it is
clear whether the operation succeeded or failed. Also, avoid creating a new
error return value when a perfectly good one is already available.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
1b30d61d78 dm: core: Export uclass_find_device_by_of_offset()
It is sometimes useful to be able to find a device before probing it,
perhaps to set up some platform data for it. Allow finding by of_offset
also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
77eaa19e73 dm: pinctrl: Add a way for a GPIO driver to obtain a pin function
GPIO drivers want to be able to show if a pin is enabled for input, output,
or is being used by another function. Some drivers can easily find this
and the code is included in the driver. For some SoCs this is more complex.
Conceptually this should be handled by pinctrl rather than GPIO. Most
pinctrl drivers will have this feature anyway.

Add a method by which a GPIO driver can obtain the pin mux value given a
GPIO reference. This avoids repeating the code in two places.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
1f2b4b06ae dm: power: Allow regulators to be omitted from SPL
For some boards the pmic interface is useful but the regulator interface
(which comes with it) is too large. Allow them to be separated such that
SPL can decide which it needs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
d178a1c5b2 spi: Correct device tree usage in spi_flash_decode_fdt()
This function currently searches the entire device tree for a node that
it thinks is relevant. But the node is known and is passed in. Correct the
code and enable it only with driver model, since only driver-model boards
will use it.

This avoids bringing in a large number of strings from fdtdec.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
4082fce924 dm: i2c: Allow muxes to be enabled for SPL separately
Since I2C muxes are seldom needed in SPL, and the code for this increases
the size somewhat, add a separate option to enable I2C muxes for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
d7248c42f1 cros_ec: Disable the Chrome OS EC in SPL
This is not used in SPL so don't allow it to be built there, even if I2C
is enabled in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
bea705c993 rockchip: pinctrl: Add a full pinctrl driver
We can make use of the device tree to configure pinctrl settings. Add this
support for the driver so we can use it in U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
342999f9b3 rockchip: mmc: Update the driver to use the new clock ID
We can use the new clk_get_by_index() function to get the correct clock.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
6d97786b4c rockchip: spi: Avoid setting the pinctrl twice
If full pinctrl is enabled we don't need to manually set the pinctrl in the
driver. It will happen automatically. Adjust the code to suit - we will
still use manual mode in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
71037d1ca0 rockchip: spi: Update the driver to use the new clock ID
We can use the new clk_get_by_index() function to get the correct clock.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
930bc37423 rockchip: i2c: Update the driver to use the new clock ID
We can use the new clk_get_by_index() function to get the correct clock.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
64b7faa7f9 rockchip: clock: Add a function to find a clock by ID
The current approach of using uclass_get_device() is error-prone. Another
clock (for example a fixed-clock) may cause it to break. Add a function that
does a proper search.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
4f43673e5a rockchip: clk: Add a function to get a peripheral clock rate
It is useful to be able to read the rate of a peripheral clock. Add a
handler for that.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
542635a0cf rockchip: clock: Rename the general clock variable to gclk_rate
The current name is confusing and a bit verbose. Rename it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
898d64395c rockchip: Use a separate clock ID for clocks
At present we use the same peripheral ID for clocks and pinctrl. While this
works it is probably better to use the device tree clock binding ID for
clocks. We can use the clk_get_by_index() function to find this.

Update the clock drivers and the code that uses them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
e1efec4e0a rockchip: mmc: Use a pwrseq device if available
Use the pwrseq uclass to find a suitable power sequence for the MMC device.
If this is enabled in the device tree, we will pick it up automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
a4275f5e52 rockchip: Convert the PMU IOMUX registers into an array
This is easier to deal with when using generic code since it allows us to
use a register index instead of naming each register.

Adjust it, adding an enum to improve readability.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
5fd6badbd2 dm: Add a power sequencing uclass
Some devices need special sequences to be used when starting up. Add a
uclass for this. Drivers can be added to provide specific features as
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
e1227764cd power: Add support for RK808 regulators
Add regulator support for the RK808 PMIC. It integrated 4 BUCKs and 8 LDOs
all of which are supported by this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
2a4febfd91 power: Add base support for the RK808 PMIC
This Rockchip PMIC provides features suitable for battery-powered
applications. It is commonly used with Rockchip SoCs.

Add a driver which provides register access. The regulator driver will use
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
52db39a22b dm: pinctrl: Add a function to parse PIN_CONFIG flags
Add a function which produces a flags word from a few common PIN_CONFIG
settings. This is useful for simple pinctrl drivers that don't need to worry
about drive strength, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
0379597e55 dm: core: Don't set pinctrl for pinctrl devices
There is sort-of race condition when a pinctrl device is probed. The pinctrl
function is called which may end up using the same device as is being
probed. This results in operations being used before the device is actually
probed.

For now, disallow pinctrl operations on pinctrl devices while probing. An
alternative solution would be to move the operation to later in the
device_probe() function (for pinctrl devices only) but this needs more
thought.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Jeffy Chen
9d19e5d3da rockchip: rk3036: Bind GPIO banks
Call dm_scan_fdt_node() in rk3036 pinctrl uclass binding.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-21 20:04:04 -07:00
Simon Glass
e70cc43831 dm: clk: Add support for decoding clocks from the device tree
Add a method which can locate a clock for a device, given its index. This
uses the normal device tree bindings to return the clock device and the
first argument which is normally used as a peripheral ID in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-21 19:47:29 -07:00
Masahiro Yamada
b21e20b255 clk: add fixed rate clock driver
This commit intends to implement "fixed-clock" as in Linux.
(drivers/clk/clk-fixed-rate.c in Linux)

If you need a very simple clock to just provide fixed clock rate
like a crystal oscillator, you do not have to write a new driver.
This driver can support it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-01-21 19:46:47 -07:00
Tom Rini
6905f4d3c7 Merge git://git.denx.de/u-boot-dm 2016-01-21 11:49:49 -05:00
Jelle van der Waa
9d0826879e sunxi: Add support for the I2C controller which is part of the PRCM
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
[hdegoede@redhat.com: Minor cleanups]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

applied with fixing 2 checkpatch warnings:
WARNING: please, no space before tabs

Signed-off-by: Heiko Schocher <hs@denx.de>
2016-01-21 07:30:01 +01:00