Commit Graph

15 Commits

Author SHA1 Message Date
oliver@schinagl.nl
cebf3f558e net: phy: realtek: Only force master mode on rtl8211b/c
Commit 525d187af ("net: phy: Optionally force master mode for RTL PHY")
added the define to force the PHY into master mode. Unfortunatly this is
an all or nothing switch. So it applies to either all PHY's or no PHY's.

The bug that define tried to solve was a buggy PLL in the RTL8211C only.

The Olimex OLinuXino Lime2 has gotten an upgrade where the PHY was
replaced with an RTL8211E. With this define however, both lime2 boards
are either forced to master mode or not. We could of course have a
binary for each board, but the following patch fixes this by adding a
'quirk' to the flags to the rtl8211b and rtl8211c only. It is now
possible to force master mode, but only have it apply to the rtl8211b
and rtl8211c.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-12-08 10:36:22 -06:00
oliver@schinagl.nl
cbe40e116d net: phy: realtek: make define more consistent
All internal defines in the realtek phy are with a small X,
except MIIM_RTL8211X_CTRL1000T_MASTER. Make this more consistent

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-12-08 10:36:22 -06:00
oliver@schinagl.nl
020f67628d net: phy: realtek: Use the BIT() macro
The BIT macro is the preferred method to set bits.
This patch adds the bit macro and converts bit invocations.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-12-08 10:36:21 -06:00
Michal Simek
b733c278d7 net: phy: Handle phy_startup() error codes properly
Propagate error code from genphy_update_link() to phy startup().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2016-05-24 13:17:59 +02:00
Karsten Merker
563d8d9358 net: phy: Realtek RTL8211B/C PHY ID fix
The RTL8211B_driver structure in drivers/net/phy/realtek.c contains a
wrong PHY ID (0x1cc910 instead of 0x1cc912) in the uid field.

The lowest four bits of the PHY ID encode the chip revision (B+C/D/E/F)
of the RTL8211 and the code originally applied a mask of 0xfffff0 to
the PHY ID, so that matching the PHY ID to the appropriate driver code
was only done on the chip type (RTL8211), but not on a specific
revision.

After introduction of support for the RTL8211E, which needed another
startup function than the older chip revisions, commit
4220504767 changed the mask to 0xffffff
to make the chip revision relevant for the match, but didn't provide
the now-relevant lower bits of the uid field for the RTL8211B/C.

Fix this by setting the full PHY ID in the RTL8211B_driver uid field.

Fixes: 4220504767 ("net/phy: realtek: Fix the PHY ID mask to ensure the correct Realtek PHY is detected")
Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-04-02 19:26:08 -04:00
Michael Haas
525d187afb net: phy: Optionally force master mode for RTL PHY
This patch introduces CONFIG_RTL8211X_PHY_FORCE_MASTER. If this
define is set, RTL8211x PHYs (except for the RTL8211F) will have their
1000BASE-T master/slave autonegotiation disabled and forced to master
mode.

This is helpful for PHYs like the RTL8211C which produce unstable links
in slave mode. Such problems have been found on the A20-Olimex-SOM-EVB
and A20-OLinuXino-Lime2.

There is no proper way to identify affected PHYs in software as the
RTL8211C shares its UID with the RTL8211B. Thus, this fix requires
the introduction of an #ifdef.

CC: fradav@gmail.com
CC: merker@debian.org
CC: hdegoede@redhat.com
CC: ijc@hellion.org.uk
CC: joe.hershberger@ni.com

Signed-off-by: Michael Haas <haas@computerlinguist.org>
Tested-by: Karsten Merker <merker@debian.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-03-31 14:29:11 +02:00
Michal Simek
6a10bc5be8 net: phy: realtek: Use generic genphy_parse_link() for RTL8211E
The problem with current implementation is that SPDDONE bit is 1
but link bit is zero. That's why phydev->link is setup to 0
which ending up in driver failure that link is not up.

Log:
Zynq> dhcp
ethernet@e000b000 Waiting for PHY auto negotiation to complete.......
done
ethernet@e000b000: No link.

There is at least 1ms delay between spddone bit and link up.

Use genphy_read_status() instead of realtek implemenation which is
working with page 11. Linux driver is also using generic implementation.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-02-22 16:37:50 +01:00
Shengzhou Liu
90712741c9 net/phy: set led for rtl8211f phy
Initialize LCR rigister to configure
green LED for Link, yellow LED for Active.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2015-08-11 13:20:34 -05:00
Shengzhou Liu
793ea94770 net/phy: refactor RTL8211F initialization
RTL8211F needs to enalbe TXDLY for RGMII during
phy initialization, so move it to rtl8211f_config
for early initialization.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-05-19 13:33:21 -05:00
Shengzhou Liu
3d6af748eb net/phy: Add support for realtek RTL8211F
RTL8211F has different registers from RTL8211E.
This patch adds support for RTL8211F PHY which
can be found on Freescale's T1023 RDB board.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-05-19 13:33:20 -05:00
Codrin Ciubotariu
3cee138892 net: phy: realtek: Disable interrupt on Realtek Ethernet PHY drivers
Some Realtek Ethernet PHYs, like RTL8211D(G/N) and RTL8211E(G), have
interrupts enabled by default. If the interrupt is not treated later by
the OS and the PHY's interrupt line is enabled and shared with other
interrupts, the system will get an interrupt storm. This patch disables
the interrupt for PHY devices that use one of the current Realtek
Ethernet PHY drivers. Some of Realtek Ethernet PHYs, such as RTL8211B(L)
have the interrupt masked. In this case, the functionality of the PHY
should not be afected since this patch brings INER and INSR registers to
their default values.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-20 17:57:11 -05:00
Bhupesh Sharma
4220504767 net/phy: realtek: Fix the PHY ID mask to ensure the correct Realtek PHY is detected
The 'get_phy_driver' code in 'drivers/net/phy/phy.c' uses the following
method to determine which driver is to be loaded for a particular PHY
module:

list_for_each(entry, &phy_drivers) {
	drv = list_entry(entry, struct phy_driver, list);
	if ((drv->uid & drv->mask) == (phy_id & drv->mask))
		return drv;
}

This means that a drv->mask of 0xfffff0 will return incorrect phy driver
for the logic above, even if the drv->uid is anything other than
something ending with a 0x0.

For e.g. if the RTL8211E drv->uid is 0x1cc915 and drv->mask is 0xffffff
and the RTL8211B drv->uid is 0x1cc910 and drv->mask is 0xffffff0, then
the phy driver selected will always be RTL8211B even though the
underlying phy connected on the board is a 8211E module.

This patch fixes this issue.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2013-11-22 16:50:51 -06:00
Bhupesh Sharma
c624d168bf net: phy/realtek: Add support for RTL8211DN and RTL8211E phy modules
This patch adds support for Realtek PHY modules RTL8211DN and
RTL8211E (variants: RTL8211E-VB-CG, RTL8211E-VL-CG, RTL8211EG-VB-CG),
which can be found on Freescale's T1040RDB boards.

To make the driver more generic across 8211 family, a generic name 8211x
is added for macros and function names.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-19 12:34:19 -05:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Andy Fleming
9082eeac5d phylib: Add a bunch of PHY drivers from tsec
The tsec driver had a bunch of PHY drivers already written. This
converts them all into PHY Lib drivers, and serves as the first
set of PHY drivers for PHY Lib.

While doing that, cleaned up a number of magic numbers (though
not all of them, as PHY vendors like to keep their numbers as
magical as possible).  Also, noticed that almost all of the
vitesse/cicada PHYs had the same config/parse/startup functions,
so those have been collapsed into one.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:34 -05:00