3 Commits

Author	SHA1	Message	Date
Sagar Shrikant Kadam	cba0635386	riscv: sifive: fu540: set serial environment variable from otp ... This patch sets the serial# environment variable by reading the board serial number from the OTP memory region. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>	2019-09-03 09:29:54 +08:00
Anup Patel	9f2a0c0f38	riscv: sifive: fu540: Setup ethaddr env variable using OTP ... This patch extends SiFive FU540 board support to setup ethaddr env variable based on board serialnum read from OTP. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>	2019-07-19 14:24:52 +08:00
Anup Patel	3fda0262c3	riscv: Add SiFive FU540 board support ... This patch adds SiFive FU540 board support. For now, only SiFive serial, SiFive PRCI, and Cadance MACB drivers are only enabled. The SiFive FU540 defconfig by default builds U-Boot for S-Mode because U-Boot on SiFive FU540 will run in S-Mode as payload of BBL or OpenSBI. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>	2019-02-27 09:12:33 +08:00