Commit Graph

16322 Commits

Author SHA1 Message Date
Sam Shih
25273dbd57 mmc: add mmc and sd support for MT7622
This patch add mmc and sd support for Mediatek MT7622 SoCs

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
abb65f123c power: domain: add power domain support for MT7622
This patch add power domain support for Mediatek MT7622 SoCs

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
d8588ba55f clk: mediatek: fix clock-rate overflow problem
This patch fix clock-rate overflow problem in mediatek
clock driver common part.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
72ab603b20 clk: mediatek: add driver for MT7622
This patch add clock driver for MediaTek MT7622 SoC.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
cf400b63b4 pinctrl: mediatek: add support for different pinctrl
Due to the pinctrl hardware of MT7622 is difference from others
SoC which using the common part of mediatek pinctrl.
So we need to modify the common part of mediatek pinctrl.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
a430149c99 pinctrl: mediatek: add driver for MT7622
This patch add Pinctrl driver for MediaTek MT7622 SoC.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
ce0069ed95 phy: phy-mtk-tphy: make ref clock optional
If make the ref clock optional, no need refer to fixed-clock when
the ref clock is always on or comes from oscillator directly.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
3b6351a475 phy: phy-mtk-tphy: remove the check of -ENOSYS
No need check -ENOSYS anymore after add dummy_enable() for
fixed-clock.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
6bf6d81c11 clk: fixed_rate: add dummy enable() function
This is used to avoid clk_enable() return -ENOSYS.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
d646420e29 clk: add APIs to get (optional) clock by name without a device
Sometimes we may need get (optional) clock without a device,
that means use ofnode.
e.g. when the phy node has subnode, and there is no device created
for subnode, in this case, we need these new APIs to get subnode's
clock.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
bd7c798605 clk: check valid clock by clk_valid()
Add valid check for clk->dev, it's useful when get optional
clock even when the clk point is valid, but its dev will be
NULL.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
0f9b2b3ddf clk: fix error check for devm_clk_get_optional()
If skip all return error number, it may skip some real error cases,
so only skip the error when the clock is not provided in DTS

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
5f82a940a0 clk: mediatek: mt7629: add support for ssusbsys
The SSUSB IP's clocks come from ssusbsys module on mt7629,
so add its driver

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
mingming lee
fb80eaa9d8 mmc: mtk-sd: fix hang when data read quickly
For CMD21 tuning data, the 128/64 bytes data may coming in very
short time, before msdc_start_data(), the read data has already
come, in this case, clear MSDC_INT will cause the interrupt disappear
and lead to the thread hang.

the solution is just clear all interrupts before command was sent.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
mingming lee
3b0397d48b mmc: mtk-sd: add support for MediaTek MT8512/MT8110 SoCs
This patch adds mmc support for MediaTek MT8512/MT8110 SoCs.
MT8512/MT8110 SoCs puts the tune register at top layer, so
need add new code to support it.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
mingming lee
51fcd56c0d pinctrl: mediatek: add driver for MT8512
Add Pinctrl driver for MediaTek MT8512 SoC.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
mingming lee
0670adb27a clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll
Add configurable pcw_chg_reg/ibits/fmin to mtk_pll to support mt8512
2020-01-16 09:39:45 -05:00
mingming lee
f62168d3c3 clk: mediatek: add set_clr_upd mux type flow
Add new set_clr_upd mux type and related operation to
mtk common clock driver to support mt8512
2020-01-16 09:39:45 -05:00
mingming lee
c196110777 clk: mediatek: add driver support for MT8512
Add clock driver for MediaTek MT8512 SoC, include topckgen,
apmixedsys and infracfg support.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sean Anderson
327bb3bc1e Add dependencies for MALLOC_F and OF_LIBFDT
Some features implicitly depended on MALLOC_F and OF_LIBFDT and would
fail at link-time if these features were not enabled.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-01-15 19:50:31 -05:00
Vignesh Raghavendra
74326a320a Kconfig: Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA
Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA. This allows to use
macros such as CONFIG_IS_ENABLED() that allow conditional compilation of
code for SPL and U-Boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-15 19:50:27 -05:00
Giulio Benetti
6a63a873b7 mmc: fsl_esdhc: add compatible for fsl, imxrt-usdhc
Add compatible "fsl,imxrt-usdhc" to make mmc working on i.MXRT platforms
with CONFIG_DM_MMC=y.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:54:00 +01:00
Giulio Benetti
a820bedc45 mmc: fsl_esdhc: make if(CONFIG_IS_ENABLED(CLK)) an #if statement
Not all architectures(i.e. i.MXRT) support mxc_get_clock() and use DM_CLK
instead. So building could result in failure due to missing
mxc_get_clock().

Make if(CONFIG_IS_ENABLED(CLK)) an #if statement.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:54:00 +01:00
Giulio Benetti
cd647fc4fb ram: add SDRAM driver for i.MXRT SoCs
Add SDRAM driver for i.MXRT SoCs.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:54:00 +01:00
Giulio Benetti
c32449a161 serial_lpuart: add support for i.MXRT
Add i.MXRT compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.

Also according to RM, the Receive RX FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08 as done
for i.MX8. It needs also to set baudrate the same way as i.MX8 does.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:54:00 +01:00
Giulio Benetti
55631db8bd serial_lpuart: add clock enable if CONFIG_CLK is defined
This driver assumes that lpuart clock is already enabled before probing
but using DM only lpuart won't be automatically enabled so add
clk_enable() when probing if CONFIG_CLK is defined. If clock is not
found, because DM is not used, let's emit a warning and proceed, because
serial clock could also be already enabled by non DM code. If clock is
found but cna't be enabled then return with error.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:54:00 +01:00
Giulio Benetti
abd98e05a2 gpio: mxc_gpio: add support for i.MXRT1050
Add i.MXRT1050 support, there are 5 GPIO banks.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:53:59 +01:00
Giulio Benetti
916ce98127 pinctrl: add i.MXRT driver
Add i.MXRT pinctrl driver.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:53:59 +01:00
Giulio Benetti
4ca28e98ac clk: imx: add i.IMXRT1050 clk driver
Add i.MXRT1050 clk driver support.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:53:59 +01:00
Giulio Benetti
824c371f9b clk: imx: pfd: add set_rate()
Implement set_rate() for pfd.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-01-14 22:53:59 +01:00
Giulio Benetti
efadf790f3 clk: imx: pllv3: add support for PLLV3_AV type
Add support for PLLV3 AV type.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:53:59 +01:00
Giulio Benetti
d0ceb93547 clk: imx: pllv3: add PLLV3_SYS support
Add PLLV3_SYS support by adding set/get_rate() for PLLV3_SYS but keeping
generic enable()/disable(). Add a different driver because ops are
different respect to GENERIC/USB.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-01-14 22:53:59 +01:00
Giulio Benetti
9841fee581 clk: imx: pllv3: add set_rate() support
Add generic set_rate() support.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-01-14 22:53:59 +01:00
Giulio Benetti
cbb20014a3 clk: imx: pllv3: add disable() support
Add disable() support.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-01-14 22:53:59 +01:00
Giulio Benetti
f4b7094250 clk: imx: pllv3: add enable() support
Before set_rate() pllv3 needs enable() to power the pll up.
Add enable() taking into account different power_bit and
different powerup_set, because some pll needs its power_bit to be
set or reset to be powered on.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:53:59 +01:00
Giulio Benetti
4abd8076c8 clk: imx: pllv3: set div_mask differently if PLLV3 is GENERIC or USB
div_mask is different for GENERIC and USB pll, so set it according.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-01-14 22:53:59 +01:00
Giulio Benetti
16faa599e6 clk: imx: pllv3: register PLLV3 GENERIC and USB as 2 different clocks
Better to register the 2 clock as 2 different drivers because they work
slightly differently depending on power_bit and powerup_set bits coming
on next patches.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-01-14 22:53:59 +01:00
Anatolij Gustschin
f35237e1e4 clk: imx8qxp: extend to support getting I2C IPG clock
Since commit d02be21d30 ("i2c: imx_lpi2c: add ipg clk") getting
I2C clocks doesn't work. Add I2C IPG clock IDs to related switch
statements to fix it.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-01-14 22:48:37 +01:00
Fabio Estevam
29230f389d mmc: fsl_esdhc_imx: Handle the "broken-cd" property
When no GPIO is used to read the card detect status the following
error is seen:

MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... MMC: no card present
*** Warning - No block device, using default environment

Fix it by handling the "broken-cd" property in the same way
that drivers/mmc/sdhci.c does, which considers that the SD card
is present when the "broken-cd" property is passed.

Tested on a imx6ul-evk board.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-01-14 22:47:15 +01:00
Heinrich Schuchardt
27a38a6e71 virtio: fix typo devicd
%s/devicd/device

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-01-10 14:18:26 -05:00
Frank Wunderlich
36b8b5d3ad poweroff: add poweroff for mt6323 pmic
this adds poweroff to bananapi r2 / mt7623 / mt6323 pmic

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-01-10 10:25:13 -05:00
Han Nandor
0b326fc296 rtc: add support for DS3232 device
DS3232 is an i2c RTC with 236 bytes of battery-backed SRAM.

Add an RTC driver for DS3232 device, which provides time and
date support. Also read and write functions are provided,
which can be used to access the SRAM memory.

Signed-off-by: Nandor Han <nandor.han@vaisala.com>
2020-01-10 10:25:13 -05:00
Robert Beckett
ae3d38f318 bootcount: add a DM i2c eeprom backing store for bootcount
This driver allows the use of i2c eeprom device or partition as backing
store for boot counter values with DM enabled.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-01-10 10:25:13 -05:00
Angelo Durgehello
48f885ae40 drivers: mcfmii: add dm support
Add specific dm code, but maintaining this driver as is, so more in the
shape of a mii library. Can be moved to dm in a further step.

Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-10 10:25:13 -05:00
Angelo Durgehello
05ffdc85ca drivers: fsl_mcdmafec: conversion to dm
Full conversion to dm for all boards, legacy code removed.

Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-10 10:25:13 -05:00
Angelo Durgehello
a7bcace28a drivers: mcffec: conversion to dm
Full conversion to dm for all boards, legacy code removed.

Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-10 10:25:13 -05:00
Angelo Durgehello
080bcc5cc1 drivers: net: add mcf fec dm Kconfig support
Add ColdFire fec to Kconfig.

Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-10 10:25:13 -05:00
Tom Rini
c00bd81ae0 Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-mpc83xx
- A small PR with MC8309 fixes from Rasmus.
2020-01-09 13:42:43 -05:00
Tom Rini
d6b92b9742 dm: Increased separation of ofdata_to_platdata() and probe methods
-----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAl4WGTURHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIreaB9wf+P/DA1udn1JKSL7sGkqzXlWGtC6qTU5eY
 em6GpotS3BiJx40vvKCYc1LbVbVEwXNKvs0AcxvqTxA+9ZiNAFERjbtmxPaqFUHe
 +vBcqTkYOSOIoSkWTAK+leqVirfGQULdLhITI7sHoF+37UbsDKlSlHjHQZ4XL9Xn
 fey1eGNaT+QThJ23GTZtZJAHUzoK870+qUhkqifUdHpvnxOJ/j75/AU7zNYlJJHW
 12H3DqeoBRnQU0sPsyY/4Bm0e5+GalYMS9XCcWKxxFqPh7/NQoV7Z7yqvKsm7KXc
 2VsZk8D+3lU4486JKpfOeCcdUCfgNPSR35AQwQttzNNc9nfYJRpfxA==
 =56sP
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-8jan20' of git://git.denx.de/u-boot-dm

dm: Increased separation of ofdata_to_platdata() and probe methods
2020-01-09 08:52:21 -05:00
Tom Rini
a74a2134b2 Merge branch 'master' of git://git.denx.de/u-boot-usb
- DFU updates
2020-01-09 08:51:57 -05:00