brain-hackers_pepepper-mirror/u-boot-brain
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3 Commits

Author SHA1 Message Date
Heiko Stübner
f4f57c58b5 rockchip: rk3188: Setup the armclk in spl 
The armclk starts in slow mode (24MHz) on the rk3188, which results in U-Boot
startup taking a lot of time (U-Boot itself, but also the rc4 decoding done
in the bootrom).

With default pmic settings we can always reach a safe frequency of 600MHz
which is also the frequency the proprietary loader left the armclk at,
without needing access to the systems pmic.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
 2017-04-04 20:01:57 -06:00
Kever Yang
232cf96222 rockchip: spl: use spl_early_init() instead of spl_init() 
Rockchip spl driver needs using spl_early_init().

Fixes: b3d2861e (spl: Remove overwrite of relocated malloc limit)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
 2017-04-04 20:01:57 -06:00
Heiko Stübner
df9041ec72 rockchip: rk3188: Add main, spl and tpl boards 
The rk3188 needs 3 U-Boot stages: a tpl living in 1KB of sram, a spl
the resides in the rest of the sram and loads the regular U-Boot living
in regular ram.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
 2017-03-16 16:03:45 -06:00