Commit Graph

791 Commits

Author SHA1 Message Date
Patrick Delaunay
1ddf544e63 spi: stm32_qspi: avoid warnings when building with W=1 option
This patch solves warnings detected by setting W=1 when building.

Warnings type detected:
 - [-Wtype-limits]
 - [-Wsign-compare]

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:57 +02:00
Tudor Ambarus
24c8ff4684 spi: Add Atmel QuadSPI driver
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-09 09:26:43 +03:00
Tom Rini
c3f43185ee Merge branch 'master' of git://git.denx.de/u-boot-spi
- Drop zipitz2 board (Tom)
- Add DEPRECATED option (Tom)
- Mark legacy or non-dm drivers as DEPRECATED (Jagan)
2019-06-17 11:32:22 -04:00
Jagan Teki
ea73ec08d1 spi: Kconfig: Mark LPC32XX_SSP as DEPRECATED
Mark LPC32XX_SSP as DEPRECATED, this so the resulting build shows
warning for deprecated configuration enabled and associated code
will remove in v2019.07 release.

Cc: Albert ARIBAUD <albert.aribaud@3adev.fr>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Sylvain Lemieux <slemieux@tycoint.com>
[trini: Switch to DEPRECATED]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-13 12:51:06 +05:30
Jagan Teki
32f70d67c7 spi: Kconfig: Mark SOFT_SPI as DEPRECATED
Mark SOFT_SPI as DEPRECATED, this so the resulting build shows
warning for deprecated configuration enabled and associated code
will remove in v2019.07 release.

Cc: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[trini: Switch to DEPRECATED]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-13 12:51:06 +05:30
Jagan Teki
e124759289 spi: Kconfig: Mark SH_SPI as DEPRECATED
Mark SH_SPI as DEPRECATED, this so the resulting build shows
warning for a deprecated configuration enabled and associated code
will remove in v2019.07 release.

Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[trini: Switch to DEPRECATED]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-13 12:51:06 +05:30
Jagan Teki
d5ded320a1 spi: Kconfig: Mark MXS_SPI has DEPRECATED
Mark MXS_SPI as DEPRECATED, this so the resulting build shows
warning for broken configuration enabled and associated code
will remove in v2019.07 release.

Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[trini: Switch to DEPRECATED]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-13 12:51:06 +05:30
Tom Rini
2702646bc0 - Add Ethernet support for STM32MP1
- Add saveenv support for STM32MP1
 - Add STM32MP1 Avenger96 board support
 - Add SPI driver suport for STM32MP1
 - Add watchdog support for STM32MP1
 - Update power supply check via USB TYPE-C for STM32MP1 discovery board
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Merge tag 'u-boot-stm32-20190606' of https://github.com/pchotard/u-boot

- Add Ethernet support for STM32MP1
- Add saveenv support for STM32MP1
- Add STM32MP1 Avenger96 board support
- Add SPI driver suport for STM32MP1
- Add watchdog support for STM32MP1
- Update power supply check via USB TYPE-C for STM32MP1 discovery board
2019-06-11 17:22:22 -04:00
Tom Rini
529faf80c3 u-boot-imx-20190612
--------------------
 
 - Board fixes:
 	- imx6logic
 	- wandboard
 	- mx6sabre boots again
 	- imx8qm_mek
 	- pico-* boards
 	- Toradex apalis / colibri
 	- engicam imx6 (environment)
 	- KP MX53
 	- opos6ul
 - Switch to DM:
 	- vining2000
 	- dh MX6
 	- Toradex colibri i.MX7
 	- Novena
 - Security : fix CSF size for HAB
 - Other:
       - imx: fix building for i.mx8 without spl
       - pcie and switch to DM
 
       mx6sabreauto: Enable SPL SDP support
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Merge tag 'u-boot-imx-20190612' of git://git.denx.de/u-boot-imx

u-boot-imx-20190612
--------------------

- Board fixes:
	- imx6logic
	- wandboard
	- mx6sabre boots again
	- imx8qm_mek
	- pico-* boards
	- Toradex apalis / colibri
	- engicam imx6 (environment)
	- KP MX53
	- opos6ul
- Switch to DM:
	- vining2000
	- dh MX6
	- Toradex colibri i.MX7
	- Novena
- Security : fix CSF size for HAB
- Other:
      - imx: fix building for i.mx8 without spl
      - pcie and switch to DM

      mx6sabreauto: Enable SPL SDP support
2019-06-11 13:41:24 -04:00
Heiko Schocher
7a3faf31a7 spi: imx: work with cs greater 0
currently spi mxc driver can only handle cs 0.
Allow it to handle also cs > 0.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-06-11 10:42:48 +02:00
Heiko Schocher
2b849e1f74 spi: imx: remove doubled pointer from mxc_spi_probe
in mxc_spi_probe() plat and mxcs pointer are created:

struct mxc_spi_slave *plat = bus->platdata;
struct mxc_spi_slave *mxcs = dev_get_platdata(bus);

which have the same value. Remove plat pointer.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-06-11 10:42:48 +02:00
Tom Rini
07798764c2 Merge branch 'master' of git://git.denx.de/u-boot-spi
- mpc8xxx spi driver fixes (Mario)
- mpc8xxx spi dm conversion (Mario, Jagan)
- SPI DM Migration update (Jagan)
2019-06-10 09:43:11 -04:00
Jagan Teki
c1a3f1ee18 spi: mpc8xxx: Convert to DM
Support DM in the MPC8xxx SPI driver, and remove the legacy SPI
interface.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
67adbaef5a spi: mpc8xxx: Use get_timer
The comment before the transmission loop in conjunction with the
definition of SPI_TIMEOUT as 1000 implies that the loop is supposed to
have a timeout value of 1000 ms. But since there is no mdelay(1) or
similar in the loop body, the loop just runs 1000 times, without regard
for the time elapsed.

To correct this, use the standard get_timer functionality to properly
time out the loop after 1000 ms.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
f6fcad5f2a spi: mpc8xxx: Fix if check
Decreasing the bit length and increasing the write data pointer should
be done when there are more than 32 bit of data, not 16 bit.

This did not produce incorrect behavior, because the only time where the
two checks produce different outcomes is the case of 16 < bitlen < 32,
and in this case the subsequent transmission is the last one regardless,
hence the additional bit length decrease and write data pointer increase
has no effect anyway.

Still, the correct check is the check for "bitlen > 32", so correct this
behavior.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
a1c178e4c7 spi: mpc8xxx: Re-order transfer setup
Minize the time the adapter is disabled (via SPI_MODE_EN
clearing/setting) to just the character length setting, and only set up
the temporary data writing variable right before we need it, so there is
a more clear distinction between setting up the SPI adapter, and setting
up the data to be written.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
85fa265530 spi: mpc8xxx: Document LEN setting better
Instead of having a table right before the code implementing the length
setting for documentation, have inline comments for the if branches
actually implementing the length setting described table's entries
(which is readable thanks to the set_char_len function).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
5ccfb8a995 spi: mpc8xxx: Rename variable
The variable "char_size" holds the number of bits to be transferred in
the current loop iteration. A better name would be "xfer_bitlen", which
we rename this variable to.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
8dea61da19 spi: mpc8xxx: Make code more readable
Introduce the to_prescale_mod and set_char_len inline functions to make
the code more readable.

Note that the added "if (bitlen > 16)" check does not change the
semantics of the current code, and hence only preserves the current
error (this will be fixed in a later patch in the series).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
65f88e0408 spi: mpc8xxx: Reduce scope of loop variables
The transmission loop starts with setting some variables, which are only
used inside the loop. Reduce the scope to the loop to make the
declaration and initialization of these variables coincide.

In the case of char_size this also always initializes the variable
immediately with the final value actually used in the loop (instead of
the placeholder value 32).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
e4da4c2e0e spi: mpc8xxx: Simplify logic a bit
We do nothing in the loop if the "not empty" event was not detected. To
simplify the logic, check if this is the case, and skip the execution of
the loop early to reduce the nesting level and flag checking.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
6409c6103a spi: mpc8xxx: Get rid of is_read
Get rid of the is_read variable, and just keep the state of the "not
empty" and "not full" events in two boolean variables within the loop
body.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
76c82afef3 spi: mpc8xxx: Simplify if
Instead of having a nested if block, just have two branches within the
overarching if block to eliminate one nesting level.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
1a907e41dc spi: mpc8xxx: Use IO accessors
Accesses to the register map are currently done by directly reading and
writing the structure.

Switch to the appropriate IO accessors instead.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
6ea9395bf7 spi: mpc8xxx: Replace defines with enums
Replace pre-processor defines with proper enums, and use the BIT macro
where applicable.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
fabe6c4909 spi: mpc8xxx: Fix function names in strings
Replace the function name with a "%s" format string and the __func__
variable in debug statements (as proposed by checkpatch).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
6f3ac07ea3 spi: mpc8xxx: Fix space after cast
Fix all "superfluous space after case" style errors.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
01ac1e19df spi: mpc8xxx: Rename camel-case variables
There are three variables that have camel-case names, which is not the
preferred naming style.

Give those variables more compliant names instead.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
d93fe31020 spi: mpc8xxx: Fix comments
There are some comments on the same line as the code they document. Put
comments above the code lines they document, so the line length is not
unnecessarily increased.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
d896b7baa1 spi: mpc8xxx: Use short type names
The function signatures in the driver are quite long as is. Use short
type names (uint etc.) to make them more readable.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Patrice Chotard
a2a89b2e21 spi: stm32: Add Serial Peripheral Interface driver for STM32MP
Add SPI driver support for STM32MP SoCs family.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-06-06 17:40:17 +02:00
Angelo Dureghello
5ea3766461 drivers: spi: cf_spi: convert to driver model
Converting to driver model and removes non-dm code.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2019-05-24 08:11:57 -04:00
Angelo Dureghello
610e316d02 drivers: spi: cf_spi: add Kconfig option
This patch adds cf_spi DM Kconfig option.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2019-05-24 08:11:57 -04:00
Tom Rini
8b1d3d19be STM32 MCUs update:
_ Add MPU region for SPI NOR memory mapped region
 _ Add missing QSPI flash compatible for STM32 F7 boards
 _ Update spi-tx-bus-width and spi-rx-bus-width properties
 _ Add QSPI support for STM32F469 Discovery board
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Merge tag 'u-boot-stm32-mcu-20190514' of https://github.com/pchotard/u-boot

STM32 MCUs update:
_ Add MPU region for SPI NOR memory mapped region
_ Add missing QSPI flash compatible for STM32 F7 boards
_ Update spi-tx-bus-width and spi-rx-bus-width properties
_ Add QSPI support for STM32F469 Discovery board
2019-05-15 07:10:32 -04:00
Simon Goldschmidt
27c3e07bcb spi: designware: convert to livetree
Convert 'dw_spi_ofdata_to_platdata' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Simon Goldschmidt
46b633d7b4 spi: cadence_qspi: convert to livetree
Convert 'cadence_spi_ofdata_to_platdata' to use dev_read_* functions to
read driver parameters and 'dev_read_first_subnode'/'ofnode_read_*' to
read flash (child node) parameters.

Tested on socfpga_socrates (socfpga gen5).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Tom Rini
504bf790da Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- H6 Beelink GS1 board (Clément)
- Olimex A64-Teres-I board (Jonas)
- sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej)
- Change include order (Jagan)
- EPHY clock changes (Jagan)
- EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
2019-05-08 16:21:43 -04:00
Jagan Teki
0cbee8544b spi: atcspi200: Change include order
Like clk_get_by_index, there is requirement for
clk_get_by_index_nodev. In this case to make common
code functionalities for dev and nodev, clk_get_by_index
is trying to get the index of clock by passing ofnode
instead of actual dev like current gpio uclass does.

In these scenarios with current order of include files
the atcspi200_spi driver is unable to find CONFIG_ENV_SIZE.

In file included from arch/nds32/include/asm/u-boot.h:24,
                 from include/dm/of.h:10,
                 from include/dm/ofnode.h:12,
                 from include/clk.h:11,
                 from drivers/spi/atcspi200_spi.c:9:
include/environment.h:145:19: error: 'CONFIG_ENV_SIZE'
undeclared here (not in a function); did you mean 'CONFIG_CMD_XIMG'?
 #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE)

So, fix consists of changing the order of include files
in atcspi200_spi.c to include first common.h file.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-09 00:42:55 +05:30
Marek Vasut
b5b6656794 spi: rpc: Add support for operation without clock framework
Add ifdeffery to allow operation without the clock framework
enabled. This is required on RZ/A1, as it does not have clock
driver yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Patrice Chotard
351d2feffa spi: Kconfig: Add STM32F4 support for STM32_QSPI driver
Allow to select STM32_QSPI driver on STM32F4 SoCs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06 09:50:28 +02:00
Tom Rini
86f578ee85 - mscc: small fixes, enhance network support for Serval, Luton amd
Ocelot
 - mt7620: rename arch to more generic name mtmips
 - mips: pass initrd addresses via DT as physical addresses
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Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mips

- mscc: small fixes, enhance network support for Serval, Luton and Ocelot
- mt7620: rename arch to more generic name mtmips
- mips: pass initrd addresses via DT as physical addresses
2019-05-04 20:02:42 -04:00
Weijie Gao
16b94903e2 mips: rename mach-mt7620 to mach-mtmips
Currently mach-mt7620 contains only support for mt7628. To avoid confusion,
rename mach-mt7620 to mach-mtmips, which means MediaTek MIPS platforms.
MT7620 and MT7628 should be distinguished by SOC_MT7620 and SOC_MT7628
because they do not share the same lowlevel codes.

Dependencies of four drivers are changed to SOC_MT7628 as these drivers
are only used by MT7628.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-05-03 16:43:11 +02:00
Kever Yang
15f09a1a83 rockchip: use 'arch-rockchip' as header file path
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Philipp Tomsich
2236149e49 rockchip: spi: make optimised receive-handler unaligned-safe
To support unaligned output buffers (i.e. 'in' in the terminology of
the SPI framework), this change splits each 16bit FIFO element after
reading and writes them to memory in two 8bit transactions.  With this
change, we can now always use the optimised mode for receive-only
transcations independent on the alignment of the target buffer.

Given that we'll run with caches on, the impact should be negligible:
as expected, this has no adverse impact on throughput if running with
a 960MHz LPLL configuration.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
51a644a1b8 rockchip: spi: add driver-data and a 'rxonly_manages_fifo' flag
The SPI controller's documentation (I only had access to the RK3399,
RK3368 and PX30 TRMs) specifies that, when operating in master-mode,
the controller will stop the SCLK to avoid RXFIFO overruns and TXFIFO
underruns.  Looks like my worries that we'd need to support DMA-330
(aka PL330) to make any further progress were unfounded.

This adds a driver-data structure to capture hardware-specific
settings of individual controller instances (after all, we don't know
if all versions are well-behaved) and adds a 'master_manages_fifo'
flag to it.  The first use of said flag is in the optimised
receive-only transfer-handler, which can now request 64Kframe
(i.e. 128KByte) bursts of data on each reprogramming of CTRLR1
(i.e. every time through the loop).

This improves throughput to 46.85MBit/s (a 94.65% bus-utilisation).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
8aa6c921f7 rockchip: spi: add optimised receive-only implementation
For the RK3399-Q7 we recommend storing SPL and u-boot.itb in the
on-module 32MBit (and sometimes even larger, if requested as part of a
configure-to-order configuration) SPI-NOR flash that is clocked for a
bitrate of 49.5MBit/s and connected in a single-IO configuration (the
RK3399 only supports single-IO for SPI).

Unfortunately, the existing SPI driver is excruciatingly slow at
reading out large chunks of data (in fact it is just as slow for small
chunks of data, but the overheads of the driver-framework make it less
noticeable): before this change, the throughput on a 4MB read from
SPI-NOR is 8.47MBit/s which equates a 17.11% bus-utilisation.

To improve on this, this commit adds an optimised receive-only
transfer (i.e.: out == NULL) handler that hooks into the main transfer
function and processes data in 16bit frames (utilising the full with
of each FIFO element).  As of now, the receive-only handler requires
the in-buffer to be 16bit aligned.  Any lingering data (i.e. either if
the in-buffer was not 16-bit aligned or if an odd number of bytes are
to be received) will be handled by the original 8bit reader/wirter.

Given that the SPI controller's documentation does not guarantuee any
interlocking between the RXFIFO and the master SCLK, the transfer loop
will be restarted for each chunk of 32 frames (i.e. 64 bytes).

With this new receive-only transfer handler, the throughput for a 4MB
read increases to 36.28MBit/s (i.e. 73.29% bus-utilisation): this is a
4x improvement over the baseline.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Klaus Goger <klaus.goger@theobroma-systems.com>

Series-Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Series-Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
7e0e5c552f rockchip: spi: only wait for completion, if transmitting
The logic in the main transmit loop took a bit of reading the TRM to
fully understand (due to silent assumptions based in internal logic):
the "wait until idle" at the end of each iteration through the loop is
required for the transmit-path as each clearing of the ENA register
(to update run-length in the CTRLR1 register) will implicitly flush
the FIFOs... transmisson can therefore not overlap loop iterations.

This change adds a comment to clarify the reason/need for waiting
until the controller becomes idle and wraps the entire check into an
'if (out)' to make it clear that this is required for transfers with a
transmit-component only (for transfers having a receive-component,
completion of the transmit-side is trivially ensured by having
received the correct number of bytes).

The change does not increase execution time measurably in any of my
tests.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
b6101e906f rockchip: spi: consistently use false/true with rkspi_enable_chip
While rkspi_enable_chip is called with true/false everywhere else in
the file, one call site uses '0' to denot 'false'.
This change this one parameter to 'false' and effects consistency.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
e647decdd9 rockchip: spi: fix off-by-one in chunk size computation
The maximum transfer length (in a single transaction) for the Rockchip
SPI controller is 64Kframes (i.e. 0x10000 frames) of 8bit or 16bit
frames and is encoded as (num_frames - 1) in CTRLR1.  The existing
code subtracted the "minus 1" twice for a maximum transfer length of
0xffff (64K - 1) frames.

While this is not strictly an error (the existing code is correct, but
leads to a bit of head-scrating), fix this off-by-one situation.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
0e661b6df0 rockchip: spi: remove unused code and fields in priv
Even though the priv-structure and the claim-bus function contain
logic for 16bit frames and for unidirectional transfer modes, neither
of these is used anywhere in the driver.

This removes the unused (as in "has no effect") logic and fields.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00