Commit Graph

4 Commits

Author SHA1 Message Date
Vikram Narayanan
b29da17494 mx6: Avoid writing to read-only bits in imximage.cfg
If in case this is valid according to the latest datasheet, ignore this patch.
Acked-by: Marek Vasut <marex@denx.de>
2012-07-07 14:07:27 +02:00
Dirk Behme
03f3587822 i.MX6: arm2: Add AXI cache and Qos setting
Do the same AXI cache and Qos settings done already in the
SabreLite imximage.cfg for the ARM2 board, too.

It fixes a display flash issue caused by low priority of
the display IDMA channel.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-04-17 15:41:22 +02:00
Eric Nelson
3c057897e9 i.mx6q: mx6qarm2: Enable the usboh3 clock
Bits 0 and 1 of CCM_CCGR7 are the usboh3 clock enable bits. Enabling this
clock is necessary for the USB download.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
CC: Jason Hui <jason.hui@linaro.org>
Acked-by: Jason Hui <jason.hui@linaro.org>
2012-01-16 08:40:08 +01:00
Jason Liu
76d7f57449 i.mx: i.mx6q: add the initial support for i.mx6q ARM2 board
Add the initial support for Freescale i.MX6Q Armadillo2 board
Support: MMC boot from slot 0/1, debug UART(UART4), usdhc.

There is two MMC slots on the boards:
mmc dev 0 -> connect USDHC3 -> the lower slot on the board,
mmc dev 1 -> connect USDHC4 -> the upper slot on the board,

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
2011-12-09 17:30:10 +01:00