Commit Graph

8 Commits

Author SHA1 Message Date
Pragnesh Patel
88eec6159a riscv: sifive: fu540: Use OTP DM driver for serial environment variable
Use the OTP DM driver to set the serial environment variable.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Jagan Teki
286bcdb40f sifive: fu540: Enable spi-nor flash support
HiFive Unleashed A00 support is25wp256 spi-nor flash,
So enable the same and add test result log for future
reference.

Tested on SiFive FU540 board.

Thanks to Sagar for various use cases and tests.

[QUAD mode in dt with spi-tx-bus-width: <4>]
 pp opcode      = 0x34 [QUAD MODE]
 read opcode  = 0x6c  [QUAD MODE]
 erase opcode = 0x21

SPI-NOR:
1. erase entire flash: Pass
2. write entire flash: Pass
3. read entire flash: Pass
4. cmp 32MiB read back data: Pass
5. MMC: Booted Linux and dtb from mmc

[SPI MODE in dt with spi-tx-bus-width: <1>]
pp opcode     = 0x12 [SPI MODE]
read opcode  = 0xc   [SPI MODE]
erase opcode = 0x21

SPI-NOR:
1. erase entire flash: Pass
2. write entire flash: Pass
3. read entire flash: Pass
4. cmp 32MiB read back data: Pass
5. MMC: Booted Linux and dtb from mmc

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
2020-04-30 22:34:20 +05:30
Sagar Shrikant Kadam
b332a89799 configs: fu540: enable gpio driver
Enable the DM based GPIO driver for FU540-C000 SoC.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-18 09:04:08 +08:00
Bhargav Shah
0b96a761c5 riscv: sifive: fu540: Enable SiFive SPI and MMC SPI drivers
This patch enables SiFive SPI and MMC SPI drivers for the
SiFive Unleashed board.

Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-19 14:25:06 +08:00
Anup Patel
8633edeb2a clk: sifive: Drop GEMGXL clock driver
The GEMGXL clock driver is now directly part of Cadence MACB
ethernet driver in upstream Linux kernel. There is no separate
GEMGXL clock driver in upstream Linux kernel hence we drop
GEMGXL clock driver from U-Boot as well.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-19 14:24:51 +08:00
Bin Meng
776d39d9a1 riscv: sifive: fu540: Enable GEMGXL MGMT driver
Enable the new GEMGXL MGMT driver so that GEM 10/100 Mbps works now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-06-01 13:33:17 -05:00
Lukas Auer
0ed93a8c59 riscv: fu540: enable SMP
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-04-08 09:44:26 +08:00
Anup Patel
3fda0262c3 riscv: Add SiFive FU540 board support
This patch adds SiFive FU540 board support. For now, only
SiFive serial, SiFive PRCI, and Cadance MACB drivers are
only enabled. The SiFive FU540 defconfig by default builds
U-Boot for S-Mode because U-Boot on SiFive FU540 will run
in S-Mode as payload of BBL or OpenSBI.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-27 09:12:33 +08:00