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66,252 Commits 45 Branches 255 Tags 213 MiB
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7 Commits

Author SHA1 Message Date
Tom Rini
6e7d7aa2e2 Merge branch 'next' 
Merge all outstanding changes from the current next branch in now that
we have released.
 2020-07-06 15:46:38 -04:00
Tom Rini
c5a6e9f8b8 configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2020-07-06 13:54:25 -04:00
Tom Rini
44a666a848 Convert CONFIG_BOOTARGS to Kconfig 
This converts the following to Kconfig:
   CONFIG_BOOTARGS

Signed-off-by: Tom Rini <trini@konsulko.com>
 2020-06-26 10:29:05 -04:00
Tom Rini
32a8f800a9 configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2020-05-26 08:35:55 -04:00
Tom Rini
556fd590db configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2020-04-28 16:15:47 -04:00
Marek Vasut
8876f89640 ARM: socfpga: Enable DM RTC bootcount on ABB SECU1 
Add and enable RTC-backed boot counter on ABB SECU1 platform.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2020-04-13 13:49:51 +02:00
Holger Brunck
468ba8d00b ARM: socfpga: Add initial support for the ABB SECU board 
Add initial support for the ABB SECU board, which is an ArriaV-based
SoCFPGA system with ethernet and booting from Denali NAND.

Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
 2020-03-03 22:11:36 +01:00