4 Commits

Author	SHA1	Message	Date
Stefan Roese	3db93b8bed	ppc4xx: Enable CPU POST test for 4xx with dcache enabled ... Now with caches enabled (i- and d-cache) on 44x, we need a chance to disable the cache for the CPU POST tests, since these tests consist of self modifying code. This is done via the new change_tlb() function. Signed-off-by: Stefan Roese <sr@denx.de>	2007-10-31 21:21:47 +01:00
Sergei Poselenov	b44896215a	Merged POST framework with the current TOT. ... Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>	2007-07-05 08:17:37 +02:00
Igor Lisitsin	a11e06965e	Extend POST support for PPC440 ... Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --	2007-06-22 23:21:01 +02:00
Wolfgang Denk	ad5bb451ad	Restructure POST directory to support of other CPUs, boards, etc.	2007-03-06 18:08:43 +01:00