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board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 board
MicroDev 2.0 is a general purpose miniature carrier board with CAN, LTE and LVDS panel interfaces. Genaral features: - Ethernet 10/100 - USB Type A - Audio Out - microSD - LVDS panel connector - Wifi/BT (option) - UMTS LTE with sim connector (option) MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board. Linux dts commit details: commit <f838dae7afd0> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 board") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
parent
c72ba3df16
commit
fd4dc09a4c
@ -991,6 +991,7 @@ dtb-$(CONFIG_STM32MP15x) += \
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stm32mp157a-avenger96.dtb \
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stm32mp157a-avenger96.dtb \
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stm32mp157a-icore-stm32mp1-ctouch2.dtb \
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stm32mp157a-icore-stm32mp1-ctouch2.dtb \
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stm32mp157a-icore-stm32mp1-edimm2.2.dtb \
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stm32mp157a-icore-stm32mp1-edimm2.2.dtb \
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stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \
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stm32mp157c-dk2.dtb \
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stm32mp157c-dk2.dtb \
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stm32mp157c-ed1.dtb \
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stm32mp157c-ed1.dtb \
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stm32mp157c-ev1.dtb \
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stm32mp157c-ev1.dtb \
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@ -0,0 +1,51 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
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* Copyright (c) 2020 Amarula Solutions(India)
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* Author: Jagan Teki <jagan@amarulasolutions.com>
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*/
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#include "stm32mp157a-microgea-stm32mp1-u-boot.dtsi"
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/{
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aliases {
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mmc0 = &sdmmc1;
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};
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chosen {
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stdout-path = &uart4;
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};
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};
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&sdmmc1 {
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u-boot,dm-pre-reloc;
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};
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&sdmmc1_b4_pins_a {
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u-boot,dm-pre-reloc;
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pins1 {
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u-boot,dm-pre-reloc;
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};
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pins2 {
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u-boot,dm-pre-reloc;
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};
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};
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&uart4 {
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u-boot,dm-pre-reloc;
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};
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&uart4_pins_a {
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u-boot,dm-pre-reloc;
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pins1 {
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u-boot,dm-pre-reloc;
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};
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pins2 {
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u-boot,dm-pre-reloc;
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bias-pull-up;
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};
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};
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55
arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dts
Normal file
55
arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dts
Normal file
@ -0,0 +1,55 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (c) STMicroelectronics 2019 - All Rights Reserved
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* Copyright (c) 2020 Engicam srl
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* Copyright (c) 2020 Amarula Solutons(India)
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*/
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/dts-v1/;
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#include "stm32mp157.dtsi"
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#include "stm32mp157a-microgea-stm32mp1.dtsi"
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#include "stm32mp15-pinctrl.dtsi"
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#include "stm32mp15xxaa-pinctrl.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 Carrier Board";
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compatible = "engicam,microgea-stm32mp1-microdev2.0",
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"engicam,microgea-stm32mp1", "st,stm32mp157";
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aliases {
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serial0 = &uart4;
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serial1 = &uart8;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&sdmmc1 {
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bus-width = <4>;
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disable-wp;
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pinctrl-names = "default", "opendrain", "sleep";
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pinctrl-0 = <&sdmmc1_b4_pins_a>;
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pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
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pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
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st,neg-edge;
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vmmc-supply = <&vdd>;
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default", "sleep", "idle";
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pinctrl-0 = <&uart4_pins_a>;
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pinctrl-1 = <&uart4_sleep_pins_a>;
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pinctrl-2 = <&uart4_idle_pins_a>;
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status = "okay";
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};
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/* J31: RS323 */
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&uart8 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart8_pins_a>;
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status = "okay";
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};
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118
arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi
Normal file
118
arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi
Normal file
@ -0,0 +1,118 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
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* Copyright (c) 2020 Amarula Solutions(India)
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* Author: Jagan Teki <jagan@amarulasolutions.com>
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*/
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#include <dt-bindings/clock/stm32mp1-clksrc.h>
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#include "stm32mp15-u-boot.dtsi"
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#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
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&vin {
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u-boot,dm-pre-reloc;
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};
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&vddcore {
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u-boot,dm-pre-reloc;
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};
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&vdd {
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u-boot,dm-pre-reloc;
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};
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&vddq_ddr {
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u-boot,dm-pre-reloc;
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};
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&rcc {
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st,clksrc = <
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CLK_MPU_PLL1P
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CLK_AXI_PLL2P
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CLK_MCU_PLL3P
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CLK_PLL12_HSE
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CLK_PLL3_HSE
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CLK_PLL4_HSE
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CLK_RTC_LSE
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CLK_MCO1_DISABLED
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CLK_MCO2_DISABLED
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>;
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st,clkdiv = <
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1 /*MPU*/
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0 /*AXI*/
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0 /*MCU*/
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1 /*APB1*/
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1 /*APB2*/
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1 /*APB3*/
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1 /*APB4*/
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2 /*APB5*/
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23 /*RTC*/
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0 /*MCO1*/
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0 /*MCO2*/
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>;
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st,pkcs = <
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CLK_CKPER_HSE
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CLK_FMC_ACLK
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CLK_QSPI_ACLK
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CLK_ETH_DISABLED
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CLK_SDMMC12_PLL4P
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CLK_DSI_DSIPLL
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CLK_STGEN_HSE
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CLK_USBPHY_HSE
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CLK_SPI2S1_PLL3Q
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CLK_SPI2S23_PLL3Q
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CLK_SPI45_HSI
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CLK_SPI6_HSI
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CLK_I2C46_HSI
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CLK_SDMMC3_PLL4P
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CLK_USBO_USBPHY
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CLK_ADC_CKPER
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CLK_CEC_LSE
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CLK_I2C12_HSI
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CLK_I2C35_HSI
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CLK_UART1_HSI
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CLK_UART24_HSI
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CLK_UART35_HSI
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CLK_UART6_HSI
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CLK_UART78_HSI
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CLK_SPDIF_PLL4P
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CLK_FDCAN_PLL4R
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CLK_SAI1_PLL3Q
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CLK_SAI2_PLL3Q
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CLK_SAI3_PLL3Q
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CLK_SAI4_PLL3Q
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CLK_RNG1_LSI
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CLK_RNG2_LSI
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CLK_LPTIM1_PCLK1
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CLK_LPTIM23_PCLK3
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CLK_LPTIM45_LSE
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>;
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/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
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pll2: st,pll@1 {
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compatible = "st,stm32mp1-pll";
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reg = <1>;
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cfg = < 2 65 1 0 0 PQR(1,1,1) >;
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frac = < 0x1400 >;
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u-boot,dm-pre-reloc;
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};
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/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
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pll3: st,pll@2 {
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compatible = "st,stm32mp1-pll";
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reg = <2>;
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cfg = < 1 33 1 16 36 PQR(1,1,1) >;
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frac = < 0x1a04 >;
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u-boot,dm-pre-reloc;
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};
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/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
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pll4: st,pll@3 {
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compatible = "st,stm32mp1-pll";
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reg = <3>;
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cfg = < 3 98 5 7 7 PQR(1,1,1) >;
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u-boot,dm-pre-reloc;
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};
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};
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@ -77,6 +77,26 @@ config TARGET_ST_STM32MP15x
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Evalulation board (EV1) or Discovery board (DK1 and DK2).
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Evalulation board (EV1) or Discovery board (DK1 and DK2).
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The difference between board are managed with devicetree
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The difference between board are managed with devicetree
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config TARGET_MICROGEA_STM32MP1
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bool "Engicam MicroGEA STM32MP1 SOM"
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select STM32MP15x
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imply BOOTCOUNT_LIMIT
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imply BOOTSTAGE
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imply CMD_BOOTCOUNT
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
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MicroGEA STM32MP1 MicroDev 2.0:
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* MicroDev 2.0 is a general purpose miniature carrier board with CAN,
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LTE and LVDS panel interfaces.
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* MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
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for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
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config TARGET_ICORE_STM32MP1
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config TARGET_ICORE_STM32MP1
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bool "Engicam i.Core STM32MP1 SOM"
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bool "Engicam i.Core STM32MP1 SOM"
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select STM32MP15x
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select STM32MP15x
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@ -1,4 +1,4 @@
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if TARGET_ICORE_STM32MP1
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if TARGET_ICORE_STM32MP1 || TARGET_MICROGEA_STM32MP1
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config SYS_BOARD
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config SYS_BOARD
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default "stm32mp1"
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default "stm32mp1"
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@ -1,3 +1,10 @@
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MicroGEA-STM32MP1-MICRODEV2.0
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M: Jagan Teki <jagan@amarulasolutions.com>
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M: Matteo Lisi <matteo.lisi@engicam.com>
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S: Maintained
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F: arch/arm/dts/stm32mp15*microgea*
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F: configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
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i.Core-STM32MP1-CTOUCH2.0
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i.Core-STM32MP1-CTOUCH2.0
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M: Jagan Teki <jagan@amarulasolutions.com>
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M: Jagan Teki <jagan@amarulasolutions.com>
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M: Matteo Lisi <matteo.lisi@engicam.com>
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M: Matteo Lisi <matteo.lisi@engicam.com>
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79
configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
Normal file
79
configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
Normal file
@ -0,0 +1,79 @@
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CONFIG_ARM=y
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CONFIG_ARCH_STM32MP=y
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CONFIG_SYS_MALLOC_F_LEN=0x3000
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CONFIG_SYS_MEMTEST_START=0xc0000000
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CONFIG_SYS_MEMTEST_END=0xc4000000
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CONFIG_ENV_OFFSET=0x280000
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CONFIG_SPL_TEXT_BASE=0x2FFC2500
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL=y
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CONFIG_TARGET_MICROGEA_STM32MP1=y
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CONFIG_ENV_OFFSET_REDUND=0x2C0000
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# CONFIG_ARMV7_VIRT is not set
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CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0"
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_FIT=y
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CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_POWER_SUPPORT=y
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CONFIG_SYS_PROMPT="STM32MP> "
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CONFIG_CMD_ADTIMG=y
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CONFIG_CMD_ERASEENV=y
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CONFIG_CMD_MEMINFO=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_ADC=y
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CONFIG_CMD_CLK=y
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CONFIG_CMD_FUSE=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_REMOTEPROC=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_TIMER=y
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CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_DOS_PARTITION is not set
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CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
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CONFIG_ENV_IS_NOWHERE=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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# CONFIG_SPL_ENV_IS_NOWHERE is not set
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CONFIG_DM_HWSPINLOCK=y
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CONFIG_HWSPINLOCK_STM32=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_STM32F7=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_DM_MAILBOX=y
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CONFIG_STM32_IPCC=y
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CONFIG_STM32_FMC2_EBI=y
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CONFIG_DM_MMC=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_STM32_SDMMC2=y
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||||||
|
CONFIG_PHY_REALTEK=y
|
||||||
|
CONFIG_DM_ETH=y
|
||||||
|
CONFIG_DWC_ETH_QOS=y
|
||||||
|
CONFIG_PHY=y
|
||||||
|
CONFIG_PINCONF=y
|
||||||
|
# CONFIG_SPL_PINCTRL_FULL is not set
|
||||||
|
CONFIG_PINCTRL_STMFX=y
|
||||||
|
CONFIG_DM_PMIC=y
|
||||||
|
# CONFIG_SPL_PMIC_CHILDREN is not set
|
||||||
|
CONFIG_PMIC_STPMIC1=y
|
||||||
|
CONFIG_DM_REGULATOR=y
|
||||||
|
CONFIG_DM_REGULATOR_FIXED=y
|
||||||
|
CONFIG_DM_REGULATOR_GPIO=y
|
||||||
|
CONFIG_REMOTEPROC_STM32_COPRO=y
|
||||||
|
CONFIG_DM_RTC=y
|
||||||
|
CONFIG_RTC_STM32=y
|
||||||
|
CONFIG_SERIAL_RX_BUFFER=y
|
||||||
|
CONFIG_WDT=y
|
||||||
|
CONFIG_WDT_STM32MP=y
|
||||||
|
CONFIG_LZO=y
|
||||||
|
CONFIG_ERRNO_STR=y
|
Loading…
Reference in New Issue
Block a user