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xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP

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Fix bug introduced by commit listed below. It is for cases where Versal or
ZynqMP don't have DDR mapped. Later SPL was also excluded by
commit a672b9871b ("xilinx: common: Do not touch
CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL").

Fixes: 506009fc10 ("xilinx: common: Change macro handling in board_fdt_blob_setup()")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2021-02-02 13:33:22 +01:00
parent f1fd79afad
commit fc3c6fd752
1 changed files with 1 additions and 1 deletions
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2
board/xilinx/common/board.c
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@ -326,7 +326,7 @@ void *board_fdt_blob_setup(void)
if (!IS_ENABLED(CONFIG_SPL_BUILD) &&
!IS_ENABLED(CONFIG_VERSAL_NO_DDR) &&
!IS_ENABLED(CONFIG_VERSAL_NO_DDR)) {
!IS_ENABLED(CONFIG_ZYNQMP_NO_DDR)) {
fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
if (fdt_magic(fdt_blob) == FDT_MAGIC)